commit 8da2b97392f245f3e3f6bb5b1b0d05c670b82bca
author Sami Mujawar <sami.mujawar@arm.com> Tue May 16 14:12:57 2023 +0100
committer mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> Thu Jun 01 15:52:01 2023 +0000
tree 9929970f903e9ca45f430861ad4a946c54b76874
parent cfb4a10d76e2ef47438e7fa5b71d5f87d09c3dcd

ArmPkg: Prevent SgiId from setting RES0 bits of GICD_SGIR

GICD_SGIR is a 32-bit register, of which INTID is bits [3:0] and Bits
[14:4] is RES0. Since SgiId parameter in the function ArmGicSendSgiTo ()
is UINT8, mask unused bits of SgiId before writing to the GICD_SGIR
register to prevent accidental setting of the RES0 bits.

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>

ArmPkg/Drivers/ArmGic/ArmGicLib.c

diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
index eefe635..0127cca 100644
--- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c
+++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
@@ -148,7 +148,9 @@
 {

   MmioWrite32 (

     GicDistributorBase + ARM_GIC_ICDSGIR,

-    ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId

+    ((TargetListFilter & 0x3) << 24) |

+    ((CPUTargetList & 0xFF) << 16)   |

+    (SgiId & 0xF)

     );

 }