| /* |
| * Copyright (C) 2015 Google Inc. |
| * Copyright (C) 2015 Intel Corporation |
| * |
| * See file CREDITS for list of people who contributed to this |
| * project. |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of |
| * the License, or (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but without any warranty; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, write to the Free Software |
| * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| * MA 02111-1307 USA |
| */ |
| |
| #include <pci.h> |
| #include <pci/pci.h> |
| #include <libpayload.h> |
| #include <sysinfo.h> |
| |
| #include "base/init_funcs.h" |
| #include "base/list.h" |
| #include "drivers/ec/cros/lpc.h" |
| #include "drivers/flash/flash.h" |
| #include "drivers/flash/memmapped.h" |
| #include "drivers/gpio/skylake.h" |
| #include "drivers/gpio/sysinfo.h" |
| #include "drivers/power/pch.h" |
| #include "drivers/storage/blockdev.h" |
| #include "drivers/storage/sdhci.h" |
| #include "drivers/tpm/lpc.h" |
| #include "drivers/tpm/tpm.h" |
| #include "vboot/util/flag.h" |
| #include "drivers/bus/usb/usb.h" |
| |
| /* |
| * Clock frequencies for the eMMC and SD ports are defined below. The minimum |
| * frequency is the same for both interfaces, the firmware does not run any |
| * interface faster than 52 MHz, but defines maximum eMMC frequency as 200 MHz |
| * for proper divider settings. |
| */ |
| #define EMMC_SD_CLOCK_MIN 400000 |
| #define EMMC_CLOCK_MAX 200000000 |
| #define SD_CLOCK_MAX 52000000 |
| |
| static int board_setup(void) |
| { |
| sysinfo_install_flags(new_skylake_gpio_input_from_coreboot); |
| |
| /* MEC1322 Chrome EC */ |
| CrosEcLpcBus *cros_ec_lpc_bus = |
| new_cros_ec_lpc_bus(CROS_EC_LPC_BUS_MEC); |
| cros_ec_set_bus(&cros_ec_lpc_bus->ops); |
| |
| /* 16MB SPI Flash */ |
| flash_set_ops(&new_mem_mapped_flash(0xff000000, 0x1000000)->ops); |
| |
| /* SPI TPM memory mapped to act like LPC TPM */ |
| tpm_set_ops(&new_lpc_tpm((void *)(uintptr_t)0xfed40000)->ops); |
| |
| /* PCH Power */ |
| power_set_ops(&skylake_power_ops); |
| |
| /* eMMC */ |
| SdhciHost *emmc = new_pci_sdhci_host(PCI_DEV(0, 0x1e, 4), |
| SDHCI_PLATFORM_NO_EMMC_HS200, |
| EMMC_SD_CLOCK_MIN, EMMC_CLOCK_MAX); |
| list_insert_after(&emmc->mmc_ctrlr.ctrlr.list_node, |
| &fixed_block_dev_controllers); |
| |
| /* SD Card */ |
| SdhciHost *sd = new_pci_sdhci_host(PCI_DEV(0, 0x1e, 6), 1, |
| EMMC_SD_CLOCK_MIN, SD_CLOCK_MAX); |
| list_insert_after(&sd->mmc_ctrlr.ctrlr.list_node, |
| &removable_block_dev_controllers); |
| |
| return 0; |
| } |
| |
| INIT_FUNC(board_setup); |