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| <div class="title">crashpad::MinidumpContextMIPS Struct Reference</div> </div> |
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| |
| <p>A 32bit MIPS CPU context (register state) carried in a minidump file. |
| <a href="structcrashpad_1_1MinidumpContextMIPS.html#details">More...</a></p> |
| |
| <p><code>#include "minidump/minidump_context.h"</code></p> |
| <table class="memberdecls"> |
| <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> |
| Public Attributes</h2></td></tr> |
| <tr class="memitem:a1c4d134db87f9d60111725c77a52c78e"><td class="memItemLeft" align="right" valign="top"><a id="a1c4d134db87f9d60111725c77a52c78e"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><b>context_flags</b></td></tr> |
| <tr class="separator:a1c4d134db87f9d60111725c77a52c78e"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a3d20643599a1f1ce14fd3d00eddf09da"><td class="memItemLeft" align="right" valign="top"><a id="a3d20643599a1f1ce14fd3d00eddf09da"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structcrashpad_1_1MinidumpContextMIPS.html#a3d20643599a1f1ce14fd3d00eddf09da">_pad0</a></td></tr> |
| <tr class="memdesc:a3d20643599a1f1ce14fd3d00eddf09da"><td class="mdescLeft"> </td><td class="mdescRight">This padding field is included for breakpad compatibility. <br /></td></tr> |
| <tr class="separator:a3d20643599a1f1ce14fd3d00eddf09da"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a6f008bd35f1e2265d2ebcb3f731b5723"><td class="memItemLeft" align="right" valign="top"><a id="a6f008bd35f1e2265d2ebcb3f731b5723"></a> |
| uint64_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structcrashpad_1_1MinidumpContextMIPS.html#a6f008bd35f1e2265d2ebcb3f731b5723">regs</a> [32]</td></tr> |
| <tr class="memdesc:a6f008bd35f1e2265d2ebcb3f731b5723"><td class="mdescLeft"> </td><td class="mdescRight">General purpose registers <code>0</code>-<code>31</code>. <br /></td></tr> |
| <tr class="separator:a6f008bd35f1e2265d2ebcb3f731b5723"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:aa4157d34fb24e4eb4223bcb6814a77b4"><td class="memItemLeft" align="right" valign="top"><a id="aa4157d34fb24e4eb4223bcb6814a77b4"></a> |
| uint64_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structcrashpad_1_1MinidumpContextMIPS.html#aa4157d34fb24e4eb4223bcb6814a77b4">mdhi</a></td></tr> |
| <tr class="memdesc:aa4157d34fb24e4eb4223bcb6814a77b4"><td class="mdescLeft"> </td><td class="mdescRight">Multiply/divide result. <br /></td></tr> |
| <tr class="separator:aa4157d34fb24e4eb4223bcb6814a77b4"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a78ac4cff0969d8656f88356153d6908e"><td class="memItemLeft" align="right" valign="top"><a id="a78ac4cff0969d8656f88356153d6908e"></a> |
| uint64_t </td><td class="memItemRight" valign="bottom"><b>mdlo</b></td></tr> |
| <tr class="separator:a78ac4cff0969d8656f88356153d6908e"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ac1cba7faaa0eac7f8594be5fd8b8584d"><td class="memItemLeft" align="right" valign="top"><a id="ac1cba7faaa0eac7f8594be5fd8b8584d"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structcrashpad_1_1MinidumpContextMIPS.html#ac1cba7faaa0eac7f8594be5fd8b8584d">hi</a> [3]</td></tr> |
| <tr class="memdesc:ac1cba7faaa0eac7f8594be5fd8b8584d"><td class="mdescLeft"> </td><td class="mdescRight">DSP registers. <br /></td></tr> |
| <tr class="separator:ac1cba7faaa0eac7f8594be5fd8b8584d"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a85d2d0f131754c7d51727e6236414876"><td class="memItemLeft" align="right" valign="top"><a id="a85d2d0f131754c7d51727e6236414876"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><b>lo</b> [3]</td></tr> |
| <tr class="separator:a85d2d0f131754c7d51727e6236414876"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a651a40830f484a2a745fbda0a153e563"><td class="memItemLeft" align="right" valign="top"><a id="a651a40830f484a2a745fbda0a153e563"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><b>dsp_control</b></td></tr> |
| <tr class="separator:a651a40830f484a2a745fbda0a153e563"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a5777933ac7334fb2062c07374cc81c36"><td class="memItemLeft" align="right" valign="top"><a id="a5777933ac7334fb2062c07374cc81c36"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structcrashpad_1_1MinidumpContextMIPS.html#a5777933ac7334fb2062c07374cc81c36">_pad1</a></td></tr> |
| <tr class="memdesc:a5777933ac7334fb2062c07374cc81c36"><td class="mdescLeft"> </td><td class="mdescRight">This padding field is included for breakpad compatibility. <br /></td></tr> |
| <tr class="separator:a5777933ac7334fb2062c07374cc81c36"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a7cdc7a1f355ccbbefc09f253a5a5608a"><td class="memItemLeft" align="right" valign="top"><a id="a7cdc7a1f355ccbbefc09f253a5a5608a"></a> |
| uint64_t </td><td class="memItemRight" valign="bottom"><b>epc</b></td></tr> |
| <tr class="separator:a7cdc7a1f355ccbbefc09f253a5a5608a"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ab82fa1bd01e30cb42098cf35774300b9"><td class="memItemLeft" align="right" valign="top"><a id="ab82fa1bd01e30cb42098cf35774300b9"></a> |
| uint64_t </td><td class="memItemRight" valign="bottom"><b>badvaddr</b></td></tr> |
| <tr class="separator:ab82fa1bd01e30cb42098cf35774300b9"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a645531f982f11cc90b5ee06fd790ae93"><td class="memItemLeft" align="right" valign="top"><a id="a645531f982f11cc90b5ee06fd790ae93"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><b>status</b></td></tr> |
| <tr class="separator:a645531f982f11cc90b5ee06fd790ae93"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:aaaa2e6a33f4484749aa96979cc1ddfd8"><td class="memItemLeft" align="right" valign="top"><a id="aaaa2e6a33f4484749aa96979cc1ddfd8"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><b>cause</b></td></tr> |
| <tr class="separator:aaaa2e6a33f4484749aa96979cc1ddfd8"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a5af9bddfe88d9ffd0cb26e4629a38872"><td class="memItemLeft" ><a id="a5af9bddfe88d9ffd0cb26e4629a38872"></a> |
| union {</td></tr> |
| <tr class="memitem:a5cf8a6a75bdf80fba1db2ca1cabc087b"><td class="memItemLeft" > |
|    struct {</td></tr> |
| <tr class="memitem:aacdb1a78447728c12827d5f0fcae9ccd"><td class="memItemLeft" > |
|       float   <b>_fp_fregs</b></td></tr> |
| <tr class="separator:aacdb1a78447728c12827d5f0fcae9ccd"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ac07bf4c3cfee709410659cdaaa4e5b6e"><td class="memItemLeft" > |
|       uint32_t   <b>_fp_pad</b></td></tr> |
| <tr class="separator:ac07bf4c3cfee709410659cdaaa4e5b6e"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a5cf8a6a75bdf80fba1db2ca1cabc087b"><td class="memItemLeft" valign="top">   }   <b>fregs</b> [32]</td></tr> |
| <tr class="separator:a5cf8a6a75bdf80fba1db2ca1cabc087b"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a7a4fdd10b2618d1ef38b1b8c3c1ae741"><td class="memItemLeft" > |
|    double   <b>dregs</b> [32]</td></tr> |
| <tr class="separator:a7a4fdd10b2618d1ef38b1b8c3c1ae741"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a5af9bddfe88d9ffd0cb26e4629a38872"><td class="memItemLeft" valign="top">} </td><td class="memItemRight" valign="bottom"><a class="el" href="structcrashpad_1_1MinidumpContextMIPS.html#a5af9bddfe88d9ffd0cb26e4629a38872">fpregs</a></td></tr> |
| <tr class="memdesc:a5af9bddfe88d9ffd0cb26e4629a38872"><td class="mdescLeft"> </td><td class="mdescRight">FPU registers. <br /></td></tr> |
| <tr class="separator:a5af9bddfe88d9ffd0cb26e4629a38872"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a6b14d723f54094e5b142f19087df4dfc"><td class="memItemLeft" align="right" valign="top"><a id="a6b14d723f54094e5b142f19087df4dfc"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structcrashpad_1_1MinidumpContextMIPS.html#a6b14d723f54094e5b142f19087df4dfc">fpcsr</a></td></tr> |
| <tr class="memdesc:a6b14d723f54094e5b142f19087df4dfc"><td class="mdescLeft"> </td><td class="mdescRight">FPU status register. <br /></td></tr> |
| <tr class="separator:a6b14d723f54094e5b142f19087df4dfc"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a0ba62492430ca47a4ba68f29b4f6cd4e"><td class="memItemLeft" align="right" valign="top"><a id="a0ba62492430ca47a4ba68f29b4f6cd4e"></a> |
| uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structcrashpad_1_1MinidumpContextMIPS.html#a0ba62492430ca47a4ba68f29b4f6cd4e">fir</a></td></tr> |
| <tr class="memdesc:a0ba62492430ca47a4ba68f29b4f6cd4e"><td class="mdescLeft"> </td><td class="mdescRight">FPU implementation register. <br /></td></tr> |
| <tr class="separator:a0ba62492430ca47a4ba68f29b4f6cd4e"><td class="memSeparator" colspan="2"> </td></tr> |
| </table> |
| <a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2> |
| <div class="textblock"><p>A 32bit MIPS CPU context (register state) carried in a minidump file. </p> |
| </div><hr/>The documentation for this struct was generated from the following file:<ul> |
| <li>minidump/minidump_context.h</li> |
| </ul> |
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