| # Set the vector data type for vector instruction. |
| # Unfortunately we cannot get this information from the td files. |
| # See https://github.com/capstone-engine/capstone/issues/2152 |
| # for a possible solution. |
| |
| diff --git a/arch/ARM/ARMGenAsmWriter.inc b/arch/ARM/ARMGenAsmWriter.inc |
| index 3a4e61abf..635bfefb0 100644 |
| --- a/arch/ARM/ARMGenAsmWriter.inc |
| +++ b/arch/ARM/ARMGenAsmWriter.inc |
| @@ -9927,15 +9927,18 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 13: |
| // FCONSTD, VABSD, VADDD, VCMPD, VCMPED, VCMPEZD, VCMPZD, VDIVD, VFMAD, V... |
| SStream_concat0(O, ".f64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F64); |
| printOperand(MI, 0, O); |
| break; |
| case 14: |
| // FCONSTH, MVE_VABDf16, MVE_VABSf16, MVE_VADD_qr_f16, MVE_VADDf16, MVE_V... |
| SStream_concat0(O, ".f16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F16); |
| break; |
| case 15: |
| // FCONSTS, MVE_VABDf32, MVE_VABSf32, MVE_VADD_qr_f32, MVE_VADDf32, MVE_V... |
| SStream_concat0(O, ".f32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F32); |
| break; |
| case 16: |
| // FMSTAT |
| @@ -9976,38 +9979,47 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 21: |
| // MVE_VABAVs16, MVE_VABDs16, MVE_VABSs16, MVE_VADDVs16acc, MVE_VADDVs16n... |
| SStream_concat0(O, ".s16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S16); |
| break; |
| case 22: |
| // MVE_VABAVs32, MVE_VABDs32, MVE_VABSs32, MVE_VADDLVs32acc, MVE_VADDLVs3... |
| SStream_concat0(O, ".s32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S32); |
| break; |
| case 23: |
| // MVE_VABAVs8, MVE_VABDs8, MVE_VABSs8, MVE_VADDVs8acc, MVE_VADDVs8no_acc... |
| SStream_concat0(O, ".s8\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S8); |
| break; |
| case 24: |
| // MVE_VABAVu16, MVE_VABDu16, MVE_VADDVu16acc, MVE_VADDVu16no_acc, MVE_VC... |
| SStream_concat0(O, ".u16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U16); |
| break; |
| case 25: |
| // MVE_VABAVu32, MVE_VABDu32, MVE_VADDLVu32acc, MVE_VADDLVu32no_acc, MVE_... |
| SStream_concat0(O, ".u32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U32); |
| break; |
| case 26: |
| // MVE_VABAVu8, MVE_VABDu8, MVE_VADDVu8acc, MVE_VADDVu8no_acc, MVE_VCMPu8... |
| SStream_concat0(O, ".u8\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U8); |
| break; |
| case 27: |
| // MVE_VADC, MVE_VADCI, MVE_VADD_qr_i32, MVE_VADDi32, MVE_VBICimmi32, MVE... |
| SStream_concat0(O, ".i32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_I32); |
| break; |
| case 28: |
| // MVE_VADD_qr_i16, MVE_VADDi16, MVE_VBICimmi16, MVE_VCADDi16, MVE_VCLZs1... |
| SStream_concat0(O, ".i16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_I16); |
| break; |
| case 29: |
| // MVE_VADD_qr_i8, MVE_VADDi8, MVE_VCADDi8, MVE_VCLZs8, MVE_VCMPi8, MVE_V... |
| SStream_concat0(O, ".i8\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_I8); |
| break; |
| case 30: |
| // MVE_VCTP64, MVE_VSTRD64_qi, MVE_VSTRD64_qi_pre, MVE_VSTRD64_rq, MVE_VS... |
| @@ -10016,12 +10028,14 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 31: |
| // MVE_VCVTf16f32bh, MVE_VCVTf16f32th, VCVTBSH, VCVTTSH, VCVTf2h |
| SStream_concat0(O, ".f16.f32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F16F32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| break; |
| case 32: |
| // MVE_VCVTf16s16_fix, MVE_VCVTf16s16n, VCVTs2hd, VCVTs2hq, VCVTxs2hd, VC... |
| SStream_concat0(O, ".f16.s16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F16S16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10029,6 +10043,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 33: |
| // MVE_VCVTf16u16_fix, MVE_VCVTf16u16n, VCVTu2hd, VCVTu2hq, VCVTxu2hd, VC... |
| SStream_concat0(O, ".f16.u16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F16U16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10036,6 +10051,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 34: |
| // MVE_VCVTf32f16bh, MVE_VCVTf32f16th, VCVTBHS, VCVTTHS, VCVTh2f |
| SStream_concat0(O, ".f32.f16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F32F16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10044,6 +10060,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 35: |
| // MVE_VCVTf32s32_fix, MVE_VCVTf32s32n, VCVTs2fd, VCVTs2fq, VCVTxs2fd, VC... |
| SStream_concat0(O, ".f32.s32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F32S32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10051,6 +10068,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 36: |
| // MVE_VCVTf32u32_fix, MVE_VCVTf32u32n, VCVTu2fd, VCVTu2fq, VCVTxu2fd, VC... |
| SStream_concat0(O, ".f32.u32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F32U32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10058,6 +10076,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 37: |
| // MVE_VCVTs16f16_fix, MVE_VCVTs16f16a, MVE_VCVTs16f16m, MVE_VCVTs16f16n,... |
| SStream_concat0(O, ".s16.f16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S16F16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10065,6 +10084,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 38: |
| // MVE_VCVTs32f32_fix, MVE_VCVTs32f32a, MVE_VCVTs32f32m, MVE_VCVTs32f32n,... |
| SStream_concat0(O, ".s32.f32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S32F32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10072,6 +10092,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 39: |
| // MVE_VCVTu16f16_fix, MVE_VCVTu16f16a, MVE_VCVTu16f16m, MVE_VCVTu16f16n,... |
| SStream_concat0(O, ".u16.f16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U16F16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10079,6 +10100,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 40: |
| // MVE_VCVTu32f32_fix, MVE_VCVTu32f32a, MVE_VCVTu32f32m, MVE_VCVTu32f32n,... |
| SStream_concat0(O, ".u32.f32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U32F32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10097,16 +10119,19 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 43: |
| // MVE_VLDRDU64_qi, MVE_VLDRDU64_qi_pre, MVE_VLDRDU64_rq, MVE_VLDRDU64_rq... |
| SStream_concat0(O, ".u64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U64); |
| break; |
| case 44: |
| // MVE_VMOVimmi64, VADDHNv2i32, VADDv1i64, VADDv2i64, VMOVNv2i32, VMOVv1i... |
| SStream_concat0(O, ".i64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_I64); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| break; |
| case 45: |
| // MVE_VMULLBp16, MVE_VMULLTp16 |
| SStream_concat0(O, ".p16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_P16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10117,6 +10142,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 46: |
| // MVE_VMULLBp8, MVE_VMULLTp8, VMULLp8, VMULpd, VMULpq |
| SStream_concat0(O, ".p8\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_P8); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10137,6 +10163,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 49: |
| // VCVTBDH, VCVTTDH |
| SStream_concat0(O, ".f16.f64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F16F64); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 2, O); |
| @@ -10145,6 +10172,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 50: |
| // VCVTBHD, VCVTTHD |
| SStream_concat0(O, ".f64.f16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F64F16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10153,6 +10181,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 51: |
| // VCVTDS |
| SStream_concat0(O, ".f64.f32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F64F32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10161,6 +10190,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 52: |
| // VCVTSD |
| SStream_concat0(O, ".f32.f64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F32F64); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10169,6 +10199,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 53: |
| // VJCVT, VTOSIRD, VTOSIZD, VTOSLD |
| SStream_concat0(O, ".s32.f64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S32F64); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10236,12 +10267,14 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 67: |
| // VQADDsv1i64, VQADDsv2i64, VQMOVNsuv2i32, VQMOVNsv2i32, VQRSHLsv1i64, V... |
| SStream_concat0(O, ".s64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S64); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| break; |
| case 68: |
| // VSHTOD |
| SStream_concat0(O, ".f64.s16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F64S16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10252,6 +10285,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 69: |
| // VSHTOS |
| SStream_concat0(O, ".f32.s16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F32S16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10262,6 +10296,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 70: |
| // VSITOD, VSLTOD |
| SStream_concat0(O, ".f64.s32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F64S32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10269,6 +10304,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 71: |
| // VSITOH, VSLTOH |
| SStream_concat0(O, ".f16.s32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F16S32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10276,6 +10312,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 72: |
| // VTOSHD |
| SStream_concat0(O, ".s16.f64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S16F64); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10286,6 +10323,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 73: |
| // VTOSHS |
| SStream_concat0(O, ".s16.f32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S16F32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10296,6 +10334,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 74: |
| // VTOSIRH, VTOSIZH, VTOSLH |
| SStream_concat0(O, ".s32.f16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_S32F16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10303,6 +10342,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 75: |
| // VTOUHD |
| SStream_concat0(O, ".u16.f64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U16F64); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10313,6 +10353,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 76: |
| // VTOUHS |
| SStream_concat0(O, ".u16.f32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U16F32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10323,6 +10364,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 77: |
| // VTOUIRD, VTOUIZD, VTOULD |
| SStream_concat0(O, ".u32.f64\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U32F64); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10330,6 +10372,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 78: |
| // VTOUIRH, VTOUIZH, VTOULH |
| SStream_concat0(O, ".u32.f16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_U32F16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10337,6 +10380,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 79: |
| // VUHTOD |
| SStream_concat0(O, ".f64.u16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F64U16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10347,6 +10391,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 80: |
| // VUHTOS |
| SStream_concat0(O, ".f32.u16\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F32U16); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10357,6 +10402,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 81: |
| // VUITOD, VULTOD |
| SStream_concat0(O, ".f64.u32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F64U32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
| @@ -10364,6 +10410,7 @@ void printInstruction(MCInst *MI, uint64_t Address, SStream *O) |
| case 82: |
| // VUITOH, VULTOH |
| SStream_concat0(O, ".f16.u32\t"); |
| + ARM_add_vector_data(MI, ARM_VECTORDATA_F16U32); |
| printOperand(MI, 0, O); |
| SStream_concat0(O, ", "); |
| printOperand(MI, 1, O); |
