| # CS_ARCH_AARCH64, 0, None | |
| 0x40,0x26,0x1c,0xd5 = msr VSTCR_EL2, x0 | |
| 0x00,0x26,0x1c,0xd5 = msr VSTTBR_EL2, x0 | |
| 0x2c,0x13,0x1c,0xd5 = msr SDER32_EL2, x12 | |
| 0x00,0xe4,0x1c,0xd5 = msr CNTHVS_TVAL_EL2, x0 | |
| 0x40,0xe4,0x1c,0xd5 = msr CNTHVS_CVAL_EL2, x0 | |
| 0x20,0xe4,0x1c,0xd5 = msr CNTHVS_CTL_EL2, x0 | |
| 0x00,0xe5,0x1c,0xd5 = msr CNTHPS_TVAL_EL2, x0 | |
| 0x40,0xe5,0x1c,0xd5 = msr CNTHPS_CVAL_EL2, x0 | |
| 0x20,0xe5,0x1c,0xd5 = msr CNTHPS_CTL_EL2, x0 |