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fuchsia / third_party / capstone / refs/heads/upstream/next / . / arch / ARM / ARMGenCSMappingInsn.inc
blob: a631d7455fe3586d03a083415082a917b0af29cd [file] [log] [blame]
/* Capstone Disassembly Engine, https://www.capstone-engine.org */
/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2022, */
/* Rot127 <unisono@quyllur.org> 2022-2023 */
/* Automatically generated file by Capstone's LLVM TableGen Disassembler Backend. */
/* LLVM-commit: <commit> */
/* LLVM-tag: <tag> */
/* Do not edit. */
/* Capstone's LLVM TableGen Backends: */
/* https://github.com/capstone-engine/llvm-capstone */
{
/* PHINODE */
ARM_PHI /* 0 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_INLINEASM /* 1 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_INLINEASM_BR /* 2 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_CFI_INSTRUCTION /* 3 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_EH_LABEL /* 4 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_GC_LABEL /* 5 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ANNOTATION_LABEL /* 6 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_KILL /* 7 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_EXTRACT_SUBREG /* 8 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_INSERT_SUBREG /* 9 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_IMPLICIT_DEF /* 10 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SUBREG_TO_REG /* 11 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_COPY_TO_REGCLASS /* 12 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* DBG_VALUE */
ARM_DBG_VALUE /* 13 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* DBG_VALUE_LIST */
ARM_DBG_VALUE_LIST /* 14 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* DBG_INSTR_REF */
ARM_DBG_INSTR_REF /* 15 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* DBG_PHI */
ARM_DBG_PHI /* 16 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* DBG_LABEL */
ARM_DBG_LABEL /* 17 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_REG_SEQUENCE /* 18 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_COPY /* 19 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* BUNDLE */
ARM_BUNDLE /* 20 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* LIFETIME_START */
ARM_LIFETIME_START /* 21 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* LIFETIME_END */
ARM_LIFETIME_END /* 22 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* PSEUDO_PROBE */
ARM_PSEUDO_PROBE /* 23 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ARITH_FENCE /* 24 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_STACKMAP /* 25 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* # FEntry call */
ARM_FENTRY_CALL /* 26 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PATCHPOINT /* 27 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_LOAD_STACK_GUARD /* 28 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PREALLOCATED_SETUP /* 29 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PREALLOCATED_ARG /* 30 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_STATEPOINT /* 31 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_LOCAL_ESCAPE /* 32 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_FAULTING_OP /* 33 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PATCHABLE_OP /* 34 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* # XRay Function Enter. */
ARM_PATCHABLE_FUNCTION_ENTER /* 35 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* # XRay Function Patchable RET. */
ARM_PATCHABLE_RET /* 36 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* # XRay Function Exit. */
ARM_PATCHABLE_FUNCTION_EXIT /* 37 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* # XRay Tail Call Exit. */
ARM_PATCHABLE_TAIL_CALL /* 38 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* # XRay Custom Event Log. */
ARM_PATCHABLE_EVENT_CALL /* 39 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* # XRay Typed Event Log. */
ARM_PATCHABLE_TYPED_EVENT_CALL /* 40 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ICALL_BRANCH_FUNNEL /* 41 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MEMBARRIER /* 42 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ASSERT_SEXT /* 43 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ASSERT_ZEXT /* 44 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ASSERT_ALIGN /* 45 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ADD /* 46 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SUB /* 47 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_MUL /* 48 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SDIV /* 49 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UDIV /* 50 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SREM /* 51 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UREM /* 52 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SDIVREM /* 53 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UDIVREM /* 54 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_AND /* 55 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_OR /* 56 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_XOR /* 57 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_IMPLICIT_DEF /* 58 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_PHI /* 59 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FRAME_INDEX /* 60 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_GLOBAL_VALUE /* 61 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_EXTRACT /* 62 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UNMERGE_VALUES /* 63 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INSERT /* 64 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_MERGE_VALUES /* 65 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BUILD_VECTOR /* 66 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BUILD_VECTOR_TRUNC /* 67 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_CONCAT_VECTORS /* 68 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_PTRTOINT /* 69 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INTTOPTR /* 70 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BITCAST /* 71 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FREEZE /* 72 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INTRINSIC_FPTRUNC_ROUND /* 73 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INTRINSIC_TRUNC /* 74 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INTRINSIC_ROUND /* 75 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INTRINSIC_LRINT /* 76 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INTRINSIC_ROUNDEVEN /* 77 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_READCYCLECOUNTER /* 78 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_LOAD /* 79 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SEXTLOAD /* 80 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ZEXTLOAD /* 81 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INDEXED_LOAD /* 82 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INDEXED_SEXTLOAD /* 83 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INDEXED_ZEXTLOAD /* 84 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_STORE /* 85 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INDEXED_STORE /* 86 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMIC_CMPXCHG_WITH_SUCCESS /* 87 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMIC_CMPXCHG /* 88 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_XCHG /* 89 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_ADD /* 90 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_SUB /* 91 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_AND /* 92 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_NAND /* 93 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_OR /* 94 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_XOR /* 95 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_MAX /* 96 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_MIN /* 97 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_UMAX /* 98 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_UMIN /* 99 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_FADD /* 100 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_FSUB /* 101 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_FMAX /* 102 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_FMIN /* 103 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_UINC_WRAP /* 104 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ATOMICRMW_UDEC_WRAP /* 105 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FENCE /* 106 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BRCOND /* 107 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BRINDIRECT /* 108 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INVOKE_REGION_START /* 109 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INTRINSIC /* 110 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INTRINSIC_W_SIDE_EFFECTS /* 111 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ANYEXT /* 112 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_TRUNC /* 113 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_CONSTANT /* 114 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FCONSTANT /* 115 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VASTART /* 116 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VAARG /* 117 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SEXT /* 118 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SEXT_INREG /* 119 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ZEXT /* 120 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SHL /* 121 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_LSHR /* 122 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ASHR /* 123 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FSHL /* 124 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FSHR /* 125 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ROTR /* 126 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ROTL /* 127 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ICMP /* 128 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FCMP /* 129 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SELECT /* 130 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UADDO /* 131 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UADDE /* 132 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_USUBO /* 133 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_USUBE /* 134 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SADDO /* 135 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SADDE /* 136 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SSUBO /* 137 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SSUBE /* 138 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UMULO /* 139 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SMULO /* 140 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UMULH /* 141 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SMULH /* 142 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UADDSAT /* 143 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SADDSAT /* 144 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_USUBSAT /* 145 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SSUBSAT /* 146 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_USHLSAT /* 147 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SSHLSAT /* 148 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SMULFIX /* 149 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UMULFIX /* 150 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SMULFIXSAT /* 151 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UMULFIXSAT /* 152 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SDIVFIX /* 153 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UDIVFIX /* 154 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SDIVFIXSAT /* 155 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UDIVFIXSAT /* 156 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FADD /* 157 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FSUB /* 158 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FMUL /* 159 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FMA /* 160 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FMAD /* 161 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FDIV /* 162 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FREM /* 163 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FPOW /* 164 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FPOWI /* 165 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FEXP /* 166 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FEXP2 /* 167 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FLOG /* 168 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FLOG2 /* 169 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FLOG10 /* 170 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FNEG /* 171 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FPEXT /* 172 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FPTRUNC /* 173 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FPTOSI /* 174 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FPTOUI /* 175 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SITOFP /* 176 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UITOFP /* 177 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FABS /* 178 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FCOPYSIGN /* 179 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_IS_FPCLASS /* 180 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FCANONICALIZE /* 181 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FMINNUM /* 182 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FMAXNUM /* 183 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FMINNUM_IEEE /* 184 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FMAXNUM_IEEE /* 185 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FMINIMUM /* 186 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FMAXIMUM /* 187 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_PTR_ADD /* 188 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_PTRMASK /* 189 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SMIN /* 190 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SMAX /* 191 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UMIN /* 192 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UMAX /* 193 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ABS /* 194 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_LROUND /* 195 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_LLROUND /* 196 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BR /* 197 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BRJT /* 198 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_INSERT_VECTOR_ELT /* 199 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_EXTRACT_VECTOR_ELT /* 200 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SHUFFLE_VECTOR /* 201 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_CTTZ /* 202 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_CTTZ_ZERO_UNDEF /* 203 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_CTLZ /* 204 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_CTLZ_ZERO_UNDEF /* 205 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_CTPOP /* 206 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BSWAP /* 207 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BITREVERSE /* 208 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FCEIL /* 209 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FCOS /* 210 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FSIN /* 211 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FSQRT /* 212 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FFLOOR /* 213 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FRINT /* 214 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_FNEARBYINT /* 215 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_ADDRSPACE_CAST /* 216 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BLOCK_ADDR /* 217 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_JUMP_TABLE /* 218 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_DYN_STACKALLOC /* 219 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_STRICT_FADD /* 220 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_STRICT_FSUB /* 221 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_STRICT_FMUL /* 222 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_STRICT_FDIV /* 223 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_STRICT_FREM /* 224 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_STRICT_FMA /* 225 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_STRICT_FSQRT /* 226 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_READ_REGISTER /* 227 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_WRITE_REGISTER /* 228 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_MEMCPY /* 229 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_MEMCPY_INLINE /* 230 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_MEMMOVE /* 231 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_MEMSET /* 232 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_BZERO /* 233 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_SEQ_FADD /* 234 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_SEQ_FMUL /* 235 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_FADD /* 236 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_FMUL /* 237 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_FMAX /* 238 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_FMIN /* 239 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_ADD /* 240 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_MUL /* 241 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_AND /* 242 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_OR /* 243 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_XOR /* 244 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_SMAX /* 245 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_SMIN /* 246 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_UMAX /* 247 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_VECREDUCE_UMIN /* 248 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_SBFX /* 249 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_G_UBFX /* 250 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ABS /* 251 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ADDSri /* 252 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ADDSrr /* 253 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ADDSrsi /* 254 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ADDSrsr /* 255 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ADJCALLSTACKDOWN /* 256 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_ADJCALLSTACKUP /* 257 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* asr${s}${p} $Rd, $Rm, $imm */
ARM_ASRi /* 258 */, ARM_INS_ASR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* asr${s}${p} $Rd, $Rn, $Rm */
ARM_ASRr /* 259 */, ARM_INS_ASR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_B /* 260 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BCCZi64 /* 261 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BCCi64 /* 262 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BLX_noip /* 263 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BLX_pred_noip /* 264 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BL_PUSHLR /* 265 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BMOVPCB_CALL /* 266 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BMOVPCRX_CALL /* 267 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BR_JTadd /* 268 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BR_JTm_i12 /* 269 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BR_JTm_rs /* 270 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BR_JTr /* 271 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_BX_CALL /* 272 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_CMP_SWAP_16 /* 273 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_CMP_SWAP_32 /* 274 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_CMP_SWAP_64 /* 275 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_CMP_SWAP_8 /* 276 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_CONSTPOOL_ENTRY /* 277 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_COPY_STRUCT_BYVAL_I32 /* 278 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* it$mask $cc */
ARM_ITasm /* 279 */, ARM_INS_IT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_Int_eh_sjlj_dispatchsetup /* 280 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_Int_eh_sjlj_longjmp /* 281 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_Int_eh_sjlj_setjmp /* 282 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_Int_eh_sjlj_setjmp_nofp /* 283 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_Int_eh_sjlj_setup_dispatch /* 284 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_JUMPTABLE_ADDRS /* 285 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_JUMPTABLE_INSTS /* 286 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_JUMPTABLE_TBB /* 287 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_JUMPTABLE_TBH /* 288 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_LDMIA_RET /* 289 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* ldrbt${q} $Rt, $addr */
ARM_LDRBT_POST /* 290 */, ARM_INS_LDRBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldr${q} $Rt, $immediate */
ARM_LDRConstPool /* 291 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrht${p} $Rt, $addr */
ARM_LDRHTii /* 292 */, ARM_INS_LDRHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_LDRLIT_ga_abs /* 293 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_LDRLIT_ga_pcrel /* 294 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_LDRLIT_ga_pcrel_ldr /* 295 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* ldrsbt${p} $Rt, $addr */
ARM_LDRSBTii /* 296 */, ARM_INS_LDRSBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsht${p} $Rt, $addr */
ARM_LDRSHTii /* 297 */, ARM_INS_LDRSHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrt${q} $Rt, $addr */
ARM_LDRT_POST /* 298 */, ARM_INS_LDRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_LEApcrel /* 299 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_LEApcrelJT /* 300 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_LOADDUAL /* 301 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* lsl${s}${p} $Rd, $Rm, $imm */
ARM_LSLi /* 302 */, ARM_INS_LSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* lsl${s}${p} $Rd, $Rn, $Rm */
ARM_LSLr /* 303 */, ARM_INS_LSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* lsr${s}${p} $Rd, $Rm, $imm */
ARM_LSRi /* 304 */, ARM_INS_LSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* lsr${s}${p} $Rd, $Rn, $Rm */
ARM_LSRr /* 305 */, ARM_INS_LSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MEMCPY /* 306 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MLAv5 /* 307 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVCCi /* 308 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVCCi16 /* 309 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVCCi32imm /* 310 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVCCr /* 311 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVCCsi /* 312 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVCCsr /* 313 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVPCRX /* 314 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVTi16_ga_pcrel /* 315 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOV_ga_pcrel /* 316 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOV_ga_pcrel_ldr /* 317 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVi16_ga_pcrel /* 318 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVi32imm /* 319 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVsra_flag /* 320 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MOVsrl_flag /* 321 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MQPRCopy /* 322 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MQQPRLoad /* 323 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MQQPRStore /* 324 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MQQQQPRLoad /* 325 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MQQQQPRStore /* 326 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MULv5 /* 327 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MVE_MEMCPYLOOPINST /* 328 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MVE_MEMSETLOOPINST /* 329 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_MVNCCi /* 330 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PICADD /* 331 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PICLDR /* 332 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PICLDRB /* 333 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PICLDRH /* 334 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PICLDRSB /* 335 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PICLDRSH /* 336 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PICSTR /* 337 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PICSTRB /* 338 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_PICSTRH /* 339 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* ror${s}${p} $Rd, $Rm, $imm */
ARM_RORi /* 340 */, ARM_INS_ROR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ror${s}${p} $Rd, $Rn, $Rm */
ARM_RORr /* 341 */, ARM_INS_ROR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_RRX /* 342 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* rrx${s}${p} $Rd, $Rm */
ARM_RRXi /* 343 */, ARM_INS_RRX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_RSBSri /* 344 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_RSBSrsi /* 345 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_RSBSrsr /* 346 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_EpilogEnd /* 347 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_EpilogStart /* 348 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_Nop /* 349 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_Nop_Ret /* 350 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_PrologEnd /* 351 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_SaveFRegs /* 352 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_SaveLR /* 353 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_SaveRegs /* 354 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_SaveRegs_Ret /* 355 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_SaveSP /* 356 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SEH_StackAlloc /* 357 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SMLALv5 /* 358 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SMULLv5 /* 359 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SPACE /* 360 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_STOREDUAL /* 361 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* strbt${q} $Rt, $addr */
ARM_STRBT_POST /* 362 */, ARM_INS_STRBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_STRBi_preidx /* 363 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_STRBr_preidx /* 364 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_STRH_preidx /* 365 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* strt${q} $Rt, $addr */
ARM_STRT_POST /* 366 */, ARM_INS_STRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_STRi_preidx /* 367 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_STRr_preidx /* 368 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SUBS_PC_LR /* 369 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SUBSri /* 370 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SUBSrr /* 371 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SUBSrsi /* 372 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SUBSrsr /* 373 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SpeculationBarrierISBDSBEndBB /* 374 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_SpeculationBarrierSBEndBB /* 375 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_TAILJMPd /* 376 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_TAILJMPr /* 377 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_TAILJMPr4 /* 378 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_TCRETURNdi /* 379 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_TCRETURNri /* 380 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_TPsoft /* 381 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_UMLALv5 /* 382 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_UMULLv5 /* 383 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $list, $addr */
ARM_VLD1LNdAsm_16 /* 384 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $list, $addr */
ARM_VLD1LNdAsm_32 /* 385 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $list, $addr */
ARM_VLD1LNdAsm_8 /* 386 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $list, $addr! */
ARM_VLD1LNdWB_fixed_Asm_16 /* 387 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $list, $addr! */
ARM_VLD1LNdWB_fixed_Asm_32 /* 388 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $list, $addr! */
ARM_VLD1LNdWB_fixed_Asm_8 /* 389 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $list, $addr, $Rm */
ARM_VLD1LNdWB_register_Asm_16 /* 390 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $list, $addr, $Rm */
ARM_VLD1LNdWB_register_Asm_32 /* 391 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $list, $addr, $Rm */
ARM_VLD1LNdWB_register_Asm_8 /* 392 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $list, $addr */
ARM_VLD2LNdAsm_16 /* 393 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $list, $addr */
ARM_VLD2LNdAsm_32 /* 394 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $list, $addr */
ARM_VLD2LNdAsm_8 /* 395 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $list, $addr! */
ARM_VLD2LNdWB_fixed_Asm_16 /* 396 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $list, $addr! */
ARM_VLD2LNdWB_fixed_Asm_32 /* 397 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $list, $addr! */
ARM_VLD2LNdWB_fixed_Asm_8 /* 398 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $list, $addr, $Rm */
ARM_VLD2LNdWB_register_Asm_16 /* 399 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $list, $addr, $Rm */
ARM_VLD2LNdWB_register_Asm_32 /* 400 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $list, $addr, $Rm */
ARM_VLD2LNdWB_register_Asm_8 /* 401 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $list, $addr */
ARM_VLD2LNqAsm_16 /* 402 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $list, $addr */
ARM_VLD2LNqAsm_32 /* 403 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $list, $addr! */
ARM_VLD2LNqWB_fixed_Asm_16 /* 404 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $list, $addr! */
ARM_VLD2LNqWB_fixed_Asm_32 /* 405 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $list, $addr, $Rm */
ARM_VLD2LNqWB_register_Asm_16 /* 406 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $list, $addr, $Rm */
ARM_VLD2LNqWB_register_Asm_32 /* 407 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr */
ARM_VLD3DUPdAsm_16 /* 408 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr */
ARM_VLD3DUPdAsm_32 /* 409 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr */
ARM_VLD3DUPdAsm_8 /* 410 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr! */
ARM_VLD3DUPdWB_fixed_Asm_16 /* 411 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr! */
ARM_VLD3DUPdWB_fixed_Asm_32 /* 412 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr! */
ARM_VLD3DUPdWB_fixed_Asm_8 /* 413 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr, $Rm */
ARM_VLD3DUPdWB_register_Asm_16 /* 414 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr, $Rm */
ARM_VLD3DUPdWB_register_Asm_32 /* 415 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr, $Rm */
ARM_VLD3DUPdWB_register_Asm_8 /* 416 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr */
ARM_VLD3DUPqAsm_16 /* 417 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr */
ARM_VLD3DUPqAsm_32 /* 418 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr */
ARM_VLD3DUPqAsm_8 /* 419 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr! */
ARM_VLD3DUPqWB_fixed_Asm_16 /* 420 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr! */
ARM_VLD3DUPqWB_fixed_Asm_32 /* 421 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr! */
ARM_VLD3DUPqWB_fixed_Asm_8 /* 422 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr, $Rm */
ARM_VLD3DUPqWB_register_Asm_16 /* 423 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr, $Rm */
ARM_VLD3DUPqWB_register_Asm_32 /* 424 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr, $Rm */
ARM_VLD3DUPqWB_register_Asm_8 /* 425 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr */
ARM_VLD3LNdAsm_16 /* 426 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr */
ARM_VLD3LNdAsm_32 /* 427 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr */
ARM_VLD3LNdAsm_8 /* 428 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr! */
ARM_VLD3LNdWB_fixed_Asm_16 /* 429 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr! */
ARM_VLD3LNdWB_fixed_Asm_32 /* 430 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr! */
ARM_VLD3LNdWB_fixed_Asm_8 /* 431 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr, $Rm */
ARM_VLD3LNdWB_register_Asm_16 /* 432 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr, $Rm */
ARM_VLD3LNdWB_register_Asm_32 /* 433 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr, $Rm */
ARM_VLD3LNdWB_register_Asm_8 /* 434 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr */
ARM_VLD3LNqAsm_16 /* 435 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr */
ARM_VLD3LNqAsm_32 /* 436 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr! */
ARM_VLD3LNqWB_fixed_Asm_16 /* 437 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr! */
ARM_VLD3LNqWB_fixed_Asm_32 /* 438 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr, $Rm */
ARM_VLD3LNqWB_register_Asm_16 /* 439 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr, $Rm */
ARM_VLD3LNqWB_register_Asm_32 /* 440 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr */
ARM_VLD3dAsm_16 /* 441 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr */
ARM_VLD3dAsm_32 /* 442 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr */
ARM_VLD3dAsm_8 /* 443 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr! */
ARM_VLD3dWB_fixed_Asm_16 /* 444 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr! */
ARM_VLD3dWB_fixed_Asm_32 /* 445 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr! */
ARM_VLD3dWB_fixed_Asm_8 /* 446 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr, $Rm */
ARM_VLD3dWB_register_Asm_16 /* 447 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr, $Rm */
ARM_VLD3dWB_register_Asm_32 /* 448 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr, $Rm */
ARM_VLD3dWB_register_Asm_8 /* 449 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr */
ARM_VLD3qAsm_16 /* 450 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr */
ARM_VLD3qAsm_32 /* 451 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr */
ARM_VLD3qAsm_8 /* 452 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr! */
ARM_VLD3qWB_fixed_Asm_16 /* 453 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr! */
ARM_VLD3qWB_fixed_Asm_32 /* 454 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr! */
ARM_VLD3qWB_fixed_Asm_8 /* 455 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 $list, $addr, $Rm */
ARM_VLD3qWB_register_Asm_16 /* 456 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 $list, $addr, $Rm */
ARM_VLD3qWB_register_Asm_32 /* 457 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 $list, $addr, $Rm */
ARM_VLD3qWB_register_Asm_8 /* 458 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr */
ARM_VLD4DUPdAsm_16 /* 459 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr */
ARM_VLD4DUPdAsm_32 /* 460 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr */
ARM_VLD4DUPdAsm_8 /* 461 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr! */
ARM_VLD4DUPdWB_fixed_Asm_16 /* 462 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr! */
ARM_VLD4DUPdWB_fixed_Asm_32 /* 463 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr! */
ARM_VLD4DUPdWB_fixed_Asm_8 /* 464 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr, $Rm */
ARM_VLD4DUPdWB_register_Asm_16 /* 465 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr, $Rm */
ARM_VLD4DUPdWB_register_Asm_32 /* 466 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr, $Rm */
ARM_VLD4DUPdWB_register_Asm_8 /* 467 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr */
ARM_VLD4DUPqAsm_16 /* 468 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr */
ARM_VLD4DUPqAsm_32 /* 469 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr */
ARM_VLD4DUPqAsm_8 /* 470 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr! */
ARM_VLD4DUPqWB_fixed_Asm_16 /* 471 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr! */
ARM_VLD4DUPqWB_fixed_Asm_32 /* 472 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr! */
ARM_VLD4DUPqWB_fixed_Asm_8 /* 473 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr, $Rm */
ARM_VLD4DUPqWB_register_Asm_16 /* 474 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr, $Rm */
ARM_VLD4DUPqWB_register_Asm_32 /* 475 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr, $Rm */
ARM_VLD4DUPqWB_register_Asm_8 /* 476 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr */
ARM_VLD4LNdAsm_16 /* 477 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr */
ARM_VLD4LNdAsm_32 /* 478 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr */
ARM_VLD4LNdAsm_8 /* 479 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr! */
ARM_VLD4LNdWB_fixed_Asm_16 /* 480 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr! */
ARM_VLD4LNdWB_fixed_Asm_32 /* 481 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr! */
ARM_VLD4LNdWB_fixed_Asm_8 /* 482 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr, $Rm */
ARM_VLD4LNdWB_register_Asm_16 /* 483 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr, $Rm */
ARM_VLD4LNdWB_register_Asm_32 /* 484 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr, $Rm */
ARM_VLD4LNdWB_register_Asm_8 /* 485 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr */
ARM_VLD4LNqAsm_16 /* 486 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr */
ARM_VLD4LNqAsm_32 /* 487 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr! */
ARM_VLD4LNqWB_fixed_Asm_16 /* 488 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr! */
ARM_VLD4LNqWB_fixed_Asm_32 /* 489 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr, $Rm */
ARM_VLD4LNqWB_register_Asm_16 /* 490 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr, $Rm */
ARM_VLD4LNqWB_register_Asm_32 /* 491 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr */
ARM_VLD4dAsm_16 /* 492 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr */
ARM_VLD4dAsm_32 /* 493 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr */
ARM_VLD4dAsm_8 /* 494 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr! */
ARM_VLD4dWB_fixed_Asm_16 /* 495 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr! */
ARM_VLD4dWB_fixed_Asm_32 /* 496 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr! */
ARM_VLD4dWB_fixed_Asm_8 /* 497 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr, $Rm */
ARM_VLD4dWB_register_Asm_16 /* 498 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr, $Rm */
ARM_VLD4dWB_register_Asm_32 /* 499 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr, $Rm */
ARM_VLD4dWB_register_Asm_8 /* 500 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr */
ARM_VLD4qAsm_16 /* 501 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr */
ARM_VLD4qAsm_32 /* 502 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr */
ARM_VLD4qAsm_8 /* 503 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr! */
ARM_VLD4qWB_fixed_Asm_16 /* 504 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr! */
ARM_VLD4qWB_fixed_Asm_32 /* 505 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr! */
ARM_VLD4qWB_fixed_Asm_8 /* 506 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 $list, $addr, $Rm */
ARM_VLD4qWB_register_Asm_16 /* 507 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 $list, $addr, $Rm */
ARM_VLD4qWB_register_Asm_32 /* 508 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 $list, $addr, $Rm */
ARM_VLD4qWB_register_Asm_8 /* 509 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VMOVD0 /* 510 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VMOVDcc /* 511 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VMOVHcc /* 512 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VMOVQ0 /* 513 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VMOVScc /* 514 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $list, $addr */
ARM_VST1LNdAsm_16 /* 515 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $list, $addr */
ARM_VST1LNdAsm_32 /* 516 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $list, $addr */
ARM_VST1LNdAsm_8 /* 517 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $list, $addr! */
ARM_VST1LNdWB_fixed_Asm_16 /* 518 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $list, $addr! */
ARM_VST1LNdWB_fixed_Asm_32 /* 519 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $list, $addr! */
ARM_VST1LNdWB_fixed_Asm_8 /* 520 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $list, $addr, $Rm */
ARM_VST1LNdWB_register_Asm_16 /* 521 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $list, $addr, $Rm */
ARM_VST1LNdWB_register_Asm_32 /* 522 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $list, $addr, $Rm */
ARM_VST1LNdWB_register_Asm_8 /* 523 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $list, $addr */
ARM_VST2LNdAsm_16 /* 524 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $list, $addr */
ARM_VST2LNdAsm_32 /* 525 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $list, $addr */
ARM_VST2LNdAsm_8 /* 526 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $list, $addr! */
ARM_VST2LNdWB_fixed_Asm_16 /* 527 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $list, $addr! */
ARM_VST2LNdWB_fixed_Asm_32 /* 528 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $list, $addr! */
ARM_VST2LNdWB_fixed_Asm_8 /* 529 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $list, $addr, $Rm */
ARM_VST2LNdWB_register_Asm_16 /* 530 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $list, $addr, $Rm */
ARM_VST2LNdWB_register_Asm_32 /* 531 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $list, $addr, $Rm */
ARM_VST2LNdWB_register_Asm_8 /* 532 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $list, $addr */
ARM_VST2LNqAsm_16 /* 533 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $list, $addr */
ARM_VST2LNqAsm_32 /* 534 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $list, $addr! */
ARM_VST2LNqWB_fixed_Asm_16 /* 535 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $list, $addr! */
ARM_VST2LNqWB_fixed_Asm_32 /* 536 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $list, $addr, $Rm */
ARM_VST2LNqWB_register_Asm_16 /* 537 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $list, $addr, $Rm */
ARM_VST2LNqWB_register_Asm_32 /* 538 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr */
ARM_VST3LNdAsm_16 /* 539 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr */
ARM_VST3LNdAsm_32 /* 540 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 $list, $addr */
ARM_VST3LNdAsm_8 /* 541 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr! */
ARM_VST3LNdWB_fixed_Asm_16 /* 542 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr! */
ARM_VST3LNdWB_fixed_Asm_32 /* 543 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 $list, $addr! */
ARM_VST3LNdWB_fixed_Asm_8 /* 544 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr, $Rm */
ARM_VST3LNdWB_register_Asm_16 /* 545 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr, $Rm */
ARM_VST3LNdWB_register_Asm_32 /* 546 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 $list, $addr, $Rm */
ARM_VST3LNdWB_register_Asm_8 /* 547 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr */
ARM_VST3LNqAsm_16 /* 548 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr */
ARM_VST3LNqAsm_32 /* 549 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr! */
ARM_VST3LNqWB_fixed_Asm_16 /* 550 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr! */
ARM_VST3LNqWB_fixed_Asm_32 /* 551 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr, $Rm */
ARM_VST3LNqWB_register_Asm_16 /* 552 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr, $Rm */
ARM_VST3LNqWB_register_Asm_32 /* 553 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr */
ARM_VST3dAsm_16 /* 554 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr */
ARM_VST3dAsm_32 /* 555 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 $list, $addr */
ARM_VST3dAsm_8 /* 556 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr! */
ARM_VST3dWB_fixed_Asm_16 /* 557 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr! */
ARM_VST3dWB_fixed_Asm_32 /* 558 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 $list, $addr! */
ARM_VST3dWB_fixed_Asm_8 /* 559 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr, $Rm */
ARM_VST3dWB_register_Asm_16 /* 560 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr, $Rm */
ARM_VST3dWB_register_Asm_32 /* 561 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 $list, $addr, $Rm */
ARM_VST3dWB_register_Asm_8 /* 562 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr */
ARM_VST3qAsm_16 /* 563 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr */
ARM_VST3qAsm_32 /* 564 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 $list, $addr */
ARM_VST3qAsm_8 /* 565 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr! */
ARM_VST3qWB_fixed_Asm_16 /* 566 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr! */
ARM_VST3qWB_fixed_Asm_32 /* 567 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 $list, $addr! */
ARM_VST3qWB_fixed_Asm_8 /* 568 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 $list, $addr, $Rm */
ARM_VST3qWB_register_Asm_16 /* 569 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 $list, $addr, $Rm */
ARM_VST3qWB_register_Asm_32 /* 570 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 $list, $addr, $Rm */
ARM_VST3qWB_register_Asm_8 /* 571 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr */
ARM_VST4LNdAsm_16 /* 572 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr */
ARM_VST4LNdAsm_32 /* 573 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 $list, $addr */
ARM_VST4LNdAsm_8 /* 574 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr! */
ARM_VST4LNdWB_fixed_Asm_16 /* 575 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr! */
ARM_VST4LNdWB_fixed_Asm_32 /* 576 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 $list, $addr! */
ARM_VST4LNdWB_fixed_Asm_8 /* 577 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr, $Rm */
ARM_VST4LNdWB_register_Asm_16 /* 578 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr, $Rm */
ARM_VST4LNdWB_register_Asm_32 /* 579 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 $list, $addr, $Rm */
ARM_VST4LNdWB_register_Asm_8 /* 580 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr */
ARM_VST4LNqAsm_16 /* 581 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr */
ARM_VST4LNqAsm_32 /* 582 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr! */
ARM_VST4LNqWB_fixed_Asm_16 /* 583 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr! */
ARM_VST4LNqWB_fixed_Asm_32 /* 584 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr, $Rm */
ARM_VST4LNqWB_register_Asm_16 /* 585 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr, $Rm */
ARM_VST4LNqWB_register_Asm_32 /* 586 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr */
ARM_VST4dAsm_16 /* 587 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr */
ARM_VST4dAsm_32 /* 588 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 $list, $addr */
ARM_VST4dAsm_8 /* 589 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr! */
ARM_VST4dWB_fixed_Asm_16 /* 590 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr! */
ARM_VST4dWB_fixed_Asm_32 /* 591 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 $list, $addr! */
ARM_VST4dWB_fixed_Asm_8 /* 592 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr, $Rm */
ARM_VST4dWB_register_Asm_16 /* 593 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr, $Rm */
ARM_VST4dWB_register_Asm_32 /* 594 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 $list, $addr, $Rm */
ARM_VST4dWB_register_Asm_8 /* 595 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr */
ARM_VST4qAsm_16 /* 596 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr */
ARM_VST4qAsm_32 /* 597 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 $list, $addr */
ARM_VST4qAsm_8 /* 598 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr! */
ARM_VST4qWB_fixed_Asm_16 /* 599 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr! */
ARM_VST4qWB_fixed_Asm_32 /* 600 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 $list, $addr! */
ARM_VST4qWB_fixed_Asm_8 /* 601 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 $list, $addr, $Rm */
ARM_VST4qWB_register_Asm_16 /* 602 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 $list, $addr, $Rm */
ARM_VST4qWB_register_Asm_32 /* 603 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 $list, $addr, $Rm */
ARM_VST4qWB_register_Asm_8 /* 604 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_WIN__CHKSTK /* 605 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_WIN__DBZCHK /* 606 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2ABS /* 607 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2ADDSri /* 608 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2ADDSrr /* 609 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2ADDSrs /* 610 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2BF_LabelPseudo /* 611 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2BR_JT /* 612 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2CALL_BTI /* 613 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2DoLoopStart /* 614 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2DoLoopStartTP /* 615 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2LDMIA_RET /* 616 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr */
ARM_t2LDRBpcrel /* 617 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $immediate */
ARM_t2LDRConstPool /* 618 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrh${p} $Rt, $addr */
ARM_t2LDRHpcrel /* 619 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2LDRLIT_ga_pcrel /* 620 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* ldrsb${p} $Rt, $addr */
ARM_t2LDRSBpcrel /* 621 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsh${p} $Rt, $addr */
ARM_t2LDRSHpcrel /* 622 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldr${p}.w $Rt, $Rn, $imm */
ARM_t2LDR_POST_imm /* 623 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldr${p}.w $Rt, $addr! */
ARM_t2LDR_PRE_imm /* 624 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2LDRpci_pic /* 625 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr */
ARM_t2LDRpcrel /* 626 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2LEApcrel /* 627 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2LEApcrelJT /* 628 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2LoopDec /* 629 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2LoopEnd /* 630 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2LoopEndDec /* 631 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVCCasr /* 632 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVCCi /* 633 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVCCi16 /* 634 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVCCi32imm /* 635 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVCClsl /* 636 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVCClsr /* 637 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVCCr /* 638 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVCCror /* 639 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* movs${p} $Rd, $shift */
ARM_t2MOVSsi /* 640 */, ARM_INS_MOVS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* movs${p} $Rd, $shift */
ARM_t2MOVSsr /* 641 */, ARM_INS_MOVS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVTi16_ga_pcrel /* 642 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOV_ga_pcrel /* 643 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVi16_ga_pcrel /* 644 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MOVi32imm /* 645 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* mov${p} $Rd, $shift */
ARM_t2MOVsi /* 646 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mov${p} $Rd, $shift */
ARM_t2MOVsr /* 647 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2MVNCCi /* 648 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2RSBSri /* 649 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2RSBSrs /* 650 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2STRB_preidx /* 651 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2STRH_preidx /* 652 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* str${p}.w $Rt, $Rn, $imm */
ARM_t2STR_POST_imm /* 653 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* str${p}.w $Rt, $addr! */
ARM_t2STR_PRE_imm /* 654 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2STR_preidx /* 655 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2SUBSri /* 656 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2SUBSrr /* 657 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2SUBSrs /* 658 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2SpeculationBarrierISBDSBEndBB /* 659 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2SpeculationBarrierSBEndBB /* 660 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2TBB_JT /* 661 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2TBH_JT /* 662 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2WhileLoopSetup /* 663 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2WhileLoopStart /* 664 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2WhileLoopStartLR /* 665 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2WhileLoopStartTP /* 666 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tADCS /* 667 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tADDSi3 /* 668 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tADDSi8 /* 669 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tADDSrr /* 670 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tADDframe /* 671 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tADJCALLSTACKDOWN /* 672 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tADJCALLSTACKUP /* 673 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBLXNS_CALL /* 674 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBLXr_noip /* 675 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBL_PUSHLR /* 676 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBRIND /* 677 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBR_JTr /* 678 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBXNS_RET /* 679 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBX_CALL /* 680 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBX_RET /* 681 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBX_RET_vararg /* 682 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tBfar /* 683 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tCMP_SWAP_16 /* 684 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tCMP_SWAP_32 /* 685 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tCMP_SWAP_8 /* 686 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tLDMIA_UPD /* 687 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $immediate */
ARM_tLDRConstPool /* 688 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tLDRLIT_ga_abs /* 689 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tLDRLIT_ga_pcrel /* 690 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tLDR_postidx /* 691 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tLDRpci_pic /* 692 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tLEApcrel /* 693 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tLEApcrelJT /* 694 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tLSLSri /* 695 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tMOVCCr_pseudo /* 696 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tPOP_RET /* 697 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tRSBS /* 698 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tSBCS /* 699 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tSUBSi3 /* 700 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tSUBSi8 /* 701 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tSUBSrr /* 702 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tTAILJMPd /* 703 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tTAILJMPdND /* 704 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tTAILJMPr /* 705 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tTBB_JT /* 706 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tTBH_JT /* 707 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tTPsoft /* 708 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* adc${s}${p} $Rd, $Rn, $imm */
ARM_ADCri /* 709 */, ARM_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* adc${s}${p} $Rd, $Rn, $Rm */
ARM_ADCrr /* 710 */, ARM_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* adc${s}${p} $Rd, $Rn, $shift */
ARM_ADCrsi /* 711 */, ARM_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* adc${s}${p} $Rd, $Rn, $shift */
ARM_ADCrsr /* 712 */, ARM_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* add${s}${p} $Rd, $Rn, $imm */
ARM_ADDri /* 713 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* add${s}${p} $Rd, $Rn, $Rm */
ARM_ADDrr /* 714 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* add${s}${p} $Rd, $Rn, $shift */
ARM_ADDrsi /* 715 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* add${s}${p} $Rd, $Rn, $shift */
ARM_ADDrsr /* 716 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* adr${p} $Rd, $label */
ARM_ADR /* 717 */, ARM_INS_ADR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* aesd.8 $Vd, $Vm */
ARM_AESD /* 718 */, ARM_INS_AESD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasAES, 0 }, 0, 0
#endif
},
{
/* aese.8 $Vd, $Vm */
ARM_AESE /* 719 */, ARM_INS_AESE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasAES, 0 }, 0, 0
#endif
},
{
/* aesimc.8 $Vd, $Vm */
ARM_AESIMC /* 720 */, ARM_INS_AESIMC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasAES, 0 }, 0, 0
#endif
},
{
/* aesmc.8 $Vd, $Vm */
ARM_AESMC /* 721 */, ARM_INS_AESMC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasAES, 0 }, 0, 0
#endif
},
{
/* and${s}${p} $Rd, $Rn, $imm */
ARM_ANDri /* 722 */, ARM_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* and${s}${p} $Rd, $Rn, $Rm */
ARM_ANDrr /* 723 */, ARM_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* and${s}${p} $Rd, $Rn, $shift */
ARM_ANDrsi /* 724 */, ARM_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* and${s}${p} $Rd, $Rn, $shift */
ARM_ANDrsr /* 725 */, ARM_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* vdot.bf16 $Vd, $Vn, $Vm$lane */
ARM_BF16VDOTI_VDOTD /* 726 */, ARM_INS_VDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdot.bf16 $Vd, $Vn, $Vm$lane */
ARM_BF16VDOTI_VDOTQ /* 727 */, ARM_INS_VDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdot.bf16 $Vd, $Vn, $Vm */
ARM_BF16VDOTS_VDOTD /* 728 */, ARM_INS_VDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdot.bf16 $Vd, $Vn, $Vm */
ARM_BF16VDOTS_VDOTQ /* 729 */, ARM_INS_VDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.bf16.f32 $Vd, $Vm */
ARM_BF16_VCVT /* 730 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtb${p}.bf16.f32 $Sd, $Sm */
ARM_BF16_VCVTB /* 731 */, ARM_INS_VCVTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, 0 }, 0, 0
#endif
},
{
/* vcvtt${p}.bf16.f32 $Sd, $Sm */
ARM_BF16_VCVTT /* 732 */, ARM_INS_VCVTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, 0 }, 0, 0
#endif
},
{
/* bfc${p} $Rd, $imm */
ARM_BFC /* 733 */, ARM_INS_BFC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6T2, 0 }, 0, 0
#endif
},
{
/* bfi${p} $Rd, $Rn, $imm */
ARM_BFI /* 734 */, ARM_INS_BFI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6T2, 0 }, 0, 0
#endif
},
{
/* bic${s}${p} $Rd, $Rn, $imm */
ARM_BICri /* 735 */, ARM_INS_BIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* bic${s}${p} $Rd, $Rn, $Rm */
ARM_BICrr /* 736 */, ARM_INS_BIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* bic${s}${p} $Rd, $Rn, $shift */
ARM_BICrsi /* 737 */, ARM_INS_BIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* bic${s}${p} $Rd, $Rn, $shift */
ARM_BICrsr /* 738 */, ARM_INS_BIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* bkpt $val */
ARM_BKPT /* 739 */, ARM_INS_BKPT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* bl $func */
ARM_BL /* 740 */, ARM_INS_BL,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_CALL, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* blx $func */
ARM_BLX /* 741 */, ARM_INS_BLX,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_CALL, ARM_FEATURE_IsARM, ARM_FEATURE_HasV5T, 0 }, 0, 0
#endif
},
{
/* blx${p} $func */
ARM_BLX_pred /* 742 */, ARM_INS_BLX,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_CALL, ARM_FEATURE_IsARM, ARM_FEATURE_HasV5T, 0 }, 0, 0
#endif
},
{
/* blx $target */
ARM_BLXi /* 743 */, ARM_INS_BLX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_CALL, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsARM, ARM_FEATURE_HasV5T, 0 }, 0, 0
#endif
},
{
/* bl${p} $func */
ARM_BL_pred /* 744 */, ARM_INS_BL,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_CALL, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* bx $dst */
ARM_BX /* 745 */, ARM_INS_BX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_FEATURE_IsARM, ARM_FEATURE_HasV4T, 0 }, 1, 1
#endif
},
{
/* bxj${p} $func */
ARM_BXJ /* 746 */, ARM_INS_BXJ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_FEATURE_IsARM, 0 }, 1, 1
#endif
},
{
/* bx${p} lr */
ARM_BX_RET /* 747 */, ARM_INS_BX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_RET, ARM_FEATURE_IsARM, ARM_FEATURE_HasV4T, 0 }, 1, 0
#endif
},
{
/* bx${p} $dst */
ARM_BX_pred /* 748 */, ARM_INS_BX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_FEATURE_IsARM, ARM_FEATURE_HasV4T, 0 }, 1, 1
#endif
},
{
/* b${p} $target */
ARM_Bcc /* 749 */, ARM_INS_B,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsARM, 0 }, 1, 0
#endif
},
{
/* cx1 $coproc, $Rd, $imm */
ARM_CDE_CX1 /* 750 */, ARM_INS_CX1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx1a${p} $coproc, $Rd, $imm */
ARM_CDE_CX1A /* 751 */, ARM_INS_CX1A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx1d $coproc, $Rd, $imm */
ARM_CDE_CX1D /* 752 */, ARM_INS_CX1D,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx1da${p} $coproc, $Rd, $imm */
ARM_CDE_CX1DA /* 753 */, ARM_INS_CX1DA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx2 $coproc, $Rd, $Rn, $imm */
ARM_CDE_CX2 /* 754 */, ARM_INS_CX2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx2a${p} $coproc, $Rd, $Rn, $imm */
ARM_CDE_CX2A /* 755 */, ARM_INS_CX2A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx2d $coproc, $Rd, $Rn, $imm */
ARM_CDE_CX2D /* 756 */, ARM_INS_CX2D,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx2da${p} $coproc, $Rd, $Rn, $imm */
ARM_CDE_CX2DA /* 757 */, ARM_INS_CX2DA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx3 $coproc, $Rd, $Rn, $Rm, $imm */
ARM_CDE_CX3 /* 758 */, ARM_INS_CX3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx3a${p} $coproc, $Rd, $Rn, $Rm, $imm */
ARM_CDE_CX3A /* 759 */, ARM_INS_CX3A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx3d $coproc, $Rd, $Rn, $Rm, $imm */
ARM_CDE_CX3D /* 760 */, ARM_INS_CX3D,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* cx3da${p} $coproc, $Rd, $Rn, $Rm, $imm */
ARM_CDE_CX3DA /* 761 */, ARM_INS_CX3DA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, 0 }, 0, 0
#endif
},
{
/* vcx1a $coproc, $Vd, $imm */
ARM_CDE_VCX1A_fpdp /* 762 */, ARM_INS_VCX1A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx1a $coproc, $Vd, $imm */
ARM_CDE_VCX1A_fpsp /* 763 */, ARM_INS_VCX1A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx1a${vp} $coproc, $Qd, $imm */
ARM_CDE_VCX1A_vec /* 764 */, ARM_INS_VCX1A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcx1 $coproc, $Vd, $imm */
ARM_CDE_VCX1_fpdp /* 765 */, ARM_INS_VCX1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx1 $coproc, $Vd, $imm */
ARM_CDE_VCX1_fpsp /* 766 */, ARM_INS_VCX1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx1${vp} $coproc, $Qd, $imm */
ARM_CDE_VCX1_vec /* 767 */, ARM_INS_VCX1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcx2a $coproc, $Vd, $Vm, $imm */
ARM_CDE_VCX2A_fpdp /* 768 */, ARM_INS_VCX2A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx2a $coproc, $Vd, $Vm, $imm */
ARM_CDE_VCX2A_fpsp /* 769 */, ARM_INS_VCX2A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx2a${vp} $coproc, $Qd, $Qm, $imm */
ARM_CDE_VCX2A_vec /* 770 */, ARM_INS_VCX2A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcx2 $coproc, $Vd, $Vm, $imm */
ARM_CDE_VCX2_fpdp /* 771 */, ARM_INS_VCX2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx2 $coproc, $Vd, $Vm, $imm */
ARM_CDE_VCX2_fpsp /* 772 */, ARM_INS_VCX2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx2${vp} $coproc, $Qd, $Qm, $imm */
ARM_CDE_VCX2_vec /* 773 */, ARM_INS_VCX2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcx3a $coproc, $Vd, $Vn, $Vm, $imm */
ARM_CDE_VCX3A_fpdp /* 774 */, ARM_INS_VCX3A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx3a $coproc, $Vd, $Vn, $Vm, $imm */
ARM_CDE_VCX3A_fpsp /* 775 */, ARM_INS_VCX3A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx3a${vp} $coproc, $Qd, $Qn, $Qm, $imm */
ARM_CDE_VCX3A_vec /* 776 */, ARM_INS_VCX3A,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcx3 $coproc, $Vd, $Vn, $Vm, $imm */
ARM_CDE_VCX3_fpdp /* 777 */, ARM_INS_VCX3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx3 $coproc, $Vd, $Vn, $Vm, $imm */
ARM_CDE_VCX3_fpsp /* 778 */, ARM_INS_VCX3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vcx3${vp} $coproc, $Qd, $Qn, $Qm, $imm */
ARM_CDE_VCX3_vec /* 779 */, ARM_INS_VCX3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasCDE, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* cdp${p} $cop, $opc1, $CRd, $CRn, $CRm, $opc2 */
ARM_CDP /* 780 */, ARM_INS_CDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* cdp2 $cop, $opc1, $CRd, $CRn, $CRm, $opc2 */
ARM_CDP2 /* 781 */, ARM_INS_CDP2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* clrex */
ARM_CLREX /* 782 */, ARM_INS_CLREX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6K, 0 }, 0, 0
#endif
},
{
/* clz${p} $Rd, $Rm */
ARM_CLZ /* 783 */, ARM_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5T, 0 }, 0, 0
#endif
},
{
/* cmn${p} $Rn, $imm */
ARM_CMNri /* 784 */, ARM_INS_CMN,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cmn${p} $Rn, $Rm */
ARM_CMNzrr /* 785 */, ARM_INS_CMN,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cmn${p} $Rn, $shift */
ARM_CMNzrsi /* 786 */, ARM_INS_CMN,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cmn${p} $Rn, $shift */
ARM_CMNzrsr /* 787 */, ARM_INS_CMN,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cmp${p} $Rn, $imm */
ARM_CMPri /* 788 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cmp${p} $Rn, $Rm */
ARM_CMPrr /* 789 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cmp${p} $Rn, $shift */
ARM_CMPrsi /* 790 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cmp${p} $Rn, $shift */
ARM_CMPrsr /* 791 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cps $mode */
ARM_CPS1p /* 792 */, ARM_INS_CPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cps$imod $iflags */
ARM_CPS2p /* 793 */, ARM_INS_CPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* cps$imod $iflags, $mode */
ARM_CPS3p /* 794 */, ARM_INS_CPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* crc32b $Rd, $Rn, $Rm */
ARM_CRC32B /* 795 */, ARM_INS_CRC32B,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32cb $Rd, $Rn, $Rm */
ARM_CRC32CB /* 796 */, ARM_INS_CRC32CB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32ch $Rd, $Rn, $Rm */
ARM_CRC32CH /* 797 */, ARM_INS_CRC32CH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32cw $Rd, $Rn, $Rm */
ARM_CRC32CW /* 798 */, ARM_INS_CRC32CW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32h $Rd, $Rn, $Rm */
ARM_CRC32H /* 799 */, ARM_INS_CRC32H,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32w $Rd, $Rn, $Rm */
ARM_CRC32W /* 800 */, ARM_INS_CRC32W,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* dbg${p} $opt */
ARM_DBG /* 801 */, ARM_INS_DBG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV7, 0 }, 0, 0
#endif
},
{
/* dmb $opt */
ARM_DMB /* 802 */, ARM_INS_DMB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasDB, 0 }, 0, 0
#endif
},
{
/* dsb $opt */
ARM_DSB /* 803 */, ARM_INS_DSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasDB, 0 }, 0, 0
#endif
},
{
/* eor${s}${p} $Rd, $Rn, $imm */
ARM_EORri /* 804 */, ARM_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* eor${s}${p} $Rd, $Rn, $Rm */
ARM_EORrr /* 805 */, ARM_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* eor${s}${p} $Rd, $Rn, $shift */
ARM_EORrsi /* 806 */, ARM_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* eor${s}${p} $Rd, $Rn, $shift */
ARM_EORrsr /* 807 */, ARM_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* eret${p} */
ARM_ERET /* 808 */, ARM_INS_ERET,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_JUMP, ARM_GRP_RET, ARM_FEATURE_IsARM, ARM_FEATURE_HasVirtualization, 0 }, 1, 0
#endif
},
{
/* vmov${p}.f64 $Dd, $imm */
ARM_FCONSTD /* 809 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP3, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vmov${p}.f16 $Sd, $imm */
ARM_FCONSTH /* 810 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmov${p}.f32 $Sd, $imm */
ARM_FCONSTS /* 811 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP3, 0 }, 0, 0
#endif
},
{
/* fldmdbx${p} $Rn!, $regs */
ARM_FLDMXDB_UPD /* 812 */, ARM_INS_FLDMDBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* fldmiax${p} $Rn, $regs */
ARM_FLDMXIA /* 813 */, ARM_INS_FLDMIAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* fldmiax${p} $Rn!, $regs */
ARM_FLDMXIA_UPD /* 814 */, ARM_INS_FLDMIAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmrs${p} APSR_nzcv, fpscr */
ARM_FMSTAT /* 815 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR_NZCV, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* fstmdbx${p} $Rn!, $regs */
ARM_FSTMXDB_UPD /* 816 */, ARM_INS_FSTMDBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* fstmiax${p} $Rn, $regs */
ARM_FSTMXIA /* 817 */, ARM_INS_FSTMIAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* fstmiax${p} $Rn!, $regs */
ARM_FSTMXIA_UPD /* 818 */, ARM_INS_FSTMIAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* hint${p} $imm */
ARM_HINT /* 819 */, ARM_INS_HINT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* hlt $val */
ARM_HLT /* 820 */, ARM_INS_HLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV8, 0 }, 0, 0
#endif
},
{
/* hvc $imm */
ARM_HVC /* 821 */, ARM_INS_HVC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_CALL, ARM_FEATURE_IsARM, ARM_FEATURE_HasVirtualization, 0 }, 0, 0
#endif
},
{
/* isb $opt */
ARM_ISB /* 822 */, ARM_INS_ISB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasDB, 0 }, 0, 0
#endif
},
{
/* lda${p} $Rt, $addr */
ARM_LDA /* 823 */, ARM_INS_LDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* ldab${p} $Rt, $addr */
ARM_LDAB /* 824 */, ARM_INS_LDAB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* ldaex${p} $Rt, $addr */
ARM_LDAEX /* 825 */, ARM_INS_LDAEX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* ldaexb${p} $Rt, $addr */
ARM_LDAEXB /* 826 */, ARM_INS_LDAEXB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* ldaexd${p} $Rt, $addr */
ARM_LDAEXD /* 827 */, ARM_INS_LDAEXD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* ldaexh${p} $Rt, $addr */
ARM_LDAEXH /* 828 */, ARM_INS_LDAEXH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* ldah${p} $Rt, $addr */
ARM_LDAH /* 829 */, ARM_INS_LDAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* ldc2l $cop, $CRd, $addr */
ARM_LDC2L_OFFSET /* 830 */, ARM_INS_LDC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* ldc2l $cop, $CRd, $addr, $option */
ARM_LDC2L_OPTION /* 831 */, ARM_INS_LDC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* ldc2l $cop, $CRd, $addr, $offset */
ARM_LDC2L_POST /* 832 */, ARM_INS_LDC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* ldc2l $cop, $CRd, $addr! */
ARM_LDC2L_PRE /* 833 */, ARM_INS_LDC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* ldc2 $cop, $CRd, $addr */
ARM_LDC2_OFFSET /* 834 */, ARM_INS_LDC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* ldc2 $cop, $CRd, $addr, $option */
ARM_LDC2_OPTION /* 835 */, ARM_INS_LDC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* ldc2 $cop, $CRd, $addr, $offset */
ARM_LDC2_POST /* 836 */, ARM_INS_LDC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* ldc2 $cop, $CRd, $addr! */
ARM_LDC2_PRE /* 837 */, ARM_INS_LDC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* ldcl${p} $cop, $CRd, $addr */
ARM_LDCL_OFFSET /* 838 */, ARM_INS_LDCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldcl${p} $cop, $CRd, $addr, $option */
ARM_LDCL_OPTION /* 839 */, ARM_INS_LDCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldcl${p} $cop, $CRd, $addr, $offset */
ARM_LDCL_POST /* 840 */, ARM_INS_LDCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldcl${p} $cop, $CRd, $addr! */
ARM_LDCL_PRE /* 841 */, ARM_INS_LDCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldc${p} $cop, $CRd, $addr */
ARM_LDC_OFFSET /* 842 */, ARM_INS_LDC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldc${p} $cop, $CRd, $addr, $option */
ARM_LDC_OPTION /* 843 */, ARM_INS_LDC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldc${p} $cop, $CRd, $addr, $offset */
ARM_LDC_POST /* 844 */, ARM_INS_LDC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldc${p} $cop, $CRd, $addr! */
ARM_LDC_PRE /* 845 */, ARM_INS_LDC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmda${p} $Rn, $regs */
ARM_LDMDA /* 846 */, ARM_INS_LDMDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmda${p} $Rn!, $regs */
ARM_LDMDA_UPD /* 847 */, ARM_INS_LDMDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmdb${p} $Rn, $regs */
ARM_LDMDB /* 848 */, ARM_INS_LDMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmdb${p} $Rn!, $regs */
ARM_LDMDB_UPD /* 849 */, ARM_INS_LDMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldm${p} $Rn, $regs */
ARM_LDMIA /* 850 */, ARM_INS_LDM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldm${p} $Rn!, $regs */
ARM_LDMIA_UPD /* 851 */, ARM_INS_LDM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmib${p} $Rn, $regs */
ARM_LDMIB /* 852 */, ARM_INS_LDMIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmib${p} $Rn!, $regs */
ARM_LDMIB_UPD /* 853 */, ARM_INS_LDMIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrbt${p} $Rt, $addr, $offset */
ARM_LDRBT_POST_IMM /* 854 */, ARM_INS_LDRBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrbt${p} $Rt, $addr, $offset */
ARM_LDRBT_POST_REG /* 855 */, ARM_INS_LDRBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr, $offset */
ARM_LDRB_POST_IMM /* 856 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr, $offset */
ARM_LDRB_POST_REG /* 857 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr! */
ARM_LDRB_PRE_IMM /* 858 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr! */
ARM_LDRB_PRE_REG /* 859 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr */
ARM_LDRBi12 /* 860 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $shift */
ARM_LDRBrs /* 861 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrd${p} $Rt, $Rt2, $addr */
ARM_LDRD /* 862 */, ARM_INS_LDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* ldrd${p} $Rt, $Rt2, $addr, $offset */
ARM_LDRD_POST /* 863 */, ARM_INS_LDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrd${p} $Rt, $Rt2, $addr! */
ARM_LDRD_PRE /* 864 */, ARM_INS_LDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrex${p} $Rt, $addr */
ARM_LDREX /* 865 */, ARM_INS_LDREX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrexb${p} $Rt, $addr */
ARM_LDREXB /* 866 */, ARM_INS_LDREXB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrexd${p} $Rt, $addr */
ARM_LDREXD /* 867 */, ARM_INS_LDREXD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrexh${p} $Rt, $addr */
ARM_LDREXH /* 868 */, ARM_INS_LDREXH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrh${p} $Rt, $addr */
ARM_LDRH /* 869 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrht${p} $Rt, $addr, $offset */
ARM_LDRHTi /* 870 */, ARM_INS_LDRHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrht${p} $Rt, $addr, $Rm */
ARM_LDRHTr /* 871 */, ARM_INS_LDRHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrh${p} $Rt, $addr, $offset */
ARM_LDRH_POST /* 872 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrh${p} $Rt, $addr! */
ARM_LDRH_PRE /* 873 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsb${p} $Rt, $addr */
ARM_LDRSB /* 874 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsbt${p} $Rt, $addr, $offset */
ARM_LDRSBTi /* 875 */, ARM_INS_LDRSBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsbt${p} $Rt, $addr, $Rm */
ARM_LDRSBTr /* 876 */, ARM_INS_LDRSBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsb${p} $Rt, $addr, $offset */
ARM_LDRSB_POST /* 877 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsb${p} $Rt, $addr! */
ARM_LDRSB_PRE /* 878 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsh${p} $Rt, $addr */
ARM_LDRSH /* 879 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsht${p} $Rt, $addr, $offset */
ARM_LDRSHTi /* 880 */, ARM_INS_LDRSHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsht${p} $Rt, $addr, $Rm */
ARM_LDRSHTr /* 881 */, ARM_INS_LDRSHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsh${p} $Rt, $addr, $offset */
ARM_LDRSH_POST /* 882 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrsh${p} $Rt, $addr! */
ARM_LDRSH_PRE /* 883 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrt${p} $Rt, $addr, $offset */
ARM_LDRT_POST_IMM /* 884 */, ARM_INS_LDRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldrt${p} $Rt, $addr, $offset */
ARM_LDRT_POST_REG /* 885 */, ARM_INS_LDRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr, $offset */
ARM_LDR_POST_IMM /* 886 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr, $offset */
ARM_LDR_POST_REG /* 887 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr! */
ARM_LDR_PRE_IMM /* 888 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr! */
ARM_LDR_PRE_REG /* 889 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr */
ARM_LDRcp /* 890 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr */
ARM_LDRi12 /* 891 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $shift */
ARM_LDRrs /* 892 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mcr${p} $cop, $opc1, $Rt, $CRn, $CRm, $opc2 */
ARM_MCR /* 893 */, ARM_INS_MCR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mcr2 $cop, $opc1, $Rt, $CRn, $CRm, $opc2 */
ARM_MCR2 /* 894 */, ARM_INS_MCR2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* mcrr${p} $cop, $opc1, $Rt, $Rt2, $CRm */
ARM_MCRR /* 895 */, ARM_INS_MCRR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mcrr2 $cop, $opc1, $Rt, $Rt2, $CRm */
ARM_MCRR2 /* 896 */, ARM_INS_MCRR2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* mla${s}${p} $Rd, $Rn, $Rm, $Ra */
ARM_MLA /* 897 */, ARM_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* mls${p} $Rd, $Rn, $Rm, $Ra */
ARM_MLS /* 898 */, ARM_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6T2, 0 }, 0, 0
#endif
},
{
/* mov${p} pc, lr */
ARM_MOVPCLR /* 899 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_RET, ARM_FEATURE_IsARM, 0 }, 1, 0
#endif
},
{
/* movt${p} $Rd, $imm */
ARM_MOVTi16 /* 900 */, ARM_INS_MOVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6T2, 0 }, 0, 0
#endif
},
{
/* mov${s}${p} $Rd, $imm */
ARM_MOVi /* 901 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* movw${p} $Rd, $imm */
ARM_MOVi16 /* 902 */, ARM_INS_MOVW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6T2, 0 }, 0, 0
#endif
},
{
/* mov${s}${p} $Rd, $Rm */
ARM_MOVr /* 903 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mov${s}${p} $Rd, $Rm */
ARM_MOVr_TC /* 904 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mov${s}${p} $Rd, $src */
ARM_MOVsi /* 905 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mov${s}${p} $Rd, $src */
ARM_MOVsr /* 906 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mrc${p} $cop, $opc1, $Rt, $CRn, $CRm, $opc2 */
ARM_MRC /* 907 */, ARM_INS_MRC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mrc2 $cop, $opc1, $Rt, $CRn, $CRm, $opc2 */
ARM_MRC2 /* 908 */, ARM_INS_MRC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* mrrc${p} $cop, $opc1, $Rt, $Rt2, $CRm */
ARM_MRRC /* 909 */, ARM_INS_MRRC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mrrc2 $cop, $opc1, $Rt, $Rt2, $CRm */
ARM_MRRC2 /* 910 */, ARM_INS_MRRC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* mrs${p} $Rd, apsr */
ARM_MRS /* 911 */, ARM_INS_MRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mrs${p} $Rd, $banked */
ARM_MRSbanked /* 912 */, ARM_INS_MRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasVirtualization, 0 }, 0, 0
#endif
},
{
/* mrs${p} $Rd, spsr */
ARM_MRSsys /* 913 */, ARM_INS_MRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* msr${p} $mask, $Rn */
ARM_MSR /* 914 */, ARM_INS_MSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* msr${p} $banked, $Rn */
ARM_MSRbanked /* 915 */, ARM_INS_MSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasVirtualization, 0 }, 0, 0
#endif
},
{
/* msr${p} $mask, $imm */
ARM_MSRi /* 916 */, ARM_INS_MSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mul${s}${p} $Rd, $Rn, $Rm */
ARM_MUL /* 917 */, ARM_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* asrl${p} $RdaLo, $RdaHi, $imm */
ARM_MVE_ASRLi /* 918 */, ARM_INS_ASRL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* asrl${p} $RdaLo, $RdaHi, $Rm */
ARM_MVE_ASRLr /* 919 */, ARM_INS_ASRL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* dlstp.16 $LR, $Rn */
ARM_MVE_DLSTP_16 /* 920 */, ARM_INS_DLSTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* dlstp.32 $LR, $Rn */
ARM_MVE_DLSTP_32 /* 921 */, ARM_INS_DLSTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* dlstp.64 $LR, $Rn */
ARM_MVE_DLSTP_64 /* 922 */, ARM_INS_DLSTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* dlstp.8 $LR, $Rn */
ARM_MVE_DLSTP_8 /* 923 */, ARM_INS_DLSTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* lctp${p} */
ARM_MVE_LCTP /* 924 */, ARM_INS_LCTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* letp $LRin, $label */
ARM_MVE_LETP /* 925 */, ARM_INS_LETP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_HasMVEInt, 0 }, 1, 0
#endif
},
{
/* lsll${p} $RdaLo, $RdaHi, $imm */
ARM_MVE_LSLLi /* 926 */, ARM_INS_LSLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* lsll${p} $RdaLo, $RdaHi, $Rm */
ARM_MVE_LSLLr /* 927 */, ARM_INS_LSLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* lsrl${p} $RdaLo, $RdaHi, $imm */
ARM_MVE_LSRL /* 928 */, ARM_INS_LSRL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* sqrshr${p} $RdaSrc, $Rm */
ARM_MVE_SQRSHR /* 929 */, ARM_INS_SQRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* sqrshrl${p} $RdaLo, $RdaHi, $sat, $Rm */
ARM_MVE_SQRSHRL /* 930 */, ARM_INS_SQRSHRL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* sqshl${p} $RdaSrc, $imm */
ARM_MVE_SQSHL /* 931 */, ARM_INS_SQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* sqshll${p} $RdaLo, $RdaHi, $imm */
ARM_MVE_SQSHLL /* 932 */, ARM_INS_SQSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* srshr${p} $RdaSrc, $imm */
ARM_MVE_SRSHR /* 933 */, ARM_INS_SRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* srshrl${p} $RdaLo, $RdaHi, $imm */
ARM_MVE_SRSHRL /* 934 */, ARM_INS_SRSHRL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* uqrshl${p} $RdaSrc, $Rm */
ARM_MVE_UQRSHL /* 935 */, ARM_INS_UQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* uqrshll${p} $RdaLo, $RdaHi, $sat, $Rm */
ARM_MVE_UQRSHLL /* 936 */, ARM_INS_UQRSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* uqshl${p} $RdaSrc, $imm */
ARM_MVE_UQSHL /* 937 */, ARM_INS_UQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* uqshll${p} $RdaLo, $RdaHi, $imm */
ARM_MVE_UQSHLL /* 938 */, ARM_INS_UQSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* urshr${p} $RdaSrc, $imm */
ARM_MVE_URSHR /* 939 */, ARM_INS_URSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* urshrl${p} $RdaLo, $RdaHi, $imm */
ARM_MVE_URSHRL /* 940 */, ARM_INS_URSHRL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabav${vp}.s16 $Rda, $Qn, $Qm */
ARM_MVE_VABAVs16 /* 941 */, ARM_INS_VABAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabav${vp}.s32 $Rda, $Qn, $Qm */
ARM_MVE_VABAVs32 /* 942 */, ARM_INS_VABAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabav${vp}.s8 $Rda, $Qn, $Qm */
ARM_MVE_VABAVs8 /* 943 */, ARM_INS_VABAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabav${vp}.u16 $Rda, $Qn, $Qm */
ARM_MVE_VABAVu16 /* 944 */, ARM_INS_VABAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabav${vp}.u32 $Rda, $Qn, $Qm */
ARM_MVE_VABAVu32 /* 945 */, ARM_INS_VABAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabav${vp}.u8 $Rda, $Qn, $Qm */
ARM_MVE_VABAVu8 /* 946 */, ARM_INS_VABAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabd${vp}.f16 $Qd, $Qn, $Qm */
ARM_MVE_VABDf16 /* 947 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vabd${vp}.f32 $Qd, $Qn, $Qm */
ARM_MVE_VABDf32 /* 948 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vabd${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VABDs16 /* 949 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabd${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VABDs32 /* 950 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabd${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VABDs8 /* 951 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabd${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VABDu16 /* 952 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabd${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VABDu32 /* 953 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabd${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VABDu8 /* 954 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabs${vp}.f16 $Qd, $Qm */
ARM_MVE_VABSf16 /* 955 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vabs${vp}.f32 $Qd, $Qm */
ARM_MVE_VABSf32 /* 956 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vabs${vp}.s16 $Qd, $Qm */
ARM_MVE_VABSs16 /* 957 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabs${vp}.s32 $Qd, $Qm */
ARM_MVE_VABSs32 /* 958 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vabs${vp}.s8 $Qd, $Qm */
ARM_MVE_VABSs8 /* 959 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vadc${vp}.i32 $Qd, $Qn, $Qm */
ARM_MVE_VADC /* 960 */, ARM_INS_VADC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vadci${vp}.i32 $Qd, $Qn, $Qm */
ARM_MVE_VADCI /* 961 */, ARM_INS_VADCI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddlva${vp}.s32 $RdaLo, $RdaHi, $Qm */
ARM_MVE_VADDLVs32acc /* 962 */, ARM_INS_VADDLVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddlv${vp}.s32 $RdaLo, $RdaHi, $Qm */
ARM_MVE_VADDLVs32no_acc /* 963 */, ARM_INS_VADDLV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddlva${vp}.u32 $RdaLo, $RdaHi, $Qm */
ARM_MVE_VADDLVu32acc /* 964 */, ARM_INS_VADDLVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddlv${vp}.u32 $RdaLo, $RdaHi, $Qm */
ARM_MVE_VADDLVu32no_acc /* 965 */, ARM_INS_VADDLV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddva${vp}.s16 $Rda, $Qm */
ARM_MVE_VADDVs16acc /* 966 */, ARM_INS_VADDVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddv${vp}.s16 $Rda, $Qm */
ARM_MVE_VADDVs16no_acc /* 967 */, ARM_INS_VADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddva${vp}.s32 $Rda, $Qm */
ARM_MVE_VADDVs32acc /* 968 */, ARM_INS_VADDVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddv${vp}.s32 $Rda, $Qm */
ARM_MVE_VADDVs32no_acc /* 969 */, ARM_INS_VADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddva${vp}.s8 $Rda, $Qm */
ARM_MVE_VADDVs8acc /* 970 */, ARM_INS_VADDVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddv${vp}.s8 $Rda, $Qm */
ARM_MVE_VADDVs8no_acc /* 971 */, ARM_INS_VADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddva${vp}.u16 $Rda, $Qm */
ARM_MVE_VADDVu16acc /* 972 */, ARM_INS_VADDVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddv${vp}.u16 $Rda, $Qm */
ARM_MVE_VADDVu16no_acc /* 973 */, ARM_INS_VADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddva${vp}.u32 $Rda, $Qm */
ARM_MVE_VADDVu32acc /* 974 */, ARM_INS_VADDVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddv${vp}.u32 $Rda, $Qm */
ARM_MVE_VADDVu32no_acc /* 975 */, ARM_INS_VADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddva${vp}.u8 $Rda, $Qm */
ARM_MVE_VADDVu8acc /* 976 */, ARM_INS_VADDVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vaddv${vp}.u8 $Rda, $Qm */
ARM_MVE_VADDVu8no_acc /* 977 */, ARM_INS_VADDV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.f16 $Qd, $Qn, $Rm */
ARM_MVE_VADD_qr_f16 /* 978 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.f32 $Qd, $Qn, $Rm */
ARM_MVE_VADD_qr_f32 /* 979 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.i16 $Qd, $Qn, $Rm */
ARM_MVE_VADD_qr_i16 /* 980 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.i32 $Qd, $Qn, $Rm */
ARM_MVE_VADD_qr_i32 /* 981 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.i8 $Qd, $Qn, $Rm */
ARM_MVE_VADD_qr_i8 /* 982 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.f16 $Qd, $Qn, $Qm */
ARM_MVE_VADDf16 /* 983 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.f32 $Qd, $Qn, $Qm */
ARM_MVE_VADDf32 /* 984 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.i16 $Qd, $Qn, $Qm */
ARM_MVE_VADDi16 /* 985 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.i32 $Qd, $Qn, $Qm */
ARM_MVE_VADDi32 /* 986 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vadd${vp}.i8 $Qd, $Qn, $Qm */
ARM_MVE_VADDi8 /* 987 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vand${vp} $Qd, $Qn, $Qm */
ARM_MVE_VAND /* 988 */, ARM_INS_VAND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vbic${vp} $Qd, $Qn, $Qm */
ARM_MVE_VBIC /* 989 */, ARM_INS_VBIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vbic${vp}.i16 $Qd, $imm */
ARM_MVE_VBICimmi16 /* 990 */, ARM_INS_VBIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vbic${vp}.i32 $Qd, $imm */
ARM_MVE_VBICimmi32 /* 991 */, ARM_INS_VBIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vbrsr${vp}.16 $Qd, $Qn, $Rm */
ARM_MVE_VBRSR16 /* 992 */, ARM_INS_VBRSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vbrsr${vp}.32 $Qd, $Qn, $Rm */
ARM_MVE_VBRSR32 /* 993 */, ARM_INS_VBRSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vbrsr${vp}.8 $Qd, $Qn, $Rm */
ARM_MVE_VBRSR8 /* 994 */, ARM_INS_VBRSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcadd${vp}.f16 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VCADDf16 /* 995 */, ARM_INS_VCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcadd${vp}.f32 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VCADDf32 /* 996 */, ARM_INS_VCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcadd${vp}.i16 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VCADDi16 /* 997 */, ARM_INS_VCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcadd${vp}.i32 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VCADDi32 /* 998 */, ARM_INS_VCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcadd${vp}.i8 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VCADDi8 /* 999 */, ARM_INS_VCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcls${vp}.s16 $Qd, $Qm */
ARM_MVE_VCLSs16 /* 1000 */, ARM_INS_VCLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcls${vp}.s32 $Qd, $Qm */
ARM_MVE_VCLSs32 /* 1001 */, ARM_INS_VCLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcls${vp}.s8 $Qd, $Qm */
ARM_MVE_VCLSs8 /* 1002 */, ARM_INS_VCLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vclz${vp}.i16 $Qd, $Qm */
ARM_MVE_VCLZs16 /* 1003 */, ARM_INS_VCLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vclz${vp}.i32 $Qd, $Qm */
ARM_MVE_VCLZs32 /* 1004 */, ARM_INS_VCLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vclz${vp}.i8 $Qd, $Qm */
ARM_MVE_VCLZs8 /* 1005 */, ARM_INS_VCLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmla${vp}.f16 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VCMLAf16 /* 1006 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcmla${vp}.f32 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VCMLAf32 /* 1007 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.f16 $fc, $Qn, $Qm */
ARM_MVE_VCMPf16 /* 1008 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.f16 $fc, $Qn, $Rm */
ARM_MVE_VCMPf16r /* 1009 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.f32 $fc, $Qn, $Qm */
ARM_MVE_VCMPf32 /* 1010 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.f32 $fc, $Qn, $Rm */
ARM_MVE_VCMPf32r /* 1011 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.i16 $fc, $Qn, $Qm */
ARM_MVE_VCMPi16 /* 1012 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.i16 $fc, $Qn, $Rm */
ARM_MVE_VCMPi16r /* 1013 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.i32 $fc, $Qn, $Qm */
ARM_MVE_VCMPi32 /* 1014 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.i32 $fc, $Qn, $Rm */
ARM_MVE_VCMPi32r /* 1015 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.i8 $fc, $Qn, $Qm */
ARM_MVE_VCMPi8 /* 1016 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.i8 $fc, $Qn, $Rm */
ARM_MVE_VCMPi8r /* 1017 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.s16 $fc, $Qn, $Qm */
ARM_MVE_VCMPs16 /* 1018 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.s16 $fc, $Qn, $Rm */
ARM_MVE_VCMPs16r /* 1019 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.s32 $fc, $Qn, $Qm */
ARM_MVE_VCMPs32 /* 1020 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.s32 $fc, $Qn, $Rm */
ARM_MVE_VCMPs32r /* 1021 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.s8 $fc, $Qn, $Qm */
ARM_MVE_VCMPs8 /* 1022 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.s8 $fc, $Qn, $Rm */
ARM_MVE_VCMPs8r /* 1023 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.u16 $fc, $Qn, $Qm */
ARM_MVE_VCMPu16 /* 1024 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.u16 $fc, $Qn, $Rm */
ARM_MVE_VCMPu16r /* 1025 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.u32 $fc, $Qn, $Qm */
ARM_MVE_VCMPu32 /* 1026 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.u32 $fc, $Qn, $Rm */
ARM_MVE_VCMPu32r /* 1027 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.u8 $fc, $Qn, $Qm */
ARM_MVE_VCMPu8 /* 1028 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmp${vp}.u8 $fc, $Qn, $Rm */
ARM_MVE_VCMPu8r /* 1029 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcmul${vp}.f16 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VCMULf16 /* 1030 */, ARM_INS_VCMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcmul${vp}.f32 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VCMULf32 /* 1031 */, ARM_INS_VCMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vctp${vp}.16 $Rn */
ARM_MVE_VCTP16 /* 1032 */, ARM_INS_VCTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vctp${vp}.32 $Rn */
ARM_MVE_VCTP32 /* 1033 */, ARM_INS_VCTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vctp${vp}.64 $Rn */
ARM_MVE_VCTP64 /* 1034 */, ARM_INS_VCTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vctp${vp}.8 $Rn */
ARM_MVE_VCTP8 /* 1035 */, ARM_INS_VCTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vcvtb${vp}.f16.f32 $Qd, $Qm */
ARM_MVE_VCVTf16f32bh /* 1036 */, ARM_INS_VCVTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtt${vp}.f16.f32 $Qd, $Qm */
ARM_MVE_VCVTf16f32th /* 1037 */, ARM_INS_VCVTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.f16.s16 $Qd, $Qm, $imm6 */
ARM_MVE_VCVTf16s16_fix /* 1038 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.f16.s16 $Qd, $Qm */
ARM_MVE_VCVTf16s16n /* 1039 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.f16.u16 $Qd, $Qm, $imm6 */
ARM_MVE_VCVTf16u16_fix /* 1040 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.f16.u16 $Qd, $Qm */
ARM_MVE_VCVTf16u16n /* 1041 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtb${vp}.f32.f16 $Qd, $Qm */
ARM_MVE_VCVTf32f16bh /* 1042 */, ARM_INS_VCVTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtt${vp}.f32.f16 $Qd, $Qm */
ARM_MVE_VCVTf32f16th /* 1043 */, ARM_INS_VCVTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.f32.s32 $Qd, $Qm, $imm6 */
ARM_MVE_VCVTf32s32_fix /* 1044 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.f32.s32 $Qd, $Qm */
ARM_MVE_VCVTf32s32n /* 1045 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.f32.u32 $Qd, $Qm, $imm6 */
ARM_MVE_VCVTf32u32_fix /* 1046 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.f32.u32 $Qd, $Qm */
ARM_MVE_VCVTf32u32n /* 1047 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.s16.f16 $Qd, $Qm, $imm6 */
ARM_MVE_VCVTs16f16_fix /* 1048 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvta${vp}.s16.f16 $Qd, $Qm */
ARM_MVE_VCVTs16f16a /* 1049 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtm${vp}.s16.f16 $Qd, $Qm */
ARM_MVE_VCVTs16f16m /* 1050 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtn${vp}.s16.f16 $Qd, $Qm */
ARM_MVE_VCVTs16f16n /* 1051 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtp${vp}.s16.f16 $Qd, $Qm */
ARM_MVE_VCVTs16f16p /* 1052 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.s16.f16 $Qd, $Qm */
ARM_MVE_VCVTs16f16z /* 1053 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.s32.f32 $Qd, $Qm, $imm6 */
ARM_MVE_VCVTs32f32_fix /* 1054 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvta${vp}.s32.f32 $Qd, $Qm */
ARM_MVE_VCVTs32f32a /* 1055 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtm${vp}.s32.f32 $Qd, $Qm */
ARM_MVE_VCVTs32f32m /* 1056 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtn${vp}.s32.f32 $Qd, $Qm */
ARM_MVE_VCVTs32f32n /* 1057 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtp${vp}.s32.f32 $Qd, $Qm */
ARM_MVE_VCVTs32f32p /* 1058 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.s32.f32 $Qd, $Qm */
ARM_MVE_VCVTs32f32z /* 1059 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.u16.f16 $Qd, $Qm, $imm6 */
ARM_MVE_VCVTu16f16_fix /* 1060 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvta${vp}.u16.f16 $Qd, $Qm */
ARM_MVE_VCVTu16f16a /* 1061 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtm${vp}.u16.f16 $Qd, $Qm */
ARM_MVE_VCVTu16f16m /* 1062 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtn${vp}.u16.f16 $Qd, $Qm */
ARM_MVE_VCVTu16f16n /* 1063 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtp${vp}.u16.f16 $Qd, $Qm */
ARM_MVE_VCVTu16f16p /* 1064 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.u16.f16 $Qd, $Qm */
ARM_MVE_VCVTu16f16z /* 1065 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.u32.f32 $Qd, $Qm, $imm6 */
ARM_MVE_VCVTu32f32_fix /* 1066 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvta${vp}.u32.f32 $Qd, $Qm */
ARM_MVE_VCVTu32f32a /* 1067 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtm${vp}.u32.f32 $Qd, $Qm */
ARM_MVE_VCVTu32f32m /* 1068 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtn${vp}.u32.f32 $Qd, $Qm */
ARM_MVE_VCVTu32f32n /* 1069 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvtp${vp}.u32.f32 $Qd, $Qm */
ARM_MVE_VCVTu32f32p /* 1070 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vcvt${vp}.u32.f32 $Qd, $Qm */
ARM_MVE_VCVTu32f32z /* 1071 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vddup${vp}.u16 $Qd, $Rn, $imm */
ARM_MVE_VDDUPu16 /* 1072 */, ARM_INS_VDDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vddup${vp}.u32 $Qd, $Rn, $imm */
ARM_MVE_VDDUPu32 /* 1073 */, ARM_INS_VDDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vddup${vp}.u8 $Qd, $Rn, $imm */
ARM_MVE_VDDUPu8 /* 1074 */, ARM_INS_VDDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vdup${vp}.16 $Qd, $Rt */
ARM_MVE_VDUP16 /* 1075 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vdup${vp}.32 $Qd, $Rt */
ARM_MVE_VDUP32 /* 1076 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vdup${vp}.8 $Qd, $Rt */
ARM_MVE_VDUP8 /* 1077 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vdwdup${vp}.u16 $Qd, $Rn, $Rm, $imm */
ARM_MVE_VDWDUPu16 /* 1078 */, ARM_INS_VDWDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vdwdup${vp}.u32 $Qd, $Rn, $Rm, $imm */
ARM_MVE_VDWDUPu32 /* 1079 */, ARM_INS_VDWDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vdwdup${vp}.u8 $Qd, $Rn, $Rm, $imm */
ARM_MVE_VDWDUPu8 /* 1080 */, ARM_INS_VDWDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* veor${vp} $Qd, $Qn, $Qm */
ARM_MVE_VEOR /* 1081 */, ARM_INS_VEOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vfmas${vp}.f16 $Qd, $Qn, $Rm */
ARM_MVE_VFMA_qr_Sf16 /* 1082 */, ARM_INS_VFMAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vfmas${vp}.f32 $Qd, $Qn, $Rm */
ARM_MVE_VFMA_qr_Sf32 /* 1083 */, ARM_INS_VFMAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vfma${vp}.f16 $Qd, $Qn, $Rm */
ARM_MVE_VFMA_qr_f16 /* 1084 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vfma${vp}.f32 $Qd, $Qn, $Rm */
ARM_MVE_VFMA_qr_f32 /* 1085 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vfma${vp}.f16 $Qd, $Qn, $Qm */
ARM_MVE_VFMAf16 /* 1086 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vfma${vp}.f32 $Qd, $Qn, $Qm */
ARM_MVE_VFMAf32 /* 1087 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vfms${vp}.f16 $Qd, $Qn, $Qm */
ARM_MVE_VFMSf16 /* 1088 */, ARM_INS_VFMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vfms${vp}.f32 $Qd, $Qn, $Qm */
ARM_MVE_VFMSf32 /* 1089 */, ARM_INS_VFMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VHADD_qr_s16 /* 1090 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VHADD_qr_s32 /* 1091 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VHADD_qr_s8 /* 1092 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.u16 $Qd, $Qn, $Rm */
ARM_MVE_VHADD_qr_u16 /* 1093 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.u32 $Qd, $Qn, $Rm */
ARM_MVE_VHADD_qr_u32 /* 1094 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.u8 $Qd, $Qn, $Rm */
ARM_MVE_VHADD_qr_u8 /* 1095 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VHADDs16 /* 1096 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VHADDs32 /* 1097 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VHADDs8 /* 1098 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VHADDu16 /* 1099 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VHADDu32 /* 1100 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhadd${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VHADDu8 /* 1101 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhcadd${vp}.s16 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VHCADDs16 /* 1102 */, ARM_INS_VHCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhcadd${vp}.s32 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VHCADDs32 /* 1103 */, ARM_INS_VHCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhcadd${vp}.s8 $Qd, $Qn, $Qm, $rot */
ARM_MVE_VHCADDs8 /* 1104 */, ARM_INS_VHCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VHSUB_qr_s16 /* 1105 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VHSUB_qr_s32 /* 1106 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VHSUB_qr_s8 /* 1107 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.u16 $Qd, $Qn, $Rm */
ARM_MVE_VHSUB_qr_u16 /* 1108 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.u32 $Qd, $Qn, $Rm */
ARM_MVE_VHSUB_qr_u32 /* 1109 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.u8 $Qd, $Qn, $Rm */
ARM_MVE_VHSUB_qr_u8 /* 1110 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VHSUBs16 /* 1111 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VHSUBs32 /* 1112 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VHSUBs8 /* 1113 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VHSUBu16 /* 1114 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VHSUBu32 /* 1115 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vhsub${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VHSUBu8 /* 1116 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vidup${vp}.u16 $Qd, $Rn, $imm */
ARM_MVE_VIDUPu16 /* 1117 */, ARM_INS_VIDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vidup${vp}.u32 $Qd, $Rn, $imm */
ARM_MVE_VIDUPu32 /* 1118 */, ARM_INS_VIDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vidup${vp}.u8 $Qd, $Rn, $imm */
ARM_MVE_VIDUPu8 /* 1119 */, ARM_INS_VIDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* viwdup${vp}.u16 $Qd, $Rn, $Rm, $imm */
ARM_MVE_VIWDUPu16 /* 1120 */, ARM_INS_VIWDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* viwdup${vp}.u32 $Qd, $Rn, $Rm, $imm */
ARM_MVE_VIWDUPu32 /* 1121 */, ARM_INS_VIWDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* viwdup${vp}.u8 $Qd, $Rn, $Rm, $imm */
ARM_MVE_VIWDUPu8 /* 1122 */, ARM_INS_VIWDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld20.16 $VQd, $Rn */
ARM_MVE_VLD20_16 /* 1123 */, ARM_INS_VLD20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld20.16 $VQd, $Rn! */
ARM_MVE_VLD20_16_wb /* 1124 */, ARM_INS_VLD20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld20.32 $VQd, $Rn */
ARM_MVE_VLD20_32 /* 1125 */, ARM_INS_VLD20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld20.32 $VQd, $Rn! */
ARM_MVE_VLD20_32_wb /* 1126 */, ARM_INS_VLD20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld20.8 $VQd, $Rn */
ARM_MVE_VLD20_8 /* 1127 */, ARM_INS_VLD20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld20.8 $VQd, $Rn! */
ARM_MVE_VLD20_8_wb /* 1128 */, ARM_INS_VLD20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld21.16 $VQd, $Rn */
ARM_MVE_VLD21_16 /* 1129 */, ARM_INS_VLD21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld21.16 $VQd, $Rn! */
ARM_MVE_VLD21_16_wb /* 1130 */, ARM_INS_VLD21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld21.32 $VQd, $Rn */
ARM_MVE_VLD21_32 /* 1131 */, ARM_INS_VLD21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld21.32 $VQd, $Rn! */
ARM_MVE_VLD21_32_wb /* 1132 */, ARM_INS_VLD21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld21.8 $VQd, $Rn */
ARM_MVE_VLD21_8 /* 1133 */, ARM_INS_VLD21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld21.8 $VQd, $Rn! */
ARM_MVE_VLD21_8_wb /* 1134 */, ARM_INS_VLD21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld40.16 $VQd, $Rn */
ARM_MVE_VLD40_16 /* 1135 */, ARM_INS_VLD40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld40.16 $VQd, $Rn! */
ARM_MVE_VLD40_16_wb /* 1136 */, ARM_INS_VLD40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld40.32 $VQd, $Rn */
ARM_MVE_VLD40_32 /* 1137 */, ARM_INS_VLD40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld40.32 $VQd, $Rn! */
ARM_MVE_VLD40_32_wb /* 1138 */, ARM_INS_VLD40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld40.8 $VQd, $Rn */
ARM_MVE_VLD40_8 /* 1139 */, ARM_INS_VLD40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld40.8 $VQd, $Rn! */
ARM_MVE_VLD40_8_wb /* 1140 */, ARM_INS_VLD40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld41.16 $VQd, $Rn */
ARM_MVE_VLD41_16 /* 1141 */, ARM_INS_VLD41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld41.16 $VQd, $Rn! */
ARM_MVE_VLD41_16_wb /* 1142 */, ARM_INS_VLD41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld41.32 $VQd, $Rn */
ARM_MVE_VLD41_32 /* 1143 */, ARM_INS_VLD41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld41.32 $VQd, $Rn! */
ARM_MVE_VLD41_32_wb /* 1144 */, ARM_INS_VLD41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld41.8 $VQd, $Rn */
ARM_MVE_VLD41_8 /* 1145 */, ARM_INS_VLD41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld41.8 $VQd, $Rn! */
ARM_MVE_VLD41_8_wb /* 1146 */, ARM_INS_VLD41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld42.16 $VQd, $Rn */
ARM_MVE_VLD42_16 /* 1147 */, ARM_INS_VLD42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld42.16 $VQd, $Rn! */
ARM_MVE_VLD42_16_wb /* 1148 */, ARM_INS_VLD42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld42.32 $VQd, $Rn */
ARM_MVE_VLD42_32 /* 1149 */, ARM_INS_VLD42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld42.32 $VQd, $Rn! */
ARM_MVE_VLD42_32_wb /* 1150 */, ARM_INS_VLD42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld42.8 $VQd, $Rn */
ARM_MVE_VLD42_8 /* 1151 */, ARM_INS_VLD42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld42.8 $VQd, $Rn! */
ARM_MVE_VLD42_8_wb /* 1152 */, ARM_INS_VLD42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld43.16 $VQd, $Rn */
ARM_MVE_VLD43_16 /* 1153 */, ARM_INS_VLD43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld43.16 $VQd, $Rn! */
ARM_MVE_VLD43_16_wb /* 1154 */, ARM_INS_VLD43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld43.32 $VQd, $Rn */
ARM_MVE_VLD43_32 /* 1155 */, ARM_INS_VLD43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld43.32 $VQd, $Rn! */
ARM_MVE_VLD43_32_wb /* 1156 */, ARM_INS_VLD43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld43.8 $VQd, $Rn */
ARM_MVE_VLD43_8 /* 1157 */, ARM_INS_VLD43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vld43.8 $VQd, $Rn! */
ARM_MVE_VLD43_8_wb /* 1158 */, ARM_INS_VLD43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.s16 $Qd, $addr */
ARM_MVE_VLDRBS16 /* 1159 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.s16 $Qd, $Rn$addr */
ARM_MVE_VLDRBS16_post /* 1160 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.s16 $Qd, $addr! */
ARM_MVE_VLDRBS16_pre /* 1161 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.s16 $Qd, $addr */
ARM_MVE_VLDRBS16_rq /* 1162 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.s32 $Qd, $addr */
ARM_MVE_VLDRBS32 /* 1163 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.s32 $Qd, $Rn$addr */
ARM_MVE_VLDRBS32_post /* 1164 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.s32 $Qd, $addr! */
ARM_MVE_VLDRBS32_pre /* 1165 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.s32 $Qd, $addr */
ARM_MVE_VLDRBS32_rq /* 1166 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u16 $Qd, $addr */
ARM_MVE_VLDRBU16 /* 1167 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u16 $Qd, $Rn$addr */
ARM_MVE_VLDRBU16_post /* 1168 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u16 $Qd, $addr! */
ARM_MVE_VLDRBU16_pre /* 1169 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u16 $Qd, $addr */
ARM_MVE_VLDRBU16_rq /* 1170 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u32 $Qd, $addr */
ARM_MVE_VLDRBU32 /* 1171 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u32 $Qd, $Rn$addr */
ARM_MVE_VLDRBU32_post /* 1172 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u32 $Qd, $addr! */
ARM_MVE_VLDRBU32_pre /* 1173 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u32 $Qd, $addr */
ARM_MVE_VLDRBU32_rq /* 1174 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u8 $Qd, $addr */
ARM_MVE_VLDRBU8 /* 1175 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u8 $Qd, $Rn$addr */
ARM_MVE_VLDRBU8_post /* 1176 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u8 $Qd, $addr! */
ARM_MVE_VLDRBU8_pre /* 1177 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrb${vp}.u8 $Qd, $addr */
ARM_MVE_VLDRBU8_rq /* 1178 */, ARM_INS_VLDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrd${vp}.u64 $Qd, $addr */
ARM_MVE_VLDRDU64_qi /* 1179 */, ARM_INS_VLDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrd${vp}.u64 $Qd, $addr! */
ARM_MVE_VLDRDU64_qi_pre /* 1180 */, ARM_INS_VLDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrd${vp}.u64 $Qd, $addr */
ARM_MVE_VLDRDU64_rq /* 1181 */, ARM_INS_VLDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrd${vp}.u64 $Qd, $addr */
ARM_MVE_VLDRDU64_rq_u /* 1182 */, ARM_INS_VLDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.s32 $Qd, $addr */
ARM_MVE_VLDRHS32 /* 1183 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.s32 $Qd, $Rn$addr */
ARM_MVE_VLDRHS32_post /* 1184 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.s32 $Qd, $addr! */
ARM_MVE_VLDRHS32_pre /* 1185 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.s32 $Qd, $addr */
ARM_MVE_VLDRHS32_rq /* 1186 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.s32 $Qd, $addr */
ARM_MVE_VLDRHS32_rq_u /* 1187 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u16 $Qd, $addr */
ARM_MVE_VLDRHU16 /* 1188 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u16 $Qd, $Rn$addr */
ARM_MVE_VLDRHU16_post /* 1189 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u16 $Qd, $addr! */
ARM_MVE_VLDRHU16_pre /* 1190 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u16 $Qd, $addr */
ARM_MVE_VLDRHU16_rq /* 1191 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u16 $Qd, $addr */
ARM_MVE_VLDRHU16_rq_u /* 1192 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u32 $Qd, $addr */
ARM_MVE_VLDRHU32 /* 1193 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u32 $Qd, $Rn$addr */
ARM_MVE_VLDRHU32_post /* 1194 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u32 $Qd, $addr! */
ARM_MVE_VLDRHU32_pre /* 1195 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u32 $Qd, $addr */
ARM_MVE_VLDRHU32_rq /* 1196 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrh${vp}.u32 $Qd, $addr */
ARM_MVE_VLDRHU32_rq_u /* 1197 */, ARM_INS_VLDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrw${vp}.u32 $Qd, $addr */
ARM_MVE_VLDRWU32 /* 1198 */, ARM_INS_VLDRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrw${vp}.u32 $Qd, $Rn$addr */
ARM_MVE_VLDRWU32_post /* 1199 */, ARM_INS_VLDRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrw${vp}.u32 $Qd, $addr! */
ARM_MVE_VLDRWU32_pre /* 1200 */, ARM_INS_VLDRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrw${vp}.u32 $Qd, $addr */
ARM_MVE_VLDRWU32_qi /* 1201 */, ARM_INS_VLDRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrw${vp}.u32 $Qd, $addr! */
ARM_MVE_VLDRWU32_qi_pre /* 1202 */, ARM_INS_VLDRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrw${vp}.u32 $Qd, $addr */
ARM_MVE_VLDRWU32_rq /* 1203 */, ARM_INS_VLDRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldrw${vp}.u32 $Qd, $addr */
ARM_MVE_VLDRWU32_rq_u /* 1204 */, ARM_INS_VLDRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxav${vp}.s16 $RdaSrc, $Qm */
ARM_MVE_VMAXAVs16 /* 1205 */, ARM_INS_VMAXAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxav${vp}.s32 $RdaSrc, $Qm */
ARM_MVE_VMAXAVs32 /* 1206 */, ARM_INS_VMAXAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxav${vp}.s8 $RdaSrc, $Qm */
ARM_MVE_VMAXAVs8 /* 1207 */, ARM_INS_VMAXAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxa${vp}.s16 $Qd, $Qm */
ARM_MVE_VMAXAs16 /* 1208 */, ARM_INS_VMAXA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxa${vp}.s32 $Qd, $Qm */
ARM_MVE_VMAXAs32 /* 1209 */, ARM_INS_VMAXA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxa${vp}.s8 $Qd, $Qm */
ARM_MVE_VMAXAs8 /* 1210 */, ARM_INS_VMAXA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxnmav${vp}.f16 $RdaSrc, $Qm */
ARM_MVE_VMAXNMAVf16 /* 1211 */, ARM_INS_VMAXNMAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmaxnmav${vp}.f32 $RdaSrc, $Qm */
ARM_MVE_VMAXNMAVf32 /* 1212 */, ARM_INS_VMAXNMAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmaxnma${vp}.f16 $Qd, $Qm */
ARM_MVE_VMAXNMAf16 /* 1213 */, ARM_INS_VMAXNMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmaxnma${vp}.f32 $Qd, $Qm */
ARM_MVE_VMAXNMAf32 /* 1214 */, ARM_INS_VMAXNMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmaxnmv${vp}.f16 $RdaSrc, $Qm */
ARM_MVE_VMAXNMVf16 /* 1215 */, ARM_INS_VMAXNMV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmaxnmv${vp}.f32 $RdaSrc, $Qm */
ARM_MVE_VMAXNMVf32 /* 1216 */, ARM_INS_VMAXNMV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmaxnm${vp}.f16 $Qd, $Qn, $Qm */
ARM_MVE_VMAXNMf16 /* 1217 */, ARM_INS_VMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmaxnm${vp}.f32 $Qd, $Qn, $Qm */
ARM_MVE_VMAXNMf32 /* 1218 */, ARM_INS_VMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmaxv${vp}.s16 $RdaSrc, $Qm */
ARM_MVE_VMAXVs16 /* 1219 */, ARM_INS_VMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxv${vp}.s32 $RdaSrc, $Qm */
ARM_MVE_VMAXVs32 /* 1220 */, ARM_INS_VMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxv${vp}.s8 $RdaSrc, $Qm */
ARM_MVE_VMAXVs8 /* 1221 */, ARM_INS_VMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxv${vp}.u16 $RdaSrc, $Qm */
ARM_MVE_VMAXVu16 /* 1222 */, ARM_INS_VMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxv${vp}.u32 $RdaSrc, $Qm */
ARM_MVE_VMAXVu32 /* 1223 */, ARM_INS_VMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmaxv${vp}.u8 $RdaSrc, $Qm */
ARM_MVE_VMAXVu8 /* 1224 */, ARM_INS_VMAXV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmax${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VMAXs16 /* 1225 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmax${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VMAXs32 /* 1226 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmax${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VMAXs8 /* 1227 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmax${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VMAXu16 /* 1228 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmax${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VMAXu32 /* 1229 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmax${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VMAXu8 /* 1230 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vminav${vp}.s16 $RdaSrc, $Qm */
ARM_MVE_VMINAVs16 /* 1231 */, ARM_INS_VMINAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vminav${vp}.s32 $RdaSrc, $Qm */
ARM_MVE_VMINAVs32 /* 1232 */, ARM_INS_VMINAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vminav${vp}.s8 $RdaSrc, $Qm */
ARM_MVE_VMINAVs8 /* 1233 */, ARM_INS_VMINAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmina${vp}.s16 $Qd, $Qm */
ARM_MVE_VMINAs16 /* 1234 */, ARM_INS_VMINA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmina${vp}.s32 $Qd, $Qm */
ARM_MVE_VMINAs32 /* 1235 */, ARM_INS_VMINA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmina${vp}.s8 $Qd, $Qm */
ARM_MVE_VMINAs8 /* 1236 */, ARM_INS_VMINA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vminnmav${vp}.f16 $RdaSrc, $Qm */
ARM_MVE_VMINNMAVf16 /* 1237 */, ARM_INS_VMINNMAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vminnmav${vp}.f32 $RdaSrc, $Qm */
ARM_MVE_VMINNMAVf32 /* 1238 */, ARM_INS_VMINNMAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vminnma${vp}.f16 $Qd, $Qm */
ARM_MVE_VMINNMAf16 /* 1239 */, ARM_INS_VMINNMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vminnma${vp}.f32 $Qd, $Qm */
ARM_MVE_VMINNMAf32 /* 1240 */, ARM_INS_VMINNMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vminnmv${vp}.f16 $RdaSrc, $Qm */
ARM_MVE_VMINNMVf16 /* 1241 */, ARM_INS_VMINNMV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vminnmv${vp}.f32 $RdaSrc, $Qm */
ARM_MVE_VMINNMVf32 /* 1242 */, ARM_INS_VMINNMV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vminnm${vp}.f16 $Qd, $Qn, $Qm */
ARM_MVE_VMINNMf16 /* 1243 */, ARM_INS_VMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vminnm${vp}.f32 $Qd, $Qn, $Qm */
ARM_MVE_VMINNMf32 /* 1244 */, ARM_INS_VMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vminv${vp}.s16 $RdaSrc, $Qm */
ARM_MVE_VMINVs16 /* 1245 */, ARM_INS_VMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vminv${vp}.s32 $RdaSrc, $Qm */
ARM_MVE_VMINVs32 /* 1246 */, ARM_INS_VMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vminv${vp}.s8 $RdaSrc, $Qm */
ARM_MVE_VMINVs8 /* 1247 */, ARM_INS_VMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vminv${vp}.u16 $RdaSrc, $Qm */
ARM_MVE_VMINVu16 /* 1248 */, ARM_INS_VMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vminv${vp}.u32 $RdaSrc, $Qm */
ARM_MVE_VMINVu32 /* 1249 */, ARM_INS_VMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vminv${vp}.u8 $RdaSrc, $Qm */
ARM_MVE_VMINVu8 /* 1250 */, ARM_INS_VMINV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmin${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VMINs16 /* 1251 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmin${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VMINs32 /* 1252 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmin${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VMINs8 /* 1253 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmin${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VMINu16 /* 1254 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmin${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VMINu32 /* 1255 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmin${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VMINu8 /* 1256 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladava${vp}.s16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVas16 /* 1257 */, ARM_INS_VMLADAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladava${vp}.s32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVas32 /* 1258 */, ARM_INS_VMLADAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladava${vp}.s8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVas8 /* 1259 */, ARM_INS_VMLADAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladava${vp}.u16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVau16 /* 1260 */, ARM_INS_VMLADAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladava${vp}.u32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVau32 /* 1261 */, ARM_INS_VMLADAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladava${vp}.u8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVau8 /* 1262 */, ARM_INS_VMLADAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladavax${vp}.s16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVaxs16 /* 1263 */, ARM_INS_VMLADAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladavax${vp}.s32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVaxs32 /* 1264 */, ARM_INS_VMLADAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladavax${vp}.s8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVaxs8 /* 1265 */, ARM_INS_VMLADAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladav${vp}.s16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVs16 /* 1266 */, ARM_INS_VMLADAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladav${vp}.s32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVs32 /* 1267 */, ARM_INS_VMLADAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladav${vp}.s8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVs8 /* 1268 */, ARM_INS_VMLADAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladav${vp}.u16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVu16 /* 1269 */, ARM_INS_VMLADAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladav${vp}.u32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVu32 /* 1270 */, ARM_INS_VMLADAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladav${vp}.u8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVu8 /* 1271 */, ARM_INS_VMLADAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladavx${vp}.s16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVxs16 /* 1272 */, ARM_INS_VMLADAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladavx${vp}.s32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVxs32 /* 1273 */, ARM_INS_VMLADAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmladavx${vp}.s8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLADAVxs8 /* 1274 */, ARM_INS_VMLADAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldava${vp}.s16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVas16 /* 1275 */, ARM_INS_VMLALDAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldava${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVas32 /* 1276 */, ARM_INS_VMLALDAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldava${vp}.u16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVau16 /* 1277 */, ARM_INS_VMLALDAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldava${vp}.u32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVau32 /* 1278 */, ARM_INS_VMLALDAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldavax${vp}.s16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVaxs16 /* 1279 */, ARM_INS_VMLALDAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldavax${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVaxs32 /* 1280 */, ARM_INS_VMLALDAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldav${vp}.s16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVs16 /* 1281 */, ARM_INS_VMLALDAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldav${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVs32 /* 1282 */, ARM_INS_VMLALDAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldav${vp}.u16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVu16 /* 1283 */, ARM_INS_VMLALDAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldav${vp}.u32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVu32 /* 1284 */, ARM_INS_VMLALDAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldavx${vp}.s16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVxs16 /* 1285 */, ARM_INS_VMLALDAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlaldavx${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLALDAVxs32 /* 1286 */, ARM_INS_VMLALDAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlas${vp}.i16 $Qd, $Qn, $Rm */
ARM_MVE_VMLAS_qr_i16 /* 1287 */, ARM_INS_VMLAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlas${vp}.i32 $Qd, $Qn, $Rm */
ARM_MVE_VMLAS_qr_i32 /* 1288 */, ARM_INS_VMLAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlas${vp}.i8 $Qd, $Qn, $Rm */
ARM_MVE_VMLAS_qr_i8 /* 1289 */, ARM_INS_VMLAS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmla${vp}.i16 $Qd, $Qn, $Rm */
ARM_MVE_VMLA_qr_i16 /* 1290 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmla${vp}.i32 $Qd, $Qn, $Rm */
ARM_MVE_VMLA_qr_i32 /* 1291 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmla${vp}.i8 $Qd, $Qn, $Rm */
ARM_MVE_VMLA_qr_i8 /* 1292 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdava${vp}.s16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVas16 /* 1293 */, ARM_INS_VMLSDAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdava${vp}.s32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVas32 /* 1294 */, ARM_INS_VMLSDAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdava${vp}.s8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVas8 /* 1295 */, ARM_INS_VMLSDAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdavax${vp}.s16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVaxs16 /* 1296 */, ARM_INS_VMLSDAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdavax${vp}.s32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVaxs32 /* 1297 */, ARM_INS_VMLSDAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdavax${vp}.s8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVaxs8 /* 1298 */, ARM_INS_VMLSDAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdav${vp}.s16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVs16 /* 1299 */, ARM_INS_VMLSDAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdav${vp}.s32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVs32 /* 1300 */, ARM_INS_VMLSDAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdav${vp}.s8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVs8 /* 1301 */, ARM_INS_VMLSDAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdavx${vp}.s16 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVxs16 /* 1302 */, ARM_INS_VMLSDAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdavx${vp}.s32 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVxs32 /* 1303 */, ARM_INS_VMLSDAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsdavx${vp}.s8 $RdaDest, $Qn, $Qm */
ARM_MVE_VMLSDAVxs8 /* 1304 */, ARM_INS_VMLSDAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsldava${vp}.s16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLSLDAVas16 /* 1305 */, ARM_INS_VMLSLDAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsldava${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLSLDAVas32 /* 1306 */, ARM_INS_VMLSLDAVA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsldavax${vp}.s16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLSLDAVaxs16 /* 1307 */, ARM_INS_VMLSLDAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsldavax${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLSLDAVaxs32 /* 1308 */, ARM_INS_VMLSLDAVAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsldav${vp}.s16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLSLDAVs16 /* 1309 */, ARM_INS_VMLSLDAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsldav${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLSLDAVs32 /* 1310 */, ARM_INS_VMLSLDAV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsldavx${vp}.s16 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLSLDAVxs16 /* 1311 */, ARM_INS_VMLSLDAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmlsldavx${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VMLSLDAVxs32 /* 1312 */, ARM_INS_VMLSLDAVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovlb${vp}.s16 $Qd, $Qm */
ARM_MVE_VMOVLs16bh /* 1313 */, ARM_INS_VMOVLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovlt${vp}.s16 $Qd, $Qm */
ARM_MVE_VMOVLs16th /* 1314 */, ARM_INS_VMOVLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovlb${vp}.s8 $Qd, $Qm */
ARM_MVE_VMOVLs8bh /* 1315 */, ARM_INS_VMOVLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovlt${vp}.s8 $Qd, $Qm */
ARM_MVE_VMOVLs8th /* 1316 */, ARM_INS_VMOVLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovlb${vp}.u16 $Qd, $Qm */
ARM_MVE_VMOVLu16bh /* 1317 */, ARM_INS_VMOVLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovlt${vp}.u16 $Qd, $Qm */
ARM_MVE_VMOVLu16th /* 1318 */, ARM_INS_VMOVLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovlb${vp}.u8 $Qd, $Qm */
ARM_MVE_VMOVLu8bh /* 1319 */, ARM_INS_VMOVLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovlt${vp}.u8 $Qd, $Qm */
ARM_MVE_VMOVLu8th /* 1320 */, ARM_INS_VMOVLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovnb${vp}.i16 $Qd, $Qm */
ARM_MVE_VMOVNi16bh /* 1321 */, ARM_INS_VMOVNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovnt${vp}.i16 $Qd, $Qm */
ARM_MVE_VMOVNi16th /* 1322 */, ARM_INS_VMOVNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovnb${vp}.i32 $Qd, $Qm */
ARM_MVE_VMOVNi32bh /* 1323 */, ARM_INS_VMOVNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmovnt${vp}.i32 $Qd, $Qm */
ARM_MVE_VMOVNi32th /* 1324 */, ARM_INS_VMOVNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${p}.32 $Rt, $Qd$Idx */
ARM_MVE_VMOV_from_lane_32 /* 1325 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegsV8_1M, 0 }, 0, 0
#endif
},
{
/* vmov${p}.s16 $Rt, $Qd$Idx */
ARM_MVE_VMOV_from_lane_s16 /* 1326 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${p}.s8 $Rt, $Qd$Idx */
ARM_MVE_VMOV_from_lane_s8 /* 1327 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${p}.u16 $Rt, $Qd$Idx */
ARM_MVE_VMOV_from_lane_u16 /* 1328 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${p}.u8 $Rt, $Qd$Idx */
ARM_MVE_VMOV_from_lane_u8 /* 1329 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${p} $Qd$idx, $QdSrc$idx2, $Rt, $Rt2 */
ARM_MVE_VMOV_q_rr /* 1330 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${p} $Rt, $Rt2, $Qd$idx, $Qd$idx2 */
ARM_MVE_VMOV_rr_q /* 1331 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${p}.16 $Qd$Idx, $Rt */
ARM_MVE_VMOV_to_lane_16 /* 1332 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${p}.32 $Qd$Idx, $Rt */
ARM_MVE_VMOV_to_lane_32 /* 1333 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegsV8_1M, 0 }, 0, 0
#endif
},
{
/* vmov${p}.8 $Qd$Idx, $Rt */
ARM_MVE_VMOV_to_lane_8 /* 1334 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${vp}.f32 $Qd, $imm */
ARM_MVE_VMOVimmf32 /* 1335 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${vp}.i16 $Qd, $imm */
ARM_MVE_VMOVimmi16 /* 1336 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${vp}.i32 $Qd, $imm */
ARM_MVE_VMOVimmi32 /* 1337 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${vp}.i64 $Qd, $imm */
ARM_MVE_VMOVimmi64 /* 1338 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmov${vp}.i8 $Qd, $imm */
ARM_MVE_VMOVimmi8 /* 1339 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmulh${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VMULHs16 /* 1340 */, ARM_INS_VMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmulh${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VMULHs32 /* 1341 */, ARM_INS_VMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmulh${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VMULHs8 /* 1342 */, ARM_INS_VMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmulh${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VMULHu16 /* 1343 */, ARM_INS_VMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmulh${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VMULHu32 /* 1344 */, ARM_INS_VMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmulh${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VMULHu8 /* 1345 */, ARM_INS_VMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullb${vp}.p16 $Qd, $Qn, $Qm */
ARM_MVE_VMULLBp16 /* 1346 */, ARM_INS_VMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullb${vp}.p8 $Qd, $Qn, $Qm */
ARM_MVE_VMULLBp8 /* 1347 */, ARM_INS_VMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullb${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VMULLBs16 /* 1348 */, ARM_INS_VMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullb${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VMULLBs32 /* 1349 */, ARM_INS_VMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullb${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VMULLBs8 /* 1350 */, ARM_INS_VMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullb${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VMULLBu16 /* 1351 */, ARM_INS_VMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullb${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VMULLBu32 /* 1352 */, ARM_INS_VMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullb${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VMULLBu8 /* 1353 */, ARM_INS_VMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullt${vp}.p16 $Qd, $Qn, $Qm */
ARM_MVE_VMULLTp16 /* 1354 */, ARM_INS_VMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullt${vp}.p8 $Qd, $Qn, $Qm */
ARM_MVE_VMULLTp8 /* 1355 */, ARM_INS_VMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullt${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VMULLTs16 /* 1356 */, ARM_INS_VMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullt${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VMULLTs32 /* 1357 */, ARM_INS_VMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullt${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VMULLTs8 /* 1358 */, ARM_INS_VMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullt${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VMULLTu16 /* 1359 */, ARM_INS_VMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullt${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VMULLTu32 /* 1360 */, ARM_INS_VMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmullt${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VMULLTu8 /* 1361 */, ARM_INS_VMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.f16 $Qd, $Qn, $Rm */
ARM_MVE_VMUL_qr_f16 /* 1362 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.f32 $Qd, $Qn, $Rm */
ARM_MVE_VMUL_qr_f32 /* 1363 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.i16 $Qd, $Qn, $Rm */
ARM_MVE_VMUL_qr_i16 /* 1364 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.i32 $Qd, $Qn, $Rm */
ARM_MVE_VMUL_qr_i32 /* 1365 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.i8 $Qd, $Qn, $Rm */
ARM_MVE_VMUL_qr_i8 /* 1366 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.f16 $Qd, $Qn, $Qm */
ARM_MVE_VMULf16 /* 1367 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.f32 $Qd, $Qn, $Qm */
ARM_MVE_VMULf32 /* 1368 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.i16 $Qd, $Qn, $Qm */
ARM_MVE_VMULi16 /* 1369 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.i32 $Qd, $Qn, $Qm */
ARM_MVE_VMULi32 /* 1370 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmul${vp}.i8 $Qd, $Qn, $Qm */
ARM_MVE_VMULi8 /* 1371 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmvn${vp} $Qd, $Qm */
ARM_MVE_VMVN /* 1372 */, ARM_INS_VMVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmvn${vp}.i16 $Qd, $imm */
ARM_MVE_VMVNimmi16 /* 1373 */, ARM_INS_VMVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmvn${vp}.i32 $Qd, $imm */
ARM_MVE_VMVNimmi32 /* 1374 */, ARM_INS_VMVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vneg${vp}.f16 $Qd, $Qm */
ARM_MVE_VNEGf16 /* 1375 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vneg${vp}.f32 $Qd, $Qm */
ARM_MVE_VNEGf32 /* 1376 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vneg${vp}.s16 $Qd, $Qm */
ARM_MVE_VNEGs16 /* 1377 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vneg${vp}.s32 $Qd, $Qm */
ARM_MVE_VNEGs32 /* 1378 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vneg${vp}.s8 $Qd, $Qm */
ARM_MVE_VNEGs8 /* 1379 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vorn${vp} $Qd, $Qn, $Qm */
ARM_MVE_VORN /* 1380 */, ARM_INS_VORN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vorr${vp} $Qd, $Qn, $Qm */
ARM_MVE_VORR /* 1381 */, ARM_INS_VORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vorr${vp}.i16 $Qd, $imm */
ARM_MVE_VORRimmi16 /* 1382 */, ARM_INS_VORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vorr${vp}.i32 $Qd, $imm */
ARM_MVE_VORRimmi32 /* 1383 */, ARM_INS_VORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpnot${vp} */
ARM_MVE_VPNOT /* 1384 */, ARM_INS_VPNOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpsel${vp} $Qd, $Qn, $Qm */
ARM_MVE_VPSEL /* 1385 */, ARM_INS_VPSEL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpst${Mk} */
ARM_MVE_VPST /* 1386 */, ARM_INS_VPST,
#ifndef CAPSTONE_DIET
{ ARM_REG_VPR, 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.i8 $fc, $Qn, $Qm */
ARM_MVE_VPTv16i8 /* 1387 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.i8 $fc, $Qn, $Rm */
ARM_MVE_VPTv16i8r /* 1388 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.s8 $fc, $Qn, $Qm */
ARM_MVE_VPTv16s8 /* 1389 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.s8 $fc, $Qn, $Rm */
ARM_MVE_VPTv16s8r /* 1390 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.u8 $fc, $Qn, $Qm */
ARM_MVE_VPTv16u8 /* 1391 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.u8 $fc, $Qn, $Rm */
ARM_MVE_VPTv16u8r /* 1392 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.f32 $fc, $Qn, $Qm */
ARM_MVE_VPTv4f32 /* 1393 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.f32 $fc, $Qn, $Rm */
ARM_MVE_VPTv4f32r /* 1394 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.i32 $fc, $Qn, $Qm */
ARM_MVE_VPTv4i32 /* 1395 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.i32 $fc, $Qn, $Rm */
ARM_MVE_VPTv4i32r /* 1396 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.s32 $fc, $Qn, $Qm */
ARM_MVE_VPTv4s32 /* 1397 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.s32 $fc, $Qn, $Rm */
ARM_MVE_VPTv4s32r /* 1398 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.u32 $fc, $Qn, $Qm */
ARM_MVE_VPTv4u32 /* 1399 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.u32 $fc, $Qn, $Rm */
ARM_MVE_VPTv4u32r /* 1400 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.f16 $fc, $Qn, $Qm */
ARM_MVE_VPTv8f16 /* 1401 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.f16 $fc, $Qn, $Rm */
ARM_MVE_VPTv8f16r /* 1402 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.i16 $fc, $Qn, $Qm */
ARM_MVE_VPTv8i16 /* 1403 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.i16 $fc, $Qn, $Rm */
ARM_MVE_VPTv8i16r /* 1404 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.s16 $fc, $Qn, $Qm */
ARM_MVE_VPTv8s16 /* 1405 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.s16 $fc, $Qn, $Rm */
ARM_MVE_VPTv8s16r /* 1406 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.u16 $fc, $Qn, $Qm */
ARM_MVE_VPTv8u16 /* 1407 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vpt${Mk}.u16 $fc, $Qn, $Rm */
ARM_MVE_VPTv8u16r /* 1408 */, ARM_INS_VPT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqabs${vp}.s16 $Qd, $Qm */
ARM_MVE_VQABSs16 /* 1409 */, ARM_INS_VQABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqabs${vp}.s32 $Qd, $Qm */
ARM_MVE_VQABSs32 /* 1410 */, ARM_INS_VQABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqabs${vp}.s8 $Qd, $Qm */
ARM_MVE_VQABSs8 /* 1411 */, ARM_INS_VQABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQADD_qr_s16 /* 1412 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQADD_qr_s32 /* 1413 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VQADD_qr_s8 /* 1414 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.u16 $Qd, $Qn, $Rm */
ARM_MVE_VQADD_qr_u16 /* 1415 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.u32 $Qd, $Qn, $Rm */
ARM_MVE_VQADD_qr_u32 /* 1416 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.u8 $Qd, $Qn, $Rm */
ARM_MVE_VQADD_qr_u8 /* 1417 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQADDs16 /* 1418 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQADDs32 /* 1419 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQADDs8 /* 1420 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VQADDu16 /* 1421 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VQADDu32 /* 1422 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqadd${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VQADDu8 /* 1423 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmladhx${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLADHXs16 /* 1424 */, ARM_INS_VQDMLADHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmladhx${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLADHXs32 /* 1425 */, ARM_INS_VQDMLADHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmladhx${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLADHXs8 /* 1426 */, ARM_INS_VQDMLADHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmladh${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLADHs16 /* 1427 */, ARM_INS_VQDMLADH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmladh${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLADHs32 /* 1428 */, ARM_INS_VQDMLADH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmladh${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLADHs8 /* 1429 */, ARM_INS_VQDMLADH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlah${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQDMLAH_qrs16 /* 1430 */, ARM_INS_VQDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlah${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQDMLAH_qrs32 /* 1431 */, ARM_INS_VQDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlah${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VQDMLAH_qrs8 /* 1432 */, ARM_INS_VQDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlash${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQDMLASH_qrs16 /* 1433 */, ARM_INS_VQDMLASH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlash${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQDMLASH_qrs32 /* 1434 */, ARM_INS_VQDMLASH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlash${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VQDMLASH_qrs8 /* 1435 */, ARM_INS_VQDMLASH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlsdhx${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLSDHXs16 /* 1436 */, ARM_INS_VQDMLSDHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlsdhx${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLSDHXs32 /* 1437 */, ARM_INS_VQDMLSDHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlsdhx${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLSDHXs8 /* 1438 */, ARM_INS_VQDMLSDHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlsdh${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLSDHs16 /* 1439 */, ARM_INS_VQDMLSDH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlsdh${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLSDHs32 /* 1440 */, ARM_INS_VQDMLSDH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmlsdh${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQDMLSDHs8 /* 1441 */, ARM_INS_VQDMLSDH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmulh${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQDMULH_qr_s16 /* 1442 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmulh${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQDMULH_qr_s32 /* 1443 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmulh${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VQDMULH_qr_s8 /* 1444 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmulh${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQDMULHi16 /* 1445 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmulh${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQDMULHi32 /* 1446 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmulh${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQDMULHi8 /* 1447 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmullb${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQDMULL_qr_s16bh /* 1448 */, ARM_INS_VQDMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmullt${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQDMULL_qr_s16th /* 1449 */, ARM_INS_VQDMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmullb${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQDMULL_qr_s32bh /* 1450 */, ARM_INS_VQDMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmullt${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQDMULL_qr_s32th /* 1451 */, ARM_INS_VQDMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmullb${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQDMULLs16bh /* 1452 */, ARM_INS_VQDMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmullt${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQDMULLs16th /* 1453 */, ARM_INS_VQDMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmullb${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQDMULLs32bh /* 1454 */, ARM_INS_VQDMULLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqdmullt${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQDMULLs32th /* 1455 */, ARM_INS_VQDMULLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovnb${vp}.s16 $Qd, $Qm */
ARM_MVE_VQMOVNs16bh /* 1456 */, ARM_INS_VQMOVNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovnt${vp}.s16 $Qd, $Qm */
ARM_MVE_VQMOVNs16th /* 1457 */, ARM_INS_VQMOVNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovnb${vp}.s32 $Qd, $Qm */
ARM_MVE_VQMOVNs32bh /* 1458 */, ARM_INS_VQMOVNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovnt${vp}.s32 $Qd, $Qm */
ARM_MVE_VQMOVNs32th /* 1459 */, ARM_INS_VQMOVNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovnb${vp}.u16 $Qd, $Qm */
ARM_MVE_VQMOVNu16bh /* 1460 */, ARM_INS_VQMOVNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovnt${vp}.u16 $Qd, $Qm */
ARM_MVE_VQMOVNu16th /* 1461 */, ARM_INS_VQMOVNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovnb${vp}.u32 $Qd, $Qm */
ARM_MVE_VQMOVNu32bh /* 1462 */, ARM_INS_VQMOVNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovnt${vp}.u32 $Qd, $Qm */
ARM_MVE_VQMOVNu32th /* 1463 */, ARM_INS_VQMOVNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovunb${vp}.s16 $Qd, $Qm */
ARM_MVE_VQMOVUNs16bh /* 1464 */, ARM_INS_VQMOVUNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovunt${vp}.s16 $Qd, $Qm */
ARM_MVE_VQMOVUNs16th /* 1465 */, ARM_INS_VQMOVUNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovunb${vp}.s32 $Qd, $Qm */
ARM_MVE_VQMOVUNs32bh /* 1466 */, ARM_INS_VQMOVUNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqmovunt${vp}.s32 $Qd, $Qm */
ARM_MVE_VQMOVUNs32th /* 1467 */, ARM_INS_VQMOVUNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqneg${vp}.s16 $Qd, $Qm */
ARM_MVE_VQNEGs16 /* 1468 */, ARM_INS_VQNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqneg${vp}.s32 $Qd, $Qm */
ARM_MVE_VQNEGs32 /* 1469 */, ARM_INS_VQNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqneg${vp}.s8 $Qd, $Qm */
ARM_MVE_VQNEGs8 /* 1470 */, ARM_INS_VQNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmladhx${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLADHXs16 /* 1471 */, ARM_INS_VQRDMLADHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmladhx${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLADHXs32 /* 1472 */, ARM_INS_VQRDMLADHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmladhx${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLADHXs8 /* 1473 */, ARM_INS_VQRDMLADHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmladh${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLADHs16 /* 1474 */, ARM_INS_VQRDMLADH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmladh${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLADHs32 /* 1475 */, ARM_INS_VQRDMLADH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmladh${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLADHs8 /* 1476 */, ARM_INS_VQRDMLADH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQRDMLAH_qrs16 /* 1477 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQRDMLAH_qrs32 /* 1478 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VQRDMLAH_qrs8 /* 1479 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlash${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQRDMLASH_qrs16 /* 1480 */, ARM_INS_VQRDMLASH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlash${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQRDMLASH_qrs32 /* 1481 */, ARM_INS_VQRDMLASH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlash${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VQRDMLASH_qrs8 /* 1482 */, ARM_INS_VQRDMLASH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlsdhx${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLSDHXs16 /* 1483 */, ARM_INS_VQRDMLSDHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlsdhx${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLSDHXs32 /* 1484 */, ARM_INS_VQRDMLSDHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlsdhx${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLSDHXs8 /* 1485 */, ARM_INS_VQRDMLSDHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlsdh${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLSDHs16 /* 1486 */, ARM_INS_VQRDMLSDH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlsdh${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLSDHs32 /* 1487 */, ARM_INS_VQRDMLSDH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmlsdh${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMLSDHs8 /* 1488 */, ARM_INS_VQRDMLSDH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQRDMULH_qr_s16 /* 1489 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQRDMULH_qr_s32 /* 1490 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VQRDMULH_qr_s8 /* 1491 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMULHi16 /* 1492 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMULHi32 /* 1493 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQRDMULHi8 /* 1494 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.s16 $Qd, $Qm, $Qn */
ARM_MVE_VQRSHL_by_vecs16 /* 1495 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.s32 $Qd, $Qm, $Qn */
ARM_MVE_VQRSHL_by_vecs32 /* 1496 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.s8 $Qd, $Qm, $Qn */
ARM_MVE_VQRSHL_by_vecs8 /* 1497 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.u16 $Qd, $Qm, $Qn */
ARM_MVE_VQRSHL_by_vecu16 /* 1498 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.u32 $Qd, $Qm, $Qn */
ARM_MVE_VQRSHL_by_vecu32 /* 1499 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.u8 $Qd, $Qm, $Qn */
ARM_MVE_VQRSHL_by_vecu8 /* 1500 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.s16 $Qd, $Rm */
ARM_MVE_VQRSHL_qrs16 /* 1501 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.s32 $Qd, $Rm */
ARM_MVE_VQRSHL_qrs32 /* 1502 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.s8 $Qd, $Rm */
ARM_MVE_VQRSHL_qrs8 /* 1503 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.u16 $Qd, $Rm */
ARM_MVE_VQRSHL_qru16 /* 1504 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.u32 $Qd, $Rm */
ARM_MVE_VQRSHL_qru32 /* 1505 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshl${vp}.u8 $Qd, $Rm */
ARM_MVE_VQRSHL_qru8 /* 1506 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrnb${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRNbhs16 /* 1507 */, ARM_INS_VQRSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrnb${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRNbhs32 /* 1508 */, ARM_INS_VQRSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrnb${vp}.u16 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRNbhu16 /* 1509 */, ARM_INS_VQRSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrnb${vp}.u32 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRNbhu32 /* 1510 */, ARM_INS_VQRSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrnt${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRNths16 /* 1511 */, ARM_INS_VQRSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrnt${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRNths32 /* 1512 */, ARM_INS_VQRSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrnt${vp}.u16 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRNthu16 /* 1513 */, ARM_INS_VQRSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrnt${vp}.u32 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRNthu32 /* 1514 */, ARM_INS_VQRSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrunb${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRUNs16bh /* 1515 */, ARM_INS_VQRSHRUNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrunt${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRUNs16th /* 1516 */, ARM_INS_VQRSHRUNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrunb${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRUNs32bh /* 1517 */, ARM_INS_VQRSHRUNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqrshrunt${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQRSHRUNs32th /* 1518 */, ARM_INS_VQRSHRUNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshlu${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQSHLU_imms16 /* 1519 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshlu${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQSHLU_imms32 /* 1520 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshlu${vp}.s8 $Qd, $Qm, $imm */
ARM_MVE_VQSHLU_imms8 /* 1521 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.s16 $Qd, $Qm, $Qn */
ARM_MVE_VQSHL_by_vecs16 /* 1522 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.s32 $Qd, $Qm, $Qn */
ARM_MVE_VQSHL_by_vecs32 /* 1523 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.s8 $Qd, $Qm, $Qn */
ARM_MVE_VQSHL_by_vecs8 /* 1524 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.u16 $Qd, $Qm, $Qn */
ARM_MVE_VQSHL_by_vecu16 /* 1525 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.u32 $Qd, $Qm, $Qn */
ARM_MVE_VQSHL_by_vecu32 /* 1526 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.u8 $Qd, $Qm, $Qn */
ARM_MVE_VQSHL_by_vecu8 /* 1527 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.s16 $Qd, $Rm */
ARM_MVE_VQSHL_qrs16 /* 1528 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.s32 $Qd, $Rm */
ARM_MVE_VQSHL_qrs32 /* 1529 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.s8 $Qd, $Rm */
ARM_MVE_VQSHL_qrs8 /* 1530 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.u16 $Qd, $Rm */
ARM_MVE_VQSHL_qru16 /* 1531 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.u32 $Qd, $Rm */
ARM_MVE_VQSHL_qru32 /* 1532 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.u8 $Qd, $Rm */
ARM_MVE_VQSHL_qru8 /* 1533 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQSHLimms16 /* 1534 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQSHLimms32 /* 1535 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.s8 $Qd, $Qm, $imm */
ARM_MVE_VQSHLimms8 /* 1536 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.u16 $Qd, $Qm, $imm */
ARM_MVE_VQSHLimmu16 /* 1537 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.u32 $Qd, $Qm, $imm */
ARM_MVE_VQSHLimmu32 /* 1538 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshl${vp}.u8 $Qd, $Qm, $imm */
ARM_MVE_VQSHLimmu8 /* 1539 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrnb${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQSHRNbhs16 /* 1540 */, ARM_INS_VQSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrnb${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQSHRNbhs32 /* 1541 */, ARM_INS_VQSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrnb${vp}.u16 $Qd, $Qm, $imm */
ARM_MVE_VQSHRNbhu16 /* 1542 */, ARM_INS_VQSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrnb${vp}.u32 $Qd, $Qm, $imm */
ARM_MVE_VQSHRNbhu32 /* 1543 */, ARM_INS_VQSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrnt${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQSHRNths16 /* 1544 */, ARM_INS_VQSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrnt${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQSHRNths32 /* 1545 */, ARM_INS_VQSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrnt${vp}.u16 $Qd, $Qm, $imm */
ARM_MVE_VQSHRNthu16 /* 1546 */, ARM_INS_VQSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrnt${vp}.u32 $Qd, $Qm, $imm */
ARM_MVE_VQSHRNthu32 /* 1547 */, ARM_INS_VQSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrunb${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQSHRUNs16bh /* 1548 */, ARM_INS_VQSHRUNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrunt${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VQSHRUNs16th /* 1549 */, ARM_INS_VQSHRUNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrunb${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQSHRUNs32bh /* 1550 */, ARM_INS_VQSHRUNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqshrunt${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VQSHRUNs32th /* 1551 */, ARM_INS_VQSHRUNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.s16 $Qd, $Qn, $Rm */
ARM_MVE_VQSUB_qr_s16 /* 1552 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.s32 $Qd, $Qn, $Rm */
ARM_MVE_VQSUB_qr_s32 /* 1553 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.s8 $Qd, $Qn, $Rm */
ARM_MVE_VQSUB_qr_s8 /* 1554 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.u16 $Qd, $Qn, $Rm */
ARM_MVE_VQSUB_qr_u16 /* 1555 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.u32 $Qd, $Qn, $Rm */
ARM_MVE_VQSUB_qr_u32 /* 1556 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.u8 $Qd, $Qn, $Rm */
ARM_MVE_VQSUB_qr_u8 /* 1557 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VQSUBs16 /* 1558 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VQSUBs32 /* 1559 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VQSUBs8 /* 1560 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VQSUBu16 /* 1561 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VQSUBu32 /* 1562 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vqsub${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VQSUBu8 /* 1563 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrev16${vp}.8 $Qd, $Qm */
ARM_MVE_VREV16_8 /* 1564 */, ARM_INS_VREV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrev32${vp}.16 $Qd, $Qm */
ARM_MVE_VREV32_16 /* 1565 */, ARM_INS_VREV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrev32${vp}.8 $Qd, $Qm */
ARM_MVE_VREV32_8 /* 1566 */, ARM_INS_VREV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrev64${vp}.16 $Qd, $Qm */
ARM_MVE_VREV64_16 /* 1567 */, ARM_INS_VREV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrev64${vp}.32 $Qd, $Qm */
ARM_MVE_VREV64_32 /* 1568 */, ARM_INS_VREV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrev64${vp}.8 $Qd, $Qm */
ARM_MVE_VREV64_8 /* 1569 */, ARM_INS_VREV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrhadd${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VRHADDs16 /* 1570 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrhadd${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VRHADDs32 /* 1571 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrhadd${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VRHADDs8 /* 1572 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrhadd${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VRHADDu16 /* 1573 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrhadd${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VRHADDu32 /* 1574 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrhadd${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VRHADDu8 /* 1575 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrinta${vp}.f16 $Qd, $Qm */
ARM_MVE_VRINTf16A /* 1576 */, ARM_INS_VRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintm${vp}.f16 $Qd, $Qm */
ARM_MVE_VRINTf16M /* 1577 */, ARM_INS_VRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintn${vp}.f16 $Qd, $Qm */
ARM_MVE_VRINTf16N /* 1578 */, ARM_INS_VRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintp${vp}.f16 $Qd, $Qm */
ARM_MVE_VRINTf16P /* 1579 */, ARM_INS_VRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintx${vp}.f16 $Qd, $Qm */
ARM_MVE_VRINTf16X /* 1580 */, ARM_INS_VRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintz${vp}.f16 $Qd, $Qm */
ARM_MVE_VRINTf16Z /* 1581 */, ARM_INS_VRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrinta${vp}.f32 $Qd, $Qm */
ARM_MVE_VRINTf32A /* 1582 */, ARM_INS_VRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintm${vp}.f32 $Qd, $Qm */
ARM_MVE_VRINTf32M /* 1583 */, ARM_INS_VRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintn${vp}.f32 $Qd, $Qm */
ARM_MVE_VRINTf32N /* 1584 */, ARM_INS_VRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintp${vp}.f32 $Qd, $Qm */
ARM_MVE_VRINTf32P /* 1585 */, ARM_INS_VRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintx${vp}.f32 $Qd, $Qm */
ARM_MVE_VRINTf32X /* 1586 */, ARM_INS_VRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrintz${vp}.f32 $Qd, $Qm */
ARM_MVE_VRINTf32Z /* 1587 */, ARM_INS_VRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vrmlaldavha${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLALDAVHas32 /* 1588 */, ARM_INS_VRMLALDAVHA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmlaldavha${vp}.u32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLALDAVHau32 /* 1589 */, ARM_INS_VRMLALDAVHA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmlaldavhax${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLALDAVHaxs32 /* 1590 */, ARM_INS_VRMLALDAVHAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmlaldavh${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLALDAVHs32 /* 1591 */, ARM_INS_VRMLALDAVH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmlaldavh${vp}.u32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLALDAVHu32 /* 1592 */, ARM_INS_VRMLALDAVH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmlaldavhx${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLALDAVHxs32 /* 1593 */, ARM_INS_VRMLALDAVHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmlsldavha${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLSLDAVHas32 /* 1594 */, ARM_INS_VRMLSLDAVHA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmlsldavhax${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLSLDAVHaxs32 /* 1595 */, ARM_INS_VRMLSLDAVHAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmlsldavh${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLSLDAVHs32 /* 1596 */, ARM_INS_VRMLSLDAVH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmlsldavhx${vp}.s32 $RdaLoDest, $RdaHiDest, $Qn, $Qm */
ARM_MVE_VRMLSLDAVHxs32 /* 1597 */, ARM_INS_VRMLSLDAVHX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmulh${vp}.s16 $Qd, $Qn, $Qm */
ARM_MVE_VRMULHs16 /* 1598 */, ARM_INS_VRMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmulh${vp}.s32 $Qd, $Qn, $Qm */
ARM_MVE_VRMULHs32 /* 1599 */, ARM_INS_VRMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmulh${vp}.s8 $Qd, $Qn, $Qm */
ARM_MVE_VRMULHs8 /* 1600 */, ARM_INS_VRMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmulh${vp}.u16 $Qd, $Qn, $Qm */
ARM_MVE_VRMULHu16 /* 1601 */, ARM_INS_VRMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmulh${vp}.u32 $Qd, $Qn, $Qm */
ARM_MVE_VRMULHu32 /* 1602 */, ARM_INS_VRMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrmulh${vp}.u8 $Qd, $Qn, $Qm */
ARM_MVE_VRMULHu8 /* 1603 */, ARM_INS_VRMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.s16 $Qd, $Qm, $Qn */
ARM_MVE_VRSHL_by_vecs16 /* 1604 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.s32 $Qd, $Qm, $Qn */
ARM_MVE_VRSHL_by_vecs32 /* 1605 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.s8 $Qd, $Qm, $Qn */
ARM_MVE_VRSHL_by_vecs8 /* 1606 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.u16 $Qd, $Qm, $Qn */
ARM_MVE_VRSHL_by_vecu16 /* 1607 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.u32 $Qd, $Qm, $Qn */
ARM_MVE_VRSHL_by_vecu32 /* 1608 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.u8 $Qd, $Qm, $Qn */
ARM_MVE_VRSHL_by_vecu8 /* 1609 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.s16 $Qd, $Rm */
ARM_MVE_VRSHL_qrs16 /* 1610 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.s32 $Qd, $Rm */
ARM_MVE_VRSHL_qrs32 /* 1611 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.s8 $Qd, $Rm */
ARM_MVE_VRSHL_qrs8 /* 1612 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.u16 $Qd, $Rm */
ARM_MVE_VRSHL_qru16 /* 1613 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.u32 $Qd, $Rm */
ARM_MVE_VRSHL_qru32 /* 1614 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshl${vp}.u8 $Qd, $Rm */
ARM_MVE_VRSHL_qru8 /* 1615 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshrnb${vp}.i16 $Qd, $Qm, $imm */
ARM_MVE_VRSHRNi16bh /* 1616 */, ARM_INS_VRSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshrnt${vp}.i16 $Qd, $Qm, $imm */
ARM_MVE_VRSHRNi16th /* 1617 */, ARM_INS_VRSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshrnb${vp}.i32 $Qd, $Qm, $imm */
ARM_MVE_VRSHRNi32bh /* 1618 */, ARM_INS_VRSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshrnt${vp}.i32 $Qd, $Qm, $imm */
ARM_MVE_VRSHRNi32th /* 1619 */, ARM_INS_VRSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshr${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VRSHR_imms16 /* 1620 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshr${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VRSHR_imms32 /* 1621 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshr${vp}.s8 $Qd, $Qm, $imm */
ARM_MVE_VRSHR_imms8 /* 1622 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshr${vp}.u16 $Qd, $Qm, $imm */
ARM_MVE_VRSHR_immu16 /* 1623 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshr${vp}.u32 $Qd, $Qm, $imm */
ARM_MVE_VRSHR_immu32 /* 1624 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vrshr${vp}.u8 $Qd, $Qm, $imm */
ARM_MVE_VRSHR_immu8 /* 1625 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsbc${vp}.i32 $Qd, $Qn, $Qm */
ARM_MVE_VSBC /* 1626 */, ARM_INS_VSBC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsbci${vp}.i32 $Qd, $Qn, $Qm */
ARM_MVE_VSBCI /* 1627 */, ARM_INS_VSBCI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshlc${vp} $QdSrc, $RdmSrc, $imm */
ARM_MVE_VSHLC /* 1628 */, ARM_INS_VSHLC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllb${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VSHLL_imms16bh /* 1629 */, ARM_INS_VSHLLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllt${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VSHLL_imms16th /* 1630 */, ARM_INS_VSHLLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllb${vp}.s8 $Qd, $Qm, $imm */
ARM_MVE_VSHLL_imms8bh /* 1631 */, ARM_INS_VSHLLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllt${vp}.s8 $Qd, $Qm, $imm */
ARM_MVE_VSHLL_imms8th /* 1632 */, ARM_INS_VSHLLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllb${vp}.u16 $Qd, $Qm, $imm */
ARM_MVE_VSHLL_immu16bh /* 1633 */, ARM_INS_VSHLLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllt${vp}.u16 $Qd, $Qm, $imm */
ARM_MVE_VSHLL_immu16th /* 1634 */, ARM_INS_VSHLLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllb${vp}.u8 $Qd, $Qm, $imm */
ARM_MVE_VSHLL_immu8bh /* 1635 */, ARM_INS_VSHLLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllt${vp}.u8 $Qd, $Qm, $imm */
ARM_MVE_VSHLL_immu8th /* 1636 */, ARM_INS_VSHLLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllb${vp}.s16 $Qd, $Qm, #16 */
ARM_MVE_VSHLL_lws16bh /* 1637 */, ARM_INS_VSHLLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllt${vp}.s16 $Qd, $Qm, #16 */
ARM_MVE_VSHLL_lws16th /* 1638 */, ARM_INS_VSHLLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllb${vp}.s8 $Qd, $Qm, #8 */
ARM_MVE_VSHLL_lws8bh /* 1639 */, ARM_INS_VSHLLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllt${vp}.s8 $Qd, $Qm, #8 */
ARM_MVE_VSHLL_lws8th /* 1640 */, ARM_INS_VSHLLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllb${vp}.u16 $Qd, $Qm, #16 */
ARM_MVE_VSHLL_lwu16bh /* 1641 */, ARM_INS_VSHLLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllt${vp}.u16 $Qd, $Qm, #16 */
ARM_MVE_VSHLL_lwu16th /* 1642 */, ARM_INS_VSHLLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllb${vp}.u8 $Qd, $Qm, #8 */
ARM_MVE_VSHLL_lwu8bh /* 1643 */, ARM_INS_VSHLLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshllt${vp}.u8 $Qd, $Qm, #8 */
ARM_MVE_VSHLL_lwu8th /* 1644 */, ARM_INS_VSHLLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.s16 $Qd, $Qm, $Qn */
ARM_MVE_VSHL_by_vecs16 /* 1645 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.s32 $Qd, $Qm, $Qn */
ARM_MVE_VSHL_by_vecs32 /* 1646 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.s8 $Qd, $Qm, $Qn */
ARM_MVE_VSHL_by_vecs8 /* 1647 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.u16 $Qd, $Qm, $Qn */
ARM_MVE_VSHL_by_vecu16 /* 1648 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.u32 $Qd, $Qm, $Qn */
ARM_MVE_VSHL_by_vecu32 /* 1649 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.u8 $Qd, $Qm, $Qn */
ARM_MVE_VSHL_by_vecu8 /* 1650 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.i16 $Qd, $Qm, $imm */
ARM_MVE_VSHL_immi16 /* 1651 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.i32 $Qd, $Qm, $imm */
ARM_MVE_VSHL_immi32 /* 1652 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.i8 $Qd, $Qm, $imm */
ARM_MVE_VSHL_immi8 /* 1653 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.s16 $Qd, $Rm */
ARM_MVE_VSHL_qrs16 /* 1654 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.s32 $Qd, $Rm */
ARM_MVE_VSHL_qrs32 /* 1655 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.s8 $Qd, $Rm */
ARM_MVE_VSHL_qrs8 /* 1656 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.u16 $Qd, $Rm */
ARM_MVE_VSHL_qru16 /* 1657 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.u32 $Qd, $Rm */
ARM_MVE_VSHL_qru32 /* 1658 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshl${vp}.u8 $Qd, $Rm */
ARM_MVE_VSHL_qru8 /* 1659 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshrnb${vp}.i16 $Qd, $Qm, $imm */
ARM_MVE_VSHRNi16bh /* 1660 */, ARM_INS_VSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshrnt${vp}.i16 $Qd, $Qm, $imm */
ARM_MVE_VSHRNi16th /* 1661 */, ARM_INS_VSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshrnb${vp}.i32 $Qd, $Qm, $imm */
ARM_MVE_VSHRNi32bh /* 1662 */, ARM_INS_VSHRNB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshrnt${vp}.i32 $Qd, $Qm, $imm */
ARM_MVE_VSHRNi32th /* 1663 */, ARM_INS_VSHRNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshr${vp}.s16 $Qd, $Qm, $imm */
ARM_MVE_VSHR_imms16 /* 1664 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshr${vp}.s32 $Qd, $Qm, $imm */
ARM_MVE_VSHR_imms32 /* 1665 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshr${vp}.s8 $Qd, $Qm, $imm */
ARM_MVE_VSHR_imms8 /* 1666 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshr${vp}.u16 $Qd, $Qm, $imm */
ARM_MVE_VSHR_immu16 /* 1667 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshr${vp}.u32 $Qd, $Qm, $imm */
ARM_MVE_VSHR_immu32 /* 1668 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vshr${vp}.u8 $Qd, $Qm, $imm */
ARM_MVE_VSHR_immu8 /* 1669 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsli${vp}.16 $Qd, $Qm, $imm */
ARM_MVE_VSLIimm16 /* 1670 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsli${vp}.32 $Qd, $Qm, $imm */
ARM_MVE_VSLIimm32 /* 1671 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsli${vp}.8 $Qd, $Qm, $imm */
ARM_MVE_VSLIimm8 /* 1672 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsri${vp}.16 $Qd, $Qm, $imm */
ARM_MVE_VSRIimm16 /* 1673 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsri${vp}.32 $Qd, $Qm, $imm */
ARM_MVE_VSRIimm32 /* 1674 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsri${vp}.8 $Qd, $Qm, $imm */
ARM_MVE_VSRIimm8 /* 1675 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst20.16 $VQd, $Rn */
ARM_MVE_VST20_16 /* 1676 */, ARM_INS_VST20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst20.16 $VQd, $Rn! */
ARM_MVE_VST20_16_wb /* 1677 */, ARM_INS_VST20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst20.32 $VQd, $Rn */
ARM_MVE_VST20_32 /* 1678 */, ARM_INS_VST20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst20.32 $VQd, $Rn! */
ARM_MVE_VST20_32_wb /* 1679 */, ARM_INS_VST20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst20.8 $VQd, $Rn */
ARM_MVE_VST20_8 /* 1680 */, ARM_INS_VST20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst20.8 $VQd, $Rn! */
ARM_MVE_VST20_8_wb /* 1681 */, ARM_INS_VST20,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst21.16 $VQd, $Rn */
ARM_MVE_VST21_16 /* 1682 */, ARM_INS_VST21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst21.16 $VQd, $Rn! */
ARM_MVE_VST21_16_wb /* 1683 */, ARM_INS_VST21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst21.32 $VQd, $Rn */
ARM_MVE_VST21_32 /* 1684 */, ARM_INS_VST21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst21.32 $VQd, $Rn! */
ARM_MVE_VST21_32_wb /* 1685 */, ARM_INS_VST21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst21.8 $VQd, $Rn */
ARM_MVE_VST21_8 /* 1686 */, ARM_INS_VST21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst21.8 $VQd, $Rn! */
ARM_MVE_VST21_8_wb /* 1687 */, ARM_INS_VST21,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst40.16 $VQd, $Rn */
ARM_MVE_VST40_16 /* 1688 */, ARM_INS_VST40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst40.16 $VQd, $Rn! */
ARM_MVE_VST40_16_wb /* 1689 */, ARM_INS_VST40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst40.32 $VQd, $Rn */
ARM_MVE_VST40_32 /* 1690 */, ARM_INS_VST40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst40.32 $VQd, $Rn! */
ARM_MVE_VST40_32_wb /* 1691 */, ARM_INS_VST40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst40.8 $VQd, $Rn */
ARM_MVE_VST40_8 /* 1692 */, ARM_INS_VST40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst40.8 $VQd, $Rn! */
ARM_MVE_VST40_8_wb /* 1693 */, ARM_INS_VST40,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst41.16 $VQd, $Rn */
ARM_MVE_VST41_16 /* 1694 */, ARM_INS_VST41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst41.16 $VQd, $Rn! */
ARM_MVE_VST41_16_wb /* 1695 */, ARM_INS_VST41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst41.32 $VQd, $Rn */
ARM_MVE_VST41_32 /* 1696 */, ARM_INS_VST41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst41.32 $VQd, $Rn! */
ARM_MVE_VST41_32_wb /* 1697 */, ARM_INS_VST41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst41.8 $VQd, $Rn */
ARM_MVE_VST41_8 /* 1698 */, ARM_INS_VST41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst41.8 $VQd, $Rn! */
ARM_MVE_VST41_8_wb /* 1699 */, ARM_INS_VST41,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst42.16 $VQd, $Rn */
ARM_MVE_VST42_16 /* 1700 */, ARM_INS_VST42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst42.16 $VQd, $Rn! */
ARM_MVE_VST42_16_wb /* 1701 */, ARM_INS_VST42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst42.32 $VQd, $Rn */
ARM_MVE_VST42_32 /* 1702 */, ARM_INS_VST42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst42.32 $VQd, $Rn! */
ARM_MVE_VST42_32_wb /* 1703 */, ARM_INS_VST42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst42.8 $VQd, $Rn */
ARM_MVE_VST42_8 /* 1704 */, ARM_INS_VST42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst42.8 $VQd, $Rn! */
ARM_MVE_VST42_8_wb /* 1705 */, ARM_INS_VST42,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst43.16 $VQd, $Rn */
ARM_MVE_VST43_16 /* 1706 */, ARM_INS_VST43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst43.16 $VQd, $Rn! */
ARM_MVE_VST43_16_wb /* 1707 */, ARM_INS_VST43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst43.32 $VQd, $Rn */
ARM_MVE_VST43_32 /* 1708 */, ARM_INS_VST43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst43.32 $VQd, $Rn! */
ARM_MVE_VST43_32_wb /* 1709 */, ARM_INS_VST43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst43.8 $VQd, $Rn */
ARM_MVE_VST43_8 /* 1710 */, ARM_INS_VST43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vst43.8 $VQd, $Rn! */
ARM_MVE_VST43_8_wb /* 1711 */, ARM_INS_VST43,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.16 $Qd, $addr */
ARM_MVE_VSTRB16 /* 1712 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.16 $Qd, $Rn$addr */
ARM_MVE_VSTRB16_post /* 1713 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.16 $Qd, $addr! */
ARM_MVE_VSTRB16_pre /* 1714 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.16 $Qd, $addr */
ARM_MVE_VSTRB16_rq /* 1715 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.32 $Qd, $addr */
ARM_MVE_VSTRB32 /* 1716 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.32 $Qd, $Rn$addr */
ARM_MVE_VSTRB32_post /* 1717 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.32 $Qd, $addr! */
ARM_MVE_VSTRB32_pre /* 1718 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.32 $Qd, $addr */
ARM_MVE_VSTRB32_rq /* 1719 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.8 $Qd, $addr */
ARM_MVE_VSTRB8_rq /* 1720 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.8 $Qd, $addr */
ARM_MVE_VSTRBU8 /* 1721 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.8 $Qd, $Rn$addr */
ARM_MVE_VSTRBU8_post /* 1722 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrb${vp}.8 $Qd, $addr! */
ARM_MVE_VSTRBU8_pre /* 1723 */, ARM_INS_VSTRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrd${vp}.64 $Qd, $addr */
ARM_MVE_VSTRD64_qi /* 1724 */, ARM_INS_VSTRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrd${vp}.64 $Qd, $addr! */
ARM_MVE_VSTRD64_qi_pre /* 1725 */, ARM_INS_VSTRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrd${vp}.64 $Qd, $addr */
ARM_MVE_VSTRD64_rq /* 1726 */, ARM_INS_VSTRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrd${vp}.64 $Qd, $addr */
ARM_MVE_VSTRD64_rq_u /* 1727 */, ARM_INS_VSTRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.16 $Qd, $addr */
ARM_MVE_VSTRH16_rq /* 1728 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.16 $Qd, $addr */
ARM_MVE_VSTRH16_rq_u /* 1729 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.32 $Qd, $addr */
ARM_MVE_VSTRH32 /* 1730 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.32 $Qd, $Rn$addr */
ARM_MVE_VSTRH32_post /* 1731 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.32 $Qd, $addr! */
ARM_MVE_VSTRH32_pre /* 1732 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.32 $Qd, $addr */
ARM_MVE_VSTRH32_rq /* 1733 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.32 $Qd, $addr */
ARM_MVE_VSTRH32_rq_u /* 1734 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.16 $Qd, $addr */
ARM_MVE_VSTRHU16 /* 1735 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.16 $Qd, $Rn$addr */
ARM_MVE_VSTRHU16_post /* 1736 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrh${vp}.16 $Qd, $addr! */
ARM_MVE_VSTRHU16_pre /* 1737 */, ARM_INS_VSTRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrw${vp}.32 $Qd, $addr */
ARM_MVE_VSTRW32_qi /* 1738 */, ARM_INS_VSTRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrw${vp}.32 $Qd, $addr! */
ARM_MVE_VSTRW32_qi_pre /* 1739 */, ARM_INS_VSTRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrw${vp}.32 $Qd, $addr */
ARM_MVE_VSTRW32_rq /* 1740 */, ARM_INS_VSTRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrw${vp}.32 $Qd, $addr */
ARM_MVE_VSTRW32_rq_u /* 1741 */, ARM_INS_VSTRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrw${vp}.32 $Qd, $addr */
ARM_MVE_VSTRWU32 /* 1742 */, ARM_INS_VSTRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrw${vp}.32 $Qd, $Rn$addr */
ARM_MVE_VSTRWU32_post /* 1743 */, ARM_INS_VSTRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstrw${vp}.32 $Qd, $addr! */
ARM_MVE_VSTRWU32_pre /* 1744 */, ARM_INS_VSTRW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.f16 $Qd, $Qn, $Rm */
ARM_MVE_VSUB_qr_f16 /* 1745 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.f32 $Qd, $Qn, $Rm */
ARM_MVE_VSUB_qr_f32 /* 1746 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.i16 $Qd, $Qn, $Rm */
ARM_MVE_VSUB_qr_i16 /* 1747 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.i32 $Qd, $Qn, $Rm */
ARM_MVE_VSUB_qr_i32 /* 1748 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.i8 $Qd, $Qn, $Rm */
ARM_MVE_VSUB_qr_i8 /* 1749 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.f16 $Qd, $Qn, $Qm */
ARM_MVE_VSUBf16 /* 1750 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.f32 $Qd, $Qn, $Qm */
ARM_MVE_VSUBf32 /* 1751 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEFloat, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.i16 $Qd, $Qn, $Qm */
ARM_MVE_VSUBi16 /* 1752 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.i32 $Qd, $Qn, $Qm */
ARM_MVE_VSUBi32 /* 1753 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsub${vp}.i8 $Qd, $Qn, $Qm */
ARM_MVE_VSUBi8 /* 1754 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* wlstp.16 $LR, $Rn, $label */
ARM_MVE_WLSTP_16 /* 1755 */, ARM_INS_WLSTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_HasMVEInt, 0 }, 1, 0
#endif
},
{
/* wlstp.32 $LR, $Rn, $label */
ARM_MVE_WLSTP_32 /* 1756 */, ARM_INS_WLSTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_HasMVEInt, 0 }, 1, 0
#endif
},
{
/* wlstp.64 $LR, $Rn, $label */
ARM_MVE_WLSTP_64 /* 1757 */, ARM_INS_WLSTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_HasMVEInt, 0 }, 1, 0
#endif
},
{
/* wlstp.8 $LR, $Rn, $label */
ARM_MVE_WLSTP_8 /* 1758 */, ARM_INS_WLSTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_HasMVEInt, 0 }, 1, 0
#endif
},
{
/* mvn${s}${p} $Rd, $imm */
ARM_MVNi /* 1759 */, ARM_INS_MVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mvn${s}${p} $Rd, $Rm */
ARM_MVNr /* 1760 */, ARM_INS_MVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mvn${s}${p} $Rd, $shift */
ARM_MVNsi /* 1761 */, ARM_INS_MVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* mvn${s}${p} $Rd, $shift */
ARM_MVNsr /* 1762 */, ARM_INS_MVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* vmaxnm.f32 $Vd, $Vn, $Vm */
ARM_NEON_VMAXNMNDf /* 1763 */, ARM_INS_VMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmaxnm.f16 $Vd, $Vn, $Vm */
ARM_NEON_VMAXNMNDh /* 1764 */, ARM_INS_VMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmaxnm.f32 $Vd, $Vn, $Vm */
ARM_NEON_VMAXNMNQf /* 1765 */, ARM_INS_VMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmaxnm.f16 $Vd, $Vn, $Vm */
ARM_NEON_VMAXNMNQh /* 1766 */, ARM_INS_VMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vminnm.f32 $Vd, $Vn, $Vm */
ARM_NEON_VMINNMNDf /* 1767 */, ARM_INS_VMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vminnm.f16 $Vd, $Vn, $Vm */
ARM_NEON_VMINNMNDh /* 1768 */, ARM_INS_VMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vminnm.f32 $Vd, $Vn, $Vm */
ARM_NEON_VMINNMNQf /* 1769 */, ARM_INS_VMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vminnm.f16 $Vd, $Vn, $Vm */
ARM_NEON_VMINNMNQh /* 1770 */, ARM_INS_VMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* orr${s}${p} $Rd, $Rn, $imm */
ARM_ORRri /* 1771 */, ARM_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* orr${s}${p} $Rd, $Rn, $Rm */
ARM_ORRrr /* 1772 */, ARM_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* orr${s}${p} $Rd, $Rn, $shift */
ARM_ORRrsi /* 1773 */, ARM_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* orr${s}${p} $Rd, $Rn, $shift */
ARM_ORRrsr /* 1774 */, ARM_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* pkhbt${p} $Rd, $Rn, $Rm$sh */
ARM_PKHBT /* 1775 */, ARM_INS_PKHBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* pkhtb${p} $Rd, $Rn, $Rm$sh */
ARM_PKHTB /* 1776 */, ARM_INS_PKHTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* pldw $addr */
ARM_PLDWi12 /* 1777 */, ARM_INS_PLDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV7, ARM_FEATURE_HasMP, 0 }, 0, 0
#endif
},
{
/* pldw $shift */
ARM_PLDWrs /* 1778 */, ARM_INS_PLDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV7, ARM_FEATURE_HasMP, 0 }, 0, 0
#endif
},
{
/* pld $addr */
ARM_PLDi12 /* 1779 */, ARM_INS_PLD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* pld $shift */
ARM_PLDrs /* 1780 */, ARM_INS_PLD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* pli $addr */
ARM_PLIi12 /* 1781 */, ARM_INS_PLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV7, 0 }, 0, 0
#endif
},
{
/* pli $shift */
ARM_PLIrs /* 1782 */, ARM_INS_PLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV7, 0 }, 0, 0
#endif
},
{
/* qadd${p} $Rd, $Rm, $Rn */
ARM_QADD /* 1783 */, ARM_INS_QADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* qadd16${p} $Rd, $Rn, $Rm */
ARM_QADD16 /* 1784 */, ARM_INS_QADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* qadd8${p} $Rd, $Rn, $Rm */
ARM_QADD8 /* 1785 */, ARM_INS_QADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* qasx${p} $Rd, $Rn, $Rm */
ARM_QASX /* 1786 */, ARM_INS_QASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* qdadd${p} $Rd, $Rm, $Rn */
ARM_QDADD /* 1787 */, ARM_INS_QDADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* qdsub${p} $Rd, $Rm, $Rn */
ARM_QDSUB /* 1788 */, ARM_INS_QDSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* qsax${p} $Rd, $Rn, $Rm */
ARM_QSAX /* 1789 */, ARM_INS_QSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* qsub${p} $Rd, $Rm, $Rn */
ARM_QSUB /* 1790 */, ARM_INS_QSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* qsub16${p} $Rd, $Rn, $Rm */
ARM_QSUB16 /* 1791 */, ARM_INS_QSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* qsub8${p} $Rd, $Rn, $Rm */
ARM_QSUB8 /* 1792 */, ARM_INS_QSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rbit${p} $Rd, $Rm */
ARM_RBIT /* 1793 */, ARM_INS_RBIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6T2, 0 }, 0, 0
#endif
},
{
/* rev${p} $Rd, $Rm */
ARM_REV /* 1794 */, ARM_INS_REV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* rev16${p} $Rd, $Rm */
ARM_REV16 /* 1795 */, ARM_INS_REV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* revsh${p} $Rd, $Rm */
ARM_REVSH /* 1796 */, ARM_INS_REVSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* rfeda $Rn */
ARM_RFEDA /* 1797 */, ARM_INS_RFEDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rfeda $Rn! */
ARM_RFEDA_UPD /* 1798 */, ARM_INS_RFEDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rfedb $Rn */
ARM_RFEDB /* 1799 */, ARM_INS_RFEDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rfedb $Rn! */
ARM_RFEDB_UPD /* 1800 */, ARM_INS_RFEDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rfeia $Rn */
ARM_RFEIA /* 1801 */, ARM_INS_RFEIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rfeia $Rn! */
ARM_RFEIA_UPD /* 1802 */, ARM_INS_RFEIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rfeib $Rn */
ARM_RFEIB /* 1803 */, ARM_INS_RFEIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rfeib $Rn! */
ARM_RFEIB_UPD /* 1804 */, ARM_INS_RFEIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rsb${s}${p} $Rd, $Rn, $imm */
ARM_RSBri /* 1805 */, ARM_INS_RSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rsb${s}${p} $Rd, $Rn, $Rm */
ARM_RSBrr /* 1806 */, ARM_INS_RSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rsb${s}${p} $Rd, $Rn, $shift */
ARM_RSBrsi /* 1807 */, ARM_INS_RSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rsb${s}${p} $Rd, $Rn, $shift */
ARM_RSBrsr /* 1808 */, ARM_INS_RSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rsc${s}${p} $Rd, $Rn, $imm */
ARM_RSCri /* 1809 */, ARM_INS_RSC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rsc${s}${p} $Rd, $Rn, $Rm */
ARM_RSCrr /* 1810 */, ARM_INS_RSC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rsc${s}${p} $Rd, $Rn, $shift */
ARM_RSCrsi /* 1811 */, ARM_INS_RSC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* rsc${s}${p} $Rd, $Rn, $shift */
ARM_RSCrsr /* 1812 */, ARM_INS_RSC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sadd16${p} $Rd, $Rn, $Rm */
ARM_SADD16 /* 1813 */, ARM_INS_SADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sadd8${p} $Rd, $Rn, $Rm */
ARM_SADD8 /* 1814 */, ARM_INS_SADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sasx${p} $Rd, $Rn, $Rm */
ARM_SASX /* 1815 */, ARM_INS_SASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sb */
ARM_SB /* 1816 */, ARM_INS_SB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasSB, 0 }, 0, 0
#endif
},
{
/* sbc${s}${p} $Rd, $Rn, $imm */
ARM_SBCri /* 1817 */, ARM_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sbc${s}${p} $Rd, $Rn, $Rm */
ARM_SBCrr /* 1818 */, ARM_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sbc${s}${p} $Rd, $Rn, $shift */
ARM_SBCrsi /* 1819 */, ARM_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sbc${s}${p} $Rd, $Rn, $shift */
ARM_SBCrsr /* 1820 */, ARM_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sbfx${p} $Rd, $Rn, $lsb, $width */
ARM_SBFX /* 1821 */, ARM_INS_SBFX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6T2, 0 }, 0, 0
#endif
},
{
/* sdiv${p} $Rd, $Rn, $Rm */
ARM_SDIV /* 1822 */, ARM_INS_SDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasDivideInARM, 0 }, 0, 0
#endif
},
{
/* sel${p} $Rd, $Rn, $Rm */
ARM_SEL /* 1823 */, ARM_INS_SEL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* setend $end */
ARM_SETEND /* 1824 */, ARM_INS_SETEND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* setpan $imm */
ARM_SETPAN /* 1825 */, ARM_INS_SETPAN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV8, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* sha1c.32 $Vd, $Vn, $Vm */
ARM_SHA1C /* 1826 */, ARM_INS_SHA1C,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* sha1h.32 $Vd, $Vm */
ARM_SHA1H /* 1827 */, ARM_INS_SHA1H,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* sha1m.32 $Vd, $Vn, $Vm */
ARM_SHA1M /* 1828 */, ARM_INS_SHA1M,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* sha1p.32 $Vd, $Vn, $Vm */
ARM_SHA1P /* 1829 */, ARM_INS_SHA1P,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* sha1su0.32 $Vd, $Vn, $Vm */
ARM_SHA1SU0 /* 1830 */, ARM_INS_SHA1SU0,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* sha1su1.32 $Vd, $Vm */
ARM_SHA1SU1 /* 1831 */, ARM_INS_SHA1SU1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* sha256h.32 $Vd, $Vn, $Vm */
ARM_SHA256H /* 1832 */, ARM_INS_SHA256H,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* sha256h2.32 $Vd, $Vn, $Vm */
ARM_SHA256H2 /* 1833 */, ARM_INS_SHA256H2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* sha256su0.32 $Vd, $Vm */
ARM_SHA256SU0 /* 1834 */, ARM_INS_SHA256SU0,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* sha256su1.32 $Vd, $Vn, $Vm */
ARM_SHA256SU1 /* 1835 */, ARM_INS_SHA256SU1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasSHA2, 0 }, 0, 0
#endif
},
{
/* shadd16${p} $Rd, $Rn, $Rm */
ARM_SHADD16 /* 1836 */, ARM_INS_SHADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* shadd8${p} $Rd, $Rn, $Rm */
ARM_SHADD8 /* 1837 */, ARM_INS_SHADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* shasx${p} $Rd, $Rn, $Rm */
ARM_SHASX /* 1838 */, ARM_INS_SHASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* shsax${p} $Rd, $Rn, $Rm */
ARM_SHSAX /* 1839 */, ARM_INS_SHSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* shsub16${p} $Rd, $Rn, $Rm */
ARM_SHSUB16 /* 1840 */, ARM_INS_SHSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* shsub8${p} $Rd, $Rn, $Rm */
ARM_SHSUB8 /* 1841 */, ARM_INS_SHSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* smc${p} $opt */
ARM_SMC /* 1842 */, ARM_INS_SMC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasTrustZone, 0 }, 0, 0
#endif
},
{
/* smlabb${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLABB /* 1843 */, ARM_INS_SMLABB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlabt${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLABT /* 1844 */, ARM_INS_SMLABT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlad${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLAD /* 1845 */, ARM_INS_SMLAD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smladx${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLADX /* 1846 */, ARM_INS_SMLADX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smlal${s}${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMLAL /* 1847 */, ARM_INS_SMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smlalbb${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMLALBB /* 1848 */, ARM_INS_SMLALBB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlalbt${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMLALBT /* 1849 */, ARM_INS_SMLALBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlald${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMLALD /* 1850 */, ARM_INS_SMLALD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smlaldx${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMLALDX /* 1851 */, ARM_INS_SMLALDX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smlaltb${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMLALTB /* 1852 */, ARM_INS_SMLALTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlaltt${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMLALTT /* 1853 */, ARM_INS_SMLALTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlatb${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLATB /* 1854 */, ARM_INS_SMLATB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlatt${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLATT /* 1855 */, ARM_INS_SMLATT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlawb${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLAWB /* 1856 */, ARM_INS_SMLAWB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlawt${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLAWT /* 1857 */, ARM_INS_SMLAWT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smlsd${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLSD /* 1858 */, ARM_INS_SMLSD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smlsdx${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMLSDX /* 1859 */, ARM_INS_SMLSDX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smlsld${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMLSLD /* 1860 */, ARM_INS_SMLSLD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smlsldx${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMLSLDX /* 1861 */, ARM_INS_SMLSLDX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smmla${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMMLA /* 1862 */, ARM_INS_SMMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smmlar${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMMLAR /* 1863 */, ARM_INS_SMMLAR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smmls${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMMLS /* 1864 */, ARM_INS_SMMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smmlsr${p} $Rd, $Rn, $Rm, $Ra */
ARM_SMMLSR /* 1865 */, ARM_INS_SMMLSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smmul${p} $Rd, $Rn, $Rm */
ARM_SMMUL /* 1866 */, ARM_INS_SMMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smmulr${p} $Rd, $Rn, $Rm */
ARM_SMMULR /* 1867 */, ARM_INS_SMMULR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smuad${p} $Rd, $Rn, $Rm */
ARM_SMUAD /* 1868 */, ARM_INS_SMUAD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smuadx${p} $Rd, $Rn, $Rm */
ARM_SMUADX /* 1869 */, ARM_INS_SMUADX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smulbb${p} $Rd, $Rn, $Rm */
ARM_SMULBB /* 1870 */, ARM_INS_SMULBB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smulbt${p} $Rd, $Rn, $Rm */
ARM_SMULBT /* 1871 */, ARM_INS_SMULBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smull${s}${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_SMULL /* 1872 */, ARM_INS_SMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smultb${p} $Rd, $Rn, $Rm */
ARM_SMULTB /* 1873 */, ARM_INS_SMULTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smultt${p} $Rd, $Rn, $Rm */
ARM_SMULTT /* 1874 */, ARM_INS_SMULTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smulwb${p} $Rd, $Rn, $Rm */
ARM_SMULWB /* 1875 */, ARM_INS_SMULWB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smulwt${p} $Rd, $Rn, $Rm */
ARM_SMULWT /* 1876 */, ARM_INS_SMULWT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* smusd${p} $Rd, $Rn, $Rm */
ARM_SMUSD /* 1877 */, ARM_INS_SMUSD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* smusdx${p} $Rd, $Rn, $Rm */
ARM_SMUSDX /* 1878 */, ARM_INS_SMUSDX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* srsda sp, $mode */
ARM_SRSDA /* 1879 */, ARM_INS_SRSDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* srsda sp!, $mode */
ARM_SRSDA_UPD /* 1880 */, ARM_INS_SRSDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* srsdb sp, $mode */
ARM_SRSDB /* 1881 */, ARM_INS_SRSDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* srsdb sp!, $mode */
ARM_SRSDB_UPD /* 1882 */, ARM_INS_SRSDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* srsia sp, $mode */
ARM_SRSIA /* 1883 */, ARM_INS_SRSIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* srsia sp!, $mode */
ARM_SRSIA_UPD /* 1884 */, ARM_INS_SRSIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* srsib sp, $mode */
ARM_SRSIB /* 1885 */, ARM_INS_SRSIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* srsib sp!, $mode */
ARM_SRSIB_UPD /* 1886 */, ARM_INS_SRSIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ssat${p} $Rd, $sat_imm, $Rn$sh */
ARM_SSAT /* 1887 */, ARM_INS_SSAT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* ssat16${p} $Rd, $sat_imm, $Rn */
ARM_SSAT16 /* 1888 */, ARM_INS_SSAT16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* ssax${p} $Rd, $Rn, $Rm */
ARM_SSAX /* 1889 */, ARM_INS_SSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ssub16${p} $Rd, $Rn, $Rm */
ARM_SSUB16 /* 1890 */, ARM_INS_SSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ssub8${p} $Rd, $Rn, $Rm */
ARM_SSUB8 /* 1891 */, ARM_INS_SSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stc2l $cop, $CRd, $addr */
ARM_STC2L_OFFSET /* 1892 */, ARM_INS_STC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* stc2l $cop, $CRd, $addr, $option */
ARM_STC2L_OPTION /* 1893 */, ARM_INS_STC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* stc2l $cop, $CRd, $addr, $offset */
ARM_STC2L_POST /* 1894 */, ARM_INS_STC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* stc2l $cop, $CRd, $addr! */
ARM_STC2L_PRE /* 1895 */, ARM_INS_STC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* stc2 $cop, $CRd, $addr */
ARM_STC2_OFFSET /* 1896 */, ARM_INS_STC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* stc2 $cop, $CRd, $addr, $option */
ARM_STC2_OPTION /* 1897 */, ARM_INS_STC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* stc2 $cop, $CRd, $addr, $offset */
ARM_STC2_POST /* 1898 */, ARM_INS_STC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* stc2 $cop, $CRd, $addr! */
ARM_STC2_PRE /* 1899 */, ARM_INS_STC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* stcl${p} $cop, $CRd, $addr */
ARM_STCL_OFFSET /* 1900 */, ARM_INS_STCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stcl${p} $cop, $CRd, $addr, $option */
ARM_STCL_OPTION /* 1901 */, ARM_INS_STCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stcl${p} $cop, $CRd, $addr, $offset */
ARM_STCL_POST /* 1902 */, ARM_INS_STCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stcl${p} $cop, $CRd, $addr! */
ARM_STCL_PRE /* 1903 */, ARM_INS_STCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stc${p} $cop, $CRd, $addr */
ARM_STC_OFFSET /* 1904 */, ARM_INS_STC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stc${p} $cop, $CRd, $addr, $option */
ARM_STC_OPTION /* 1905 */, ARM_INS_STC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stc${p} $cop, $CRd, $addr, $offset */
ARM_STC_POST /* 1906 */, ARM_INS_STC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stc${p} $cop, $CRd, $addr! */
ARM_STC_PRE /* 1907 */, ARM_INS_STC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stl${p} $Rt, $addr */
ARM_STL /* 1908 */, ARM_INS_STL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* stlb${p} $Rt, $addr */
ARM_STLB /* 1909 */, ARM_INS_STLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* stlex${p} $Rd, $Rt, $addr */
ARM_STLEX /* 1910 */, ARM_INS_STLEX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* stlexb${p} $Rd, $Rt, $addr */
ARM_STLEXB /* 1911 */, ARM_INS_STLEXB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* stlexd${p} $Rd, $Rt, $addr */
ARM_STLEXD /* 1912 */, ARM_INS_STLEXD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* stlexh${p} $Rd, $Rt, $addr */
ARM_STLEXH /* 1913 */, ARM_INS_STLEXH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* stlh${p} $Rt, $addr */
ARM_STLH /* 1914 */, ARM_INS_STLH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* stmda${p} $Rn, $regs */
ARM_STMDA /* 1915 */, ARM_INS_STMDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmda${p} $Rn!, $regs */
ARM_STMDA_UPD /* 1916 */, ARM_INS_STMDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmdb${p} $Rn, $regs */
ARM_STMDB /* 1917 */, ARM_INS_STMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmdb${p} $Rn!, $regs */
ARM_STMDB_UPD /* 1918 */, ARM_INS_STMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stm${p} $Rn, $regs */
ARM_STMIA /* 1919 */, ARM_INS_STM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stm${p} $Rn!, $regs */
ARM_STMIA_UPD /* 1920 */, ARM_INS_STM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmib${p} $Rn, $regs */
ARM_STMIB /* 1921 */, ARM_INS_STMIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmib${p} $Rn!, $regs */
ARM_STMIB_UPD /* 1922 */, ARM_INS_STMIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strbt${p} $Rt, $addr, $offset */
ARM_STRBT_POST_IMM /* 1923 */, ARM_INS_STRBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strbt${p} $Rt, $addr, $offset */
ARM_STRBT_POST_REG /* 1924 */, ARM_INS_STRBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $addr, $offset */
ARM_STRB_POST_IMM /* 1925 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $addr, $offset */
ARM_STRB_POST_REG /* 1926 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $addr! */
ARM_STRB_PRE_IMM /* 1927 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $addr! */
ARM_STRB_PRE_REG /* 1928 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $addr */
ARM_STRBi12 /* 1929 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $shift */
ARM_STRBrs /* 1930 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strd${p} $Rt, $Rt2, $addr */
ARM_STRD /* 1931 */, ARM_INS_STRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV5TE, 0 }, 0, 0
#endif
},
{
/* strd${p} $Rt, $Rt2, $addr, $offset */
ARM_STRD_POST /* 1932 */, ARM_INS_STRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strd${p} $Rt, $Rt2, $addr! */
ARM_STRD_PRE /* 1933 */, ARM_INS_STRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strex${p} $Rd, $Rt, $addr */
ARM_STREX /* 1934 */, ARM_INS_STREX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strexb${p} $Rd, $Rt, $addr */
ARM_STREXB /* 1935 */, ARM_INS_STREXB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strexd${p} $Rd, $Rt, $addr */
ARM_STREXD /* 1936 */, ARM_INS_STREXD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strexh${p} $Rd, $Rt, $addr */
ARM_STREXH /* 1937 */, ARM_INS_STREXH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strh${p} $Rt, $addr */
ARM_STRH /* 1938 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strht${p} $Rt, $addr, $offset */
ARM_STRHTi /* 1939 */, ARM_INS_STRHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strht${p} $Rt, $addr, $Rm */
ARM_STRHTr /* 1940 */, ARM_INS_STRHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strh${p} $Rt, $addr, $offset */
ARM_STRH_POST /* 1941 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strh${p} $Rt, $addr! */
ARM_STRH_PRE /* 1942 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strt${p} $Rt, $addr, $offset */
ARM_STRT_POST_IMM /* 1943 */, ARM_INS_STRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* strt${p} $Rt, $addr, $offset */
ARM_STRT_POST_REG /* 1944 */, ARM_INS_STRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr, $offset */
ARM_STR_POST_IMM /* 1945 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr, $offset */
ARM_STR_POST_REG /* 1946 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr! */
ARM_STR_PRE_IMM /* 1947 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr! */
ARM_STR_PRE_REG /* 1948 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr */
ARM_STRi12 /* 1949 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $shift */
ARM_STRrs /* 1950 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sub${s}${p} $Rd, $Rn, $imm */
ARM_SUBri /* 1951 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sub${s}${p} $Rd, $Rn, $Rm */
ARM_SUBrr /* 1952 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sub${s}${p} $Rd, $Rn, $shift */
ARM_SUBrsi /* 1953 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* sub${s}${p} $Rd, $Rn, $shift */
ARM_SUBrsr /* 1954 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* svc${p} $svc */
ARM_SVC /* 1955 */, ARM_INS_SVC,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { 0 }, { ARM_GRP_CALL, ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* swp${p} $Rt, $Rt2, $addr */
ARM_SWP /* 1956 */, ARM_INS_SWP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* swpb${p} $Rt, $Rt2, $addr */
ARM_SWPB /* 1957 */, ARM_INS_SWPB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* sxtab${p} $Rd, $Rn, $Rm$rot */
ARM_SXTAB /* 1958 */, ARM_INS_SXTAB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* sxtab16${p} $Rd, $Rn, $Rm$rot */
ARM_SXTAB16 /* 1959 */, ARM_INS_SXTAB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* sxtah${p} $Rd, $Rn, $Rm$rot */
ARM_SXTAH /* 1960 */, ARM_INS_SXTAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* sxtb${p} $Rd, $Rm$rot */
ARM_SXTB /* 1961 */, ARM_INS_SXTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* sxtb16${p} $Rd, $Rm$rot */
ARM_SXTB16 /* 1962 */, ARM_INS_SXTB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* sxth${p} $Rd, $Rm$rot */
ARM_SXTH /* 1963 */, ARM_INS_SXTH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* teq${p} $Rn, $imm */
ARM_TEQri /* 1964 */, ARM_INS_TEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* teq${p} $Rn, $Rm */
ARM_TEQrr /* 1965 */, ARM_INS_TEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* teq${p} $Rn, $shift */
ARM_TEQrsi /* 1966 */, ARM_INS_TEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* teq${p} $Rn, $shift */
ARM_TEQrsr /* 1967 */, ARM_INS_TEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* trap */
ARM_TRAP /* 1968 */, ARM_INS_TRAP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* trap */
ARM_TRAPNaCl /* 1969 */, ARM_INS_TRAP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_UseNaClTrap, 0 }, 0, 0
#endif
},
{
/* tsb $opt */
ARM_TSB /* 1970 */, ARM_INS_TSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV8_4a, 0 }, 0, 0
#endif
},
{
/* tst${p} $Rn, $imm */
ARM_TSTri /* 1971 */, ARM_INS_TST,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* tst${p} $Rn, $Rm */
ARM_TSTrr /* 1972 */, ARM_INS_TST,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* tst${p} $Rn, $shift */
ARM_TSTrsi /* 1973 */, ARM_INS_TST,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* tst${p} $Rn, $shift */
ARM_TSTrsr /* 1974 */, ARM_INS_TST,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uadd16${p} $Rd, $Rn, $Rm */
ARM_UADD16 /* 1975 */, ARM_INS_UADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uadd8${p} $Rd, $Rn, $Rm */
ARM_UADD8 /* 1976 */, ARM_INS_UADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uasx${p} $Rd, $Rn, $Rm */
ARM_UASX /* 1977 */, ARM_INS_UASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ubfx${p} $Rd, $Rn, $lsb, $width */
ARM_UBFX /* 1978 */, ARM_INS_UBFX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6T2, 0 }, 0, 0
#endif
},
{
/* udf $imm16 */
ARM_UDF /* 1979 */, ARM_INS_UDF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* udiv${p} $Rd, $Rn, $Rm */
ARM_UDIV /* 1980 */, ARM_INS_UDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasDivideInARM, 0 }, 0, 0
#endif
},
{
/* uhadd16${p} $Rd, $Rn, $Rm */
ARM_UHADD16 /* 1981 */, ARM_INS_UHADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uhadd8${p} $Rd, $Rn, $Rm */
ARM_UHADD8 /* 1982 */, ARM_INS_UHADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uhasx${p} $Rd, $Rn, $Rm */
ARM_UHASX /* 1983 */, ARM_INS_UHASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uhsax${p} $Rd, $Rn, $Rm */
ARM_UHSAX /* 1984 */, ARM_INS_UHSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uhsub16${p} $Rd, $Rn, $Rm */
ARM_UHSUB16 /* 1985 */, ARM_INS_UHSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uhsub8${p} $Rd, $Rn, $Rm */
ARM_UHSUB8 /* 1986 */, ARM_INS_UHSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* umaal${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_UMAAL /* 1987 */, ARM_INS_UMAAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* umlal${s}${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_UMLAL /* 1988 */, ARM_INS_UMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* umull${s}${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_UMULL /* 1989 */, ARM_INS_UMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* uqadd16${p} $Rd, $Rn, $Rm */
ARM_UQADD16 /* 1990 */, ARM_INS_UQADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uqadd8${p} $Rd, $Rn, $Rm */
ARM_UQADD8 /* 1991 */, ARM_INS_UQADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uqasx${p} $Rd, $Rn, $Rm */
ARM_UQASX /* 1992 */, ARM_INS_UQASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uqsax${p} $Rd, $Rn, $Rm */
ARM_UQSAX /* 1993 */, ARM_INS_UQSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uqsub16${p} $Rd, $Rn, $Rm */
ARM_UQSUB16 /* 1994 */, ARM_INS_UQSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uqsub8${p} $Rd, $Rn, $Rm */
ARM_UQSUB8 /* 1995 */, ARM_INS_UQSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* usad8${p} $Rd, $Rn, $Rm */
ARM_USAD8 /* 1996 */, ARM_INS_USAD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* usada8${p} $Rd, $Rn, $Rm, $Ra */
ARM_USADA8 /* 1997 */, ARM_INS_USADA8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* usat${p} $Rd, $sat_imm, $Rn$sh */
ARM_USAT /* 1998 */, ARM_INS_USAT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* usat16${p} $Rd, $sat_imm, $Rn */
ARM_USAT16 /* 1999 */, ARM_INS_USAT16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* usax${p} $Rd, $Rn, $Rm */
ARM_USAX /* 2000 */, ARM_INS_USAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* usub16${p} $Rd, $Rn, $Rm */
ARM_USUB16 /* 2001 */, ARM_INS_USUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* usub8${p} $Rd, $Rn, $Rm */
ARM_USUB8 /* 2002 */, ARM_INS_USUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* uxtab${p} $Rd, $Rn, $Rm$rot */
ARM_UXTAB /* 2003 */, ARM_INS_UXTAB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* uxtab16${p} $Rd, $Rn, $Rm$rot */
ARM_UXTAB16 /* 2004 */, ARM_INS_UXTAB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* uxtah${p} $Rd, $Rn, $Rm$rot */
ARM_UXTAH /* 2005 */, ARM_INS_UXTAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* uxtb${p} $Rd, $Rm$rot */
ARM_UXTB /* 2006 */, ARM_INS_UXTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* uxtb16${p} $Rd, $Rm$rot */
ARM_UXTB16 /* 2007 */, ARM_INS_UXTB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* uxth${p} $Rd, $Rm$rot */
ARM_UXTH /* 2008 */, ARM_INS_UXTH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* vabal${p}.s32 $Vd, $Vn, $Vm */
ARM_VABALsv2i64 /* 2009 */, ARM_INS_VABAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabal${p}.s16 $Vd, $Vn, $Vm */
ARM_VABALsv4i32 /* 2010 */, ARM_INS_VABAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabal${p}.s8 $Vd, $Vn, $Vm */
ARM_VABALsv8i16 /* 2011 */, ARM_INS_VABAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabal${p}.u32 $Vd, $Vn, $Vm */
ARM_VABALuv2i64 /* 2012 */, ARM_INS_VABAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabal${p}.u16 $Vd, $Vn, $Vm */
ARM_VABALuv4i32 /* 2013 */, ARM_INS_VABAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabal${p}.u8 $Vd, $Vn, $Vm */
ARM_VABALuv8i16 /* 2014 */, ARM_INS_VABAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.s8 $Vd, $Vn, $Vm */
ARM_VABAsv16i8 /* 2015 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.s32 $Vd, $Vn, $Vm */
ARM_VABAsv2i32 /* 2016 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.s16 $Vd, $Vn, $Vm */
ARM_VABAsv4i16 /* 2017 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.s32 $Vd, $Vn, $Vm */
ARM_VABAsv4i32 /* 2018 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.s16 $Vd, $Vn, $Vm */
ARM_VABAsv8i16 /* 2019 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.s8 $Vd, $Vn, $Vm */
ARM_VABAsv8i8 /* 2020 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.u8 $Vd, $Vn, $Vm */
ARM_VABAuv16i8 /* 2021 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.u32 $Vd, $Vn, $Vm */
ARM_VABAuv2i32 /* 2022 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.u16 $Vd, $Vn, $Vm */
ARM_VABAuv4i16 /* 2023 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.u32 $Vd, $Vn, $Vm */
ARM_VABAuv4i32 /* 2024 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.u16 $Vd, $Vn, $Vm */
ARM_VABAuv8i16 /* 2025 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaba${p}.u8 $Vd, $Vn, $Vm */
ARM_VABAuv8i8 /* 2026 */, ARM_INS_VABA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabdl${p}.s32 $Vd, $Vn, $Vm */
ARM_VABDLsv2i64 /* 2027 */, ARM_INS_VABDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabdl${p}.s16 $Vd, $Vn, $Vm */
ARM_VABDLsv4i32 /* 2028 */, ARM_INS_VABDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabdl${p}.s8 $Vd, $Vn, $Vm */
ARM_VABDLsv8i16 /* 2029 */, ARM_INS_VABDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabdl${p}.u32 $Vd, $Vn, $Vm */
ARM_VABDLuv2i64 /* 2030 */, ARM_INS_VABDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabdl${p}.u16 $Vd, $Vn, $Vm */
ARM_VABDLuv4i32 /* 2031 */, ARM_INS_VABDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabdl${p}.u8 $Vd, $Vn, $Vm */
ARM_VABDLuv8i16 /* 2032 */, ARM_INS_VABDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.f32 $Vd, $Vn, $Vm */
ARM_VABDfd /* 2033 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.f32 $Vd, $Vn, $Vm */
ARM_VABDfq /* 2034 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.f16 $Vd, $Vn, $Vm */
ARM_VABDhd /* 2035 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vabd${p}.f16 $Vd, $Vn, $Vm */
ARM_VABDhq /* 2036 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vabd${p}.s8 $Vd, $Vn, $Vm */
ARM_VABDsv16i8 /* 2037 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.s32 $Vd, $Vn, $Vm */
ARM_VABDsv2i32 /* 2038 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.s16 $Vd, $Vn, $Vm */
ARM_VABDsv4i16 /* 2039 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.s32 $Vd, $Vn, $Vm */
ARM_VABDsv4i32 /* 2040 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.s16 $Vd, $Vn, $Vm */
ARM_VABDsv8i16 /* 2041 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.s8 $Vd, $Vn, $Vm */
ARM_VABDsv8i8 /* 2042 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.u8 $Vd, $Vn, $Vm */
ARM_VABDuv16i8 /* 2043 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.u32 $Vd, $Vn, $Vm */
ARM_VABDuv2i32 /* 2044 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.u16 $Vd, $Vn, $Vm */
ARM_VABDuv4i16 /* 2045 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.u32 $Vd, $Vn, $Vm */
ARM_VABDuv4i32 /* 2046 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.u16 $Vd, $Vn, $Vm */
ARM_VABDuv8i16 /* 2047 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabd${p}.u8 $Vd, $Vn, $Vm */
ARM_VABDuv8i8 /* 2048 */, ARM_INS_VABD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabs${p}.f64 $Dd, $Dm */
ARM_VABSD /* 2049 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vabs${p}.f16 $Sd, $Sm */
ARM_VABSH /* 2050 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vabs${p}.f32 $Sd, $Sm */
ARM_VABSS /* 2051 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vabs${p}.f32 $Vd, $Vm */
ARM_VABSfd /* 2052 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabs${p}.f32 $Vd, $Vm */
ARM_VABSfq /* 2053 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabs${p}.f16 $Vd, $Vm */
ARM_VABShd /* 2054 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vabs${p}.f16 $Vd, $Vm */
ARM_VABShq /* 2055 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vabs${p}.s8 $Vd, $Vm */
ARM_VABSv16i8 /* 2056 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabs${p}.s32 $Vd, $Vm */
ARM_VABSv2i32 /* 2057 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabs${p}.s16 $Vd, $Vm */
ARM_VABSv4i16 /* 2058 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabs${p}.s32 $Vd, $Vm */
ARM_VABSv4i32 /* 2059 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabs${p}.s16 $Vd, $Vm */
ARM_VABSv8i16 /* 2060 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vabs${p}.s8 $Vd, $Vm */
ARM_VABSv8i8 /* 2061 */, ARM_INS_VABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vacge${p}.f32 $Vd, $Vn, $Vm */
ARM_VACGEfd /* 2062 */, ARM_INS_VACGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vacge${p}.f32 $Vd, $Vn, $Vm */
ARM_VACGEfq /* 2063 */, ARM_INS_VACGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vacge${p}.f16 $Vd, $Vn, $Vm */
ARM_VACGEhd /* 2064 */, ARM_INS_VACGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vacge${p}.f16 $Vd, $Vn, $Vm */
ARM_VACGEhq /* 2065 */, ARM_INS_VACGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vacgt${p}.f32 $Vd, $Vn, $Vm */
ARM_VACGTfd /* 2066 */, ARM_INS_VACGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vacgt${p}.f32 $Vd, $Vn, $Vm */
ARM_VACGTfq /* 2067 */, ARM_INS_VACGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vacgt${p}.f16 $Vd, $Vn, $Vm */
ARM_VACGThd /* 2068 */, ARM_INS_VACGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vacgt${p}.f16 $Vd, $Vn, $Vm */
ARM_VACGThq /* 2069 */, ARM_INS_VACGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vadd${p}.f64 $Dd, $Dn, $Dm */
ARM_VADDD /* 2070 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vadd${p}.f16 $Sd, $Sn, $Sm */
ARM_VADDH /* 2071 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vaddhn${p}.i64 $Vd, $Vn, $Vm */
ARM_VADDHNv2i32 /* 2072 */, ARM_INS_VADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddhn${p}.i32 $Vd, $Vn, $Vm */
ARM_VADDHNv4i16 /* 2073 */, ARM_INS_VADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddhn${p}.i16 $Vd, $Vn, $Vm */
ARM_VADDHNv8i8 /* 2074 */, ARM_INS_VADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddl${p}.s32 $Vd, $Vn, $Vm */
ARM_VADDLsv2i64 /* 2075 */, ARM_INS_VADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddl${p}.s16 $Vd, $Vn, $Vm */
ARM_VADDLsv4i32 /* 2076 */, ARM_INS_VADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddl${p}.s8 $Vd, $Vn, $Vm */
ARM_VADDLsv8i16 /* 2077 */, ARM_INS_VADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddl${p}.u32 $Vd, $Vn, $Vm */
ARM_VADDLuv2i64 /* 2078 */, ARM_INS_VADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddl${p}.u16 $Vd, $Vn, $Vm */
ARM_VADDLuv4i32 /* 2079 */, ARM_INS_VADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddl${p}.u8 $Vd, $Vn, $Vm */
ARM_VADDLuv8i16 /* 2080 */, ARM_INS_VADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.f32 $Sd, $Sn, $Sm */
ARM_VADDS /* 2081 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vaddw${p}.s32 $Vd, $Vn, $Vm */
ARM_VADDWsv2i64 /* 2082 */, ARM_INS_VADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddw${p}.s16 $Vd, $Vn, $Vm */
ARM_VADDWsv4i32 /* 2083 */, ARM_INS_VADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddw${p}.s8 $Vd, $Vn, $Vm */
ARM_VADDWsv8i16 /* 2084 */, ARM_INS_VADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddw${p}.u32 $Vd, $Vn, $Vm */
ARM_VADDWuv2i64 /* 2085 */, ARM_INS_VADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddw${p}.u16 $Vd, $Vn, $Vm */
ARM_VADDWuv4i32 /* 2086 */, ARM_INS_VADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vaddw${p}.u8 $Vd, $Vn, $Vm */
ARM_VADDWuv8i16 /* 2087 */, ARM_INS_VADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.f32 $Vd, $Vn, $Vm */
ARM_VADDfd /* 2088 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.f32 $Vd, $Vn, $Vm */
ARM_VADDfq /* 2089 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.f16 $Vd, $Vn, $Vm */
ARM_VADDhd /* 2090 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vadd${p}.f16 $Vd, $Vn, $Vm */
ARM_VADDhq /* 2091 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vadd${p}.i8 $Vd, $Vn, $Vm */
ARM_VADDv16i8 /* 2092 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.i64 $Vd, $Vn, $Vm */
ARM_VADDv1i64 /* 2093 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.i32 $Vd, $Vn, $Vm */
ARM_VADDv2i32 /* 2094 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.i64 $Vd, $Vn, $Vm */
ARM_VADDv2i64 /* 2095 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.i16 $Vd, $Vn, $Vm */
ARM_VADDv4i16 /* 2096 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.i32 $Vd, $Vn, $Vm */
ARM_VADDv4i32 /* 2097 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.i16 $Vd, $Vn, $Vm */
ARM_VADDv8i16 /* 2098 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vadd${p}.i8 $Vd, $Vn, $Vm */
ARM_VADDv8i8 /* 2099 */, ARM_INS_VADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vand${p} $Vd, $Vn, $Vm */
ARM_VANDd /* 2100 */, ARM_INS_VAND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vand${p} $Vd, $Vn, $Vm */
ARM_VANDq /* 2101 */, ARM_INS_VAND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vfmab.bf16 $Vd, $Vn, $Vm */
ARM_VBF16MALBQ /* 2102 */, ARM_INS_VFMAB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vfmab.bf16 $Vd, $Vn, $Vm$idx */
ARM_VBF16MALBQI /* 2103 */, ARM_INS_VFMAB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vfmat.bf16 $Vd, $Vn, $Vm */
ARM_VBF16MALTQ /* 2104 */, ARM_INS_VFMAT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vfmat.bf16 $Vd, $Vn, $Vm$idx */
ARM_VBF16MALTQI /* 2105 */, ARM_INS_VFMAT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbic${p} $Vd, $Vn, $Vm */
ARM_VBICd /* 2106 */, ARM_INS_VBIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbic${p}.i32 $Vd, $SIMM */
ARM_VBICiv2i32 /* 2107 */, ARM_INS_VBIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbic${p}.i16 $Vd, $SIMM */
ARM_VBICiv4i16 /* 2108 */, ARM_INS_VBIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbic${p}.i32 $Vd, $SIMM */
ARM_VBICiv4i32 /* 2109 */, ARM_INS_VBIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbic${p}.i16 $Vd, $SIMM */
ARM_VBICiv8i16 /* 2110 */, ARM_INS_VBIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbic${p} $Vd, $Vn, $Vm */
ARM_VBICq /* 2111 */, ARM_INS_VBIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbif${p} $Vd, $Vn, $Vm */
ARM_VBIFd /* 2112 */, ARM_INS_VBIF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbif${p} $Vd, $Vn, $Vm */
ARM_VBIFq /* 2113 */, ARM_INS_VBIF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbit${p} $Vd, $Vn, $Vm */
ARM_VBITd /* 2114 */, ARM_INS_VBIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbit${p} $Vd, $Vn, $Vm */
ARM_VBITq /* 2115 */, ARM_INS_VBIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbsl${p} $Vd, $Vn, $Vm */
ARM_VBSLd /* 2116 */, ARM_INS_VBSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vbsl${p} $Vd, $Vn, $Vm */
ARM_VBSLq /* 2117 */, ARM_INS_VBSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VBSPd /* 2118 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VBSPq /* 2119 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vcadd.f32 $Vd, $Vn, $Vm, $rot */
ARM_VCADDv2f32 /* 2120 */, ARM_INS_VCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, 0 }, 0, 0
#endif
},
{
/* vcadd.f16 $Vd, $Vn, $Vm, $rot */
ARM_VCADDv4f16 /* 2121 */, ARM_INS_VCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcadd.f32 $Vd, $Vn, $Vm, $rot */
ARM_VCADDv4f32 /* 2122 */, ARM_INS_VCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, 0 }, 0, 0
#endif
},
{
/* vcadd.f16 $Vd, $Vn, $Vm, $rot */
ARM_VCADDv8f16 /* 2123 */, ARM_INS_VCADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vceq${p}.f32 $Vd, $Vn, $Vm */
ARM_VCEQfd /* 2124 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.f32 $Vd, $Vn, $Vm */
ARM_VCEQfq /* 2125 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.f16 $Vd, $Vn, $Vm */
ARM_VCEQhd /* 2126 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vceq${p}.f16 $Vd, $Vn, $Vm */
ARM_VCEQhq /* 2127 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i8 $Vd, $Vn, $Vm */
ARM_VCEQv16i8 /* 2128 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i32 $Vd, $Vn, $Vm */
ARM_VCEQv2i32 /* 2129 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i16 $Vd, $Vn, $Vm */
ARM_VCEQv4i16 /* 2130 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i32 $Vd, $Vn, $Vm */
ARM_VCEQv4i32 /* 2131 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i16 $Vd, $Vn, $Vm */
ARM_VCEQv8i16 /* 2132 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i8 $Vd, $Vn, $Vm */
ARM_VCEQv8i8 /* 2133 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i8 $Vd, $Vm, #0 */
ARM_VCEQzv16i8 /* 2134 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.f32 $Vd, $Vm, #0 */
ARM_VCEQzv2f32 /* 2135 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i32 $Vd, $Vm, #0 */
ARM_VCEQzv2i32 /* 2136 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.f16 $Vd, $Vm, #0 */
ARM_VCEQzv4f16 /* 2137 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vceq${p}.f32 $Vd, $Vm, #0 */
ARM_VCEQzv4f32 /* 2138 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i16 $Vd, $Vm, #0 */
ARM_VCEQzv4i16 /* 2139 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i32 $Vd, $Vm, #0 */
ARM_VCEQzv4i32 /* 2140 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.f16 $Vd, $Vm, #0 */
ARM_VCEQzv8f16 /* 2141 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i16 $Vd, $Vm, #0 */
ARM_VCEQzv8i16 /* 2142 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vceq${p}.i8 $Vd, $Vm, #0 */
ARM_VCEQzv8i8 /* 2143 */, ARM_INS_VCEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.f32 $Vd, $Vn, $Vm */
ARM_VCGEfd /* 2144 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.f32 $Vd, $Vn, $Vm */
ARM_VCGEfq /* 2145 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.f16 $Vd, $Vn, $Vm */
ARM_VCGEhd /* 2146 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcge${p}.f16 $Vd, $Vn, $Vm */
ARM_VCGEhq /* 2147 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s8 $Vd, $Vn, $Vm */
ARM_VCGEsv16i8 /* 2148 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s32 $Vd, $Vn, $Vm */
ARM_VCGEsv2i32 /* 2149 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s16 $Vd, $Vn, $Vm */
ARM_VCGEsv4i16 /* 2150 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s32 $Vd, $Vn, $Vm */
ARM_VCGEsv4i32 /* 2151 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s16 $Vd, $Vn, $Vm */
ARM_VCGEsv8i16 /* 2152 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s8 $Vd, $Vn, $Vm */
ARM_VCGEsv8i8 /* 2153 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.u8 $Vd, $Vn, $Vm */
ARM_VCGEuv16i8 /* 2154 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.u32 $Vd, $Vn, $Vm */
ARM_VCGEuv2i32 /* 2155 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.u16 $Vd, $Vn, $Vm */
ARM_VCGEuv4i16 /* 2156 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.u32 $Vd, $Vn, $Vm */
ARM_VCGEuv4i32 /* 2157 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.u16 $Vd, $Vn, $Vm */
ARM_VCGEuv8i16 /* 2158 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.u8 $Vd, $Vn, $Vm */
ARM_VCGEuv8i8 /* 2159 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s8 $Vd, $Vm, #0 */
ARM_VCGEzv16i8 /* 2160 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.f32 $Vd, $Vm, #0 */
ARM_VCGEzv2f32 /* 2161 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s32 $Vd, $Vm, #0 */
ARM_VCGEzv2i32 /* 2162 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.f16 $Vd, $Vm, #0 */
ARM_VCGEzv4f16 /* 2163 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcge${p}.f32 $Vd, $Vm, #0 */
ARM_VCGEzv4f32 /* 2164 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s16 $Vd, $Vm, #0 */
ARM_VCGEzv4i16 /* 2165 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s32 $Vd, $Vm, #0 */
ARM_VCGEzv4i32 /* 2166 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.f16 $Vd, $Vm, #0 */
ARM_VCGEzv8f16 /* 2167 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s16 $Vd, $Vm, #0 */
ARM_VCGEzv8i16 /* 2168 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcge${p}.s8 $Vd, $Vm, #0 */
ARM_VCGEzv8i8 /* 2169 */, ARM_INS_VCGE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.f32 $Vd, $Vn, $Vm */
ARM_VCGTfd /* 2170 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.f32 $Vd, $Vn, $Vm */
ARM_VCGTfq /* 2171 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.f16 $Vd, $Vn, $Vm */
ARM_VCGThd /* 2172 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.f16 $Vd, $Vn, $Vm */
ARM_VCGThq /* 2173 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s8 $Vd, $Vn, $Vm */
ARM_VCGTsv16i8 /* 2174 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s32 $Vd, $Vn, $Vm */
ARM_VCGTsv2i32 /* 2175 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s16 $Vd, $Vn, $Vm */
ARM_VCGTsv4i16 /* 2176 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s32 $Vd, $Vn, $Vm */
ARM_VCGTsv4i32 /* 2177 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s16 $Vd, $Vn, $Vm */
ARM_VCGTsv8i16 /* 2178 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s8 $Vd, $Vn, $Vm */
ARM_VCGTsv8i8 /* 2179 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.u8 $Vd, $Vn, $Vm */
ARM_VCGTuv16i8 /* 2180 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.u32 $Vd, $Vn, $Vm */
ARM_VCGTuv2i32 /* 2181 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.u16 $Vd, $Vn, $Vm */
ARM_VCGTuv4i16 /* 2182 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.u32 $Vd, $Vn, $Vm */
ARM_VCGTuv4i32 /* 2183 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.u16 $Vd, $Vn, $Vm */
ARM_VCGTuv8i16 /* 2184 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.u8 $Vd, $Vn, $Vm */
ARM_VCGTuv8i8 /* 2185 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s8 $Vd, $Vm, #0 */
ARM_VCGTzv16i8 /* 2186 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.f32 $Vd, $Vm, #0 */
ARM_VCGTzv2f32 /* 2187 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s32 $Vd, $Vm, #0 */
ARM_VCGTzv2i32 /* 2188 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.f16 $Vd, $Vm, #0 */
ARM_VCGTzv4f16 /* 2189 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.f32 $Vd, $Vm, #0 */
ARM_VCGTzv4f32 /* 2190 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s16 $Vd, $Vm, #0 */
ARM_VCGTzv4i16 /* 2191 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s32 $Vd, $Vm, #0 */
ARM_VCGTzv4i32 /* 2192 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.f16 $Vd, $Vm, #0 */
ARM_VCGTzv8f16 /* 2193 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s16 $Vd, $Vm, #0 */
ARM_VCGTzv8i16 /* 2194 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcgt${p}.s8 $Vd, $Vm, #0 */
ARM_VCGTzv8i8 /* 2195 */, ARM_INS_VCGT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcle${p}.s8 $Vd, $Vm, #0 */
ARM_VCLEzv16i8 /* 2196 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcle${p}.f32 $Vd, $Vm, #0 */
ARM_VCLEzv2f32 /* 2197 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcle${p}.s32 $Vd, $Vm, #0 */
ARM_VCLEzv2i32 /* 2198 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcle${p}.f16 $Vd, $Vm, #0 */
ARM_VCLEzv4f16 /* 2199 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcle${p}.f32 $Vd, $Vm, #0 */
ARM_VCLEzv4f32 /* 2200 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcle${p}.s16 $Vd, $Vm, #0 */
ARM_VCLEzv4i16 /* 2201 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcle${p}.s32 $Vd, $Vm, #0 */
ARM_VCLEzv4i32 /* 2202 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcle${p}.f16 $Vd, $Vm, #0 */
ARM_VCLEzv8f16 /* 2203 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcle${p}.s16 $Vd, $Vm, #0 */
ARM_VCLEzv8i16 /* 2204 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcle${p}.s8 $Vd, $Vm, #0 */
ARM_VCLEzv8i8 /* 2205 */, ARM_INS_VCLE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcls${p}.s8 $Vd, $Vm */
ARM_VCLSv16i8 /* 2206 */, ARM_INS_VCLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcls${p}.s32 $Vd, $Vm */
ARM_VCLSv2i32 /* 2207 */, ARM_INS_VCLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcls${p}.s16 $Vd, $Vm */
ARM_VCLSv4i16 /* 2208 */, ARM_INS_VCLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcls${p}.s32 $Vd, $Vm */
ARM_VCLSv4i32 /* 2209 */, ARM_INS_VCLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcls${p}.s16 $Vd, $Vm */
ARM_VCLSv8i16 /* 2210 */, ARM_INS_VCLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcls${p}.s8 $Vd, $Vm */
ARM_VCLSv8i8 /* 2211 */, ARM_INS_VCLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclt${p}.s8 $Vd, $Vm, #0 */
ARM_VCLTzv16i8 /* 2212 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclt${p}.f32 $Vd, $Vm, #0 */
ARM_VCLTzv2f32 /* 2213 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclt${p}.s32 $Vd, $Vm, #0 */
ARM_VCLTzv2i32 /* 2214 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclt${p}.f16 $Vd, $Vm, #0 */
ARM_VCLTzv4f16 /* 2215 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vclt${p}.f32 $Vd, $Vm, #0 */
ARM_VCLTzv4f32 /* 2216 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclt${p}.s16 $Vd, $Vm, #0 */
ARM_VCLTzv4i16 /* 2217 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclt${p}.s32 $Vd, $Vm, #0 */
ARM_VCLTzv4i32 /* 2218 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclt${p}.f16 $Vd, $Vm, #0 */
ARM_VCLTzv8f16 /* 2219 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vclt${p}.s16 $Vd, $Vm, #0 */
ARM_VCLTzv8i16 /* 2220 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclt${p}.s8 $Vd, $Vm, #0 */
ARM_VCLTzv8i8 /* 2221 */, ARM_INS_VCLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclz${p}.i8 $Vd, $Vm */
ARM_VCLZv16i8 /* 2222 */, ARM_INS_VCLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclz${p}.i32 $Vd, $Vm */
ARM_VCLZv2i32 /* 2223 */, ARM_INS_VCLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclz${p}.i16 $Vd, $Vm */
ARM_VCLZv4i16 /* 2224 */, ARM_INS_VCLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclz${p}.i32 $Vd, $Vm */
ARM_VCLZv4i32 /* 2225 */, ARM_INS_VCLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclz${p}.i16 $Vd, $Vm */
ARM_VCLZv8i16 /* 2226 */, ARM_INS_VCLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vclz${p}.i8 $Vd, $Vm */
ARM_VCLZv8i8 /* 2227 */, ARM_INS_VCLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcmla.f32 $Vd, $Vn, $Vm, $rot */
ARM_VCMLAv2f32 /* 2228 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, 0 }, 0, 0
#endif
},
{
/* vcmla.f32 $Vd, $Vn, $Vm$lane, $rot */
ARM_VCMLAv2f32_indexed /* 2229 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, 0 }, 0, 0
#endif
},
{
/* vcmla.f16 $Vd, $Vn, $Vm, $rot */
ARM_VCMLAv4f16 /* 2230 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcmla.f16 $Vd, $Vn, $Vm$lane, $rot */
ARM_VCMLAv4f16_indexed /* 2231 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcmla.f32 $Vd, $Vn, $Vm, $rot */
ARM_VCMLAv4f32 /* 2232 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, 0 }, 0, 0
#endif
},
{
/* vcmla.f32 $Vd, $Vn, $Vm$lane, $rot */
ARM_VCMLAv4f32_indexed /* 2233 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, 0 }, 0, 0
#endif
},
{
/* vcmla.f16 $Vd, $Vn, $Vm, $rot */
ARM_VCMLAv8f16 /* 2234 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcmla.f16 $Vd, $Vn, $Vm$lane, $rot */
ARM_VCMLAv8f16_indexed /* 2235 */, ARM_INS_VCMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_3a, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcmp${p}.f64 $Dd, $Dm */
ARM_VCMPD /* 2236 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcmpe${p}.f64 $Dd, $Dm */
ARM_VCMPED /* 2237 */, ARM_INS_VCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcmpe${p}.f16 $Sd, $Sm */
ARM_VCMPEH /* 2238 */, ARM_INS_VCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcmpe${p}.f32 $Sd, $Sm */
ARM_VCMPES /* 2239 */, ARM_INS_VCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcmpe${p}.f64 $Dd, #0 */
ARM_VCMPEZD /* 2240 */, ARM_INS_VCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcmpe${p}.f16 $Sd, #0 */
ARM_VCMPEZH /* 2241 */, ARM_INS_VCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcmpe${p}.f32 $Sd, #0 */
ARM_VCMPEZS /* 2242 */, ARM_INS_VCMPE,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcmp${p}.f16 $Sd, $Sm */
ARM_VCMPH /* 2243 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcmp${p}.f32 $Sd, $Sm */
ARM_VCMPS /* 2244 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcmp${p}.f64 $Dd, #0 */
ARM_VCMPZD /* 2245 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcmp${p}.f16 $Sd, #0 */
ARM_VCMPZH /* 2246 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcmp${p}.f32 $Sd, #0 */
ARM_VCMPZS /* 2247 */, ARM_INS_VCMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcnt${p}.8 $Vd, $Vm */
ARM_VCNTd /* 2248 */, ARM_INS_VCNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcnt${p}.8 $Vd, $Vm */
ARM_VCNTq /* 2249 */, ARM_INS_VCNT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvta.s32.f32 $Vd, $Vm */
ARM_VCVTANSDf /* 2250 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvta.s16.f16 $Vd, $Vm */
ARM_VCVTANSDh /* 2251 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvta.s32.f32 $Vd, $Vm */
ARM_VCVTANSQf /* 2252 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvta.s16.f16 $Vd, $Vm */
ARM_VCVTANSQh /* 2253 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvta.u32.f32 $Vd, $Vm */
ARM_VCVTANUDf /* 2254 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvta.u16.f16 $Vd, $Vm */
ARM_VCVTANUDh /* 2255 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvta.u32.f32 $Vd, $Vm */
ARM_VCVTANUQf /* 2256 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvta.u16.f16 $Vd, $Vm */
ARM_VCVTANUQh /* 2257 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvta.s32.f64 $Sd, $Dm */
ARM_VCVTASD /* 2258 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvta.s32.f16 $Sd, $Sm */
ARM_VCVTASH /* 2259 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvta.s32.f32 $Sd, $Sm */
ARM_VCVTASS /* 2260 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vcvta.u32.f64 $Sd, $Dm */
ARM_VCVTAUD /* 2261 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvta.u32.f16 $Sd, $Sm */
ARM_VCVTAUH /* 2262 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvta.u32.f32 $Sd, $Sm */
ARM_VCVTAUS /* 2263 */, ARM_INS_VCVTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vcvtb${p}.f16.f64 $Sd, $Dm */
ARM_VCVTBDH /* 2264 */, ARM_INS_VCVTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtb${p}.f64.f16 $Dd, $Sm */
ARM_VCVTBHD /* 2265 */, ARM_INS_VCVTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtb${p}.f32.f16 $Sd, $Sm */
ARM_VCVTBHS /* 2266 */, ARM_INS_VCVTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFP16, 0 }, 0, 0
#endif
},
{
/* vcvtb${p}.f16.f32 $Sd, $Sm */
ARM_VCVTBSH /* 2267 */, ARM_INS_VCVTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f64.f32 $Dd, $Sm */
ARM_VCVTDS /* 2268 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtm.s32.f32 $Vd, $Vm */
ARM_VCVTMNSDf /* 2269 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtm.s16.f16 $Vd, $Vm */
ARM_VCVTMNSDh /* 2270 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtm.s32.f32 $Vd, $Vm */
ARM_VCVTMNSQf /* 2271 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtm.s16.f16 $Vd, $Vm */
ARM_VCVTMNSQh /* 2272 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtm.u32.f32 $Vd, $Vm */
ARM_VCVTMNUDf /* 2273 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtm.u16.f16 $Vd, $Vm */
ARM_VCVTMNUDh /* 2274 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtm.u32.f32 $Vd, $Vm */
ARM_VCVTMNUQf /* 2275 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtm.u16.f16 $Vd, $Vm */
ARM_VCVTMNUQh /* 2276 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtm.s32.f64 $Sd, $Dm */
ARM_VCVTMSD /* 2277 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtm.s32.f16 $Sd, $Sm */
ARM_VCVTMSH /* 2278 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtm.s32.f32 $Sd, $Sm */
ARM_VCVTMSS /* 2279 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vcvtm.u32.f64 $Sd, $Dm */
ARM_VCVTMUD /* 2280 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtm.u32.f16 $Sd, $Sm */
ARM_VCVTMUH /* 2281 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtm.u32.f32 $Sd, $Sm */
ARM_VCVTMUS /* 2282 */, ARM_INS_VCVTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vcvtn.s32.f32 $Vd, $Vm */
ARM_VCVTNNSDf /* 2283 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtn.s16.f16 $Vd, $Vm */
ARM_VCVTNNSDh /* 2284 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtn.s32.f32 $Vd, $Vm */
ARM_VCVTNNSQf /* 2285 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtn.s16.f16 $Vd, $Vm */
ARM_VCVTNNSQh /* 2286 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtn.u32.f32 $Vd, $Vm */
ARM_VCVTNNUDf /* 2287 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtn.u16.f16 $Vd, $Vm */
ARM_VCVTNNUDh /* 2288 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtn.u32.f32 $Vd, $Vm */
ARM_VCVTNNUQf /* 2289 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtn.u16.f16 $Vd, $Vm */
ARM_VCVTNNUQh /* 2290 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtn.s32.f64 $Sd, $Dm */
ARM_VCVTNSD /* 2291 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtn.s32.f16 $Sd, $Sm */
ARM_VCVTNSH /* 2292 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtn.s32.f32 $Sd, $Sm */
ARM_VCVTNSS /* 2293 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vcvtn.u32.f64 $Sd, $Dm */
ARM_VCVTNUD /* 2294 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtn.u32.f16 $Sd, $Sm */
ARM_VCVTNUH /* 2295 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtn.u32.f32 $Sd, $Sm */
ARM_VCVTNUS /* 2296 */, ARM_INS_VCVTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vcvtp.s32.f32 $Vd, $Vm */
ARM_VCVTPNSDf /* 2297 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtp.s16.f16 $Vd, $Vm */
ARM_VCVTPNSDh /* 2298 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtp.s32.f32 $Vd, $Vm */
ARM_VCVTPNSQf /* 2299 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtp.s16.f16 $Vd, $Vm */
ARM_VCVTPNSQh /* 2300 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtp.u32.f32 $Vd, $Vm */
ARM_VCVTPNUDf /* 2301 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtp.u16.f16 $Vd, $Vm */
ARM_VCVTPNUDh /* 2302 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtp.u32.f32 $Vd, $Vm */
ARM_VCVTPNUQf /* 2303 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvtp.u16.f16 $Vd, $Vm */
ARM_VCVTPNUQh /* 2304 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtp.s32.f64 $Sd, $Dm */
ARM_VCVTPSD /* 2305 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtp.s32.f16 $Sd, $Sm */
ARM_VCVTPSH /* 2306 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtp.s32.f32 $Sd, $Sm */
ARM_VCVTPSS /* 2307 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vcvtp.u32.f64 $Sd, $Dm */
ARM_VCVTPUD /* 2308 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtp.u32.f16 $Sd, $Sm */
ARM_VCVTPUH /* 2309 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtp.u32.f32 $Sd, $Sm */
ARM_VCVTPUS /* 2310 */, ARM_INS_VCVTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.f64 $Sd, $Dm */
ARM_VCVTSD /* 2311 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtt${p}.f16.f64 $Sd, $Dm */
ARM_VCVTTDH /* 2312 */, ARM_INS_VCVTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtt${p}.f64.f16 $Dd, $Sm */
ARM_VCVTTHD /* 2313 */, ARM_INS_VCVTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtt${p}.f32.f16 $Sd, $Sm */
ARM_VCVTTHS /* 2314 */, ARM_INS_VCVTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFP16, 0 }, 0, 0
#endif
},
{
/* vcvtt${p}.f16.f32 $Sd, $Sm */
ARM_VCVTTSH /* 2315 */, ARM_INS_VCVTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.f32 $Vd, $Vm */
ARM_VCVTf2h /* 2316 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f32 $Vd, $Vm */
ARM_VCVTf2sd /* 2317 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f32 $Vd, $Vm */
ARM_VCVTf2sq /* 2318 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f32 $Vd, $Vm */
ARM_VCVTf2ud /* 2319 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f32 $Vd, $Vm */
ARM_VCVTf2uq /* 2320 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f32 $Vd, $Vm, $SIMM */
ARM_VCVTf2xsd /* 2321 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f32 $Vd, $Vm, $SIMM */
ARM_VCVTf2xsq /* 2322 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f32 $Vd, $Vm, $SIMM */
ARM_VCVTf2xud /* 2323 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f32 $Vd, $Vm, $SIMM */
ARM_VCVTf2xuq /* 2324 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.f16 $Vd, $Vm */
ARM_VCVTh2f /* 2325 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s16.f16 $Vd, $Vm */
ARM_VCVTh2sd /* 2326 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s16.f16 $Vd, $Vm */
ARM_VCVTh2sq /* 2327 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u16.f16 $Vd, $Vm */
ARM_VCVTh2ud /* 2328 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u16.f16 $Vd, $Vm */
ARM_VCVTh2uq /* 2329 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s16.f16 $Vd, $Vm, $SIMM */
ARM_VCVTh2xsd /* 2330 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s16.f16 $Vd, $Vm, $SIMM */
ARM_VCVTh2xsq /* 2331 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u16.f16 $Vd, $Vm, $SIMM */
ARM_VCVTh2xud /* 2332 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u16.f16 $Vd, $Vm, $SIMM */
ARM_VCVTh2xuq /* 2333 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.s32 $Vd, $Vm */
ARM_VCVTs2fd /* 2334 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.s32 $Vd, $Vm */
ARM_VCVTs2fq /* 2335 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.s16 $Vd, $Vm */
ARM_VCVTs2hd /* 2336 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.s16 $Vd, $Vm */
ARM_VCVTs2hq /* 2337 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.u32 $Vd, $Vm */
ARM_VCVTu2fd /* 2338 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.u32 $Vd, $Vm */
ARM_VCVTu2fq /* 2339 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.u16 $Vd, $Vm */
ARM_VCVTu2hd /* 2340 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.u16 $Vd, $Vm */
ARM_VCVTu2hq /* 2341 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.s32 $Vd, $Vm, $SIMM */
ARM_VCVTxs2fd /* 2342 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.s32 $Vd, $Vm, $SIMM */
ARM_VCVTxs2fq /* 2343 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.s16 $Vd, $Vm, $SIMM */
ARM_VCVTxs2hd /* 2344 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.s16 $Vd, $Vm, $SIMM */
ARM_VCVTxs2hq /* 2345 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.u32 $Vd, $Vm, $SIMM */
ARM_VCVTxu2fd /* 2346 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.u32 $Vd, $Vm, $SIMM */
ARM_VCVTxu2fq /* 2347 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.u16 $Vd, $Vm, $SIMM */
ARM_VCVTxu2hd /* 2348 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.u16 $Vd, $Vm, $SIMM */
ARM_VCVTxu2hq /* 2349 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vdiv${p}.f64 $Dd, $Dn, $Dm */
ARM_VDIVD /* 2350 */, ARM_INS_VDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vdiv${p}.f16 $Sd, $Sn, $Sm */
ARM_VDIVH /* 2351 */, ARM_INS_VDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vdiv${p}.f32 $Sd, $Sn, $Sm */
ARM_VDIVS /* 2352 */, ARM_INS_VDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vdup${p}.16 $V, $R */
ARM_VDUP16d /* 2353 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.16 $V, $R */
ARM_VDUP16q /* 2354 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.32 $V, $R */
ARM_VDUP32d /* 2355 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.32 $V, $R */
ARM_VDUP32q /* 2356 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.8 $V, $R */
ARM_VDUP8d /* 2357 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.8 $V, $R */
ARM_VDUP8q /* 2358 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.16 $Vd, $Vm$lane */
ARM_VDUPLN16d /* 2359 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.16 $Vd, $Vm$lane */
ARM_VDUPLN16q /* 2360 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.32 $Vd, $Vm$lane */
ARM_VDUPLN32d /* 2361 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.32 $Vd, $Vm$lane */
ARM_VDUPLN32q /* 2362 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.8 $Vd, $Vm$lane */
ARM_VDUPLN8d /* 2363 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vdup${p}.8 $Vd, $Vm$lane */
ARM_VDUPLN8q /* 2364 */, ARM_INS_VDUP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* veor${p} $Vd, $Vn, $Vm */
ARM_VEORd /* 2365 */, ARM_INS_VEOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* veor${p} $Vd, $Vn, $Vm */
ARM_VEORq /* 2366 */, ARM_INS_VEOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vext${p}.16 $Vd, $Vn, $Vm, $index */
ARM_VEXTd16 /* 2367 */, ARM_INS_VEXT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vext${p}.32 $Vd, $Vn, $Vm, $index */
ARM_VEXTd32 /* 2368 */, ARM_INS_VEXT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vext${p}.8 $Vd, $Vn, $Vm, $index */
ARM_VEXTd8 /* 2369 */, ARM_INS_VEXT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vext${p}.16 $Vd, $Vn, $Vm, $index */
ARM_VEXTq16 /* 2370 */, ARM_INS_VEXT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vext${p}.32 $Vd, $Vn, $Vm, $index */
ARM_VEXTq32 /* 2371 */, ARM_INS_VEXT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vext${p}.64 $Vd, $Vn, $Vm, $index */
ARM_VEXTq64 /* 2372 */, ARM_INS_VEXT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vext${p}.8 $Vd, $Vn, $Vm, $index */
ARM_VEXTq8 /* 2373 */, ARM_INS_VEXT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vfma${p}.f64 $Dd, $Dn, $Dm */
ARM_VFMAD /* 2374 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP4, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vfma${p}.f16 $Sd, $Sn, $Sm */
ARM_VFMAH /* 2375 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vfmal.f16 $Vd, $Vn, $Vm */
ARM_VFMALD /* 2376 */, ARM_INS_VFMAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16FML, 0 }, 0, 0
#endif
},
{
/* vfmal.f16 $Vd, $Vn, $Vm$idx */
ARM_VFMALDI /* 2377 */, ARM_INS_VFMAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16FML, 0 }, 0, 0
#endif
},
{
/* vfmal.f16 $Vd, $Vn, $Vm */
ARM_VFMALQ /* 2378 */, ARM_INS_VFMAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16FML, 0 }, 0, 0
#endif
},
{
/* vfmal.f16 $Vd, $Vn, $Vm$idx */
ARM_VFMALQI /* 2379 */, ARM_INS_VFMAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16FML, 0 }, 0, 0
#endif
},
{
/* vfma${p}.f32 $Sd, $Sn, $Sm */
ARM_VFMAS /* 2380 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP4, 0 }, 0, 0
#endif
},
{
/* vfma${p}.f32 $Vd, $Vn, $Vm */
ARM_VFMAfd /* 2381 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasVFP4, 0 }, 0, 0
#endif
},
{
/* vfma${p}.f32 $Vd, $Vn, $Vm */
ARM_VFMAfq /* 2382 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasVFP4, 0 }, 0, 0
#endif
},
{
/* vfma${p}.f16 $Vd, $Vn, $Vm */
ARM_VFMAhd /* 2383 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vfma${p}.f16 $Vd, $Vn, $Vm */
ARM_VFMAhq /* 2384 */, ARM_INS_VFMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vfms${p}.f64 $Dd, $Dn, $Dm */
ARM_VFMSD /* 2385 */, ARM_INS_VFMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP4, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vfms${p}.f16 $Sd, $Sn, $Sm */
ARM_VFMSH /* 2386 */, ARM_INS_VFMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vfmsl.f16 $Vd, $Vn, $Vm */
ARM_VFMSLD /* 2387 */, ARM_INS_VFMSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16FML, 0 }, 0, 0
#endif
},
{
/* vfmsl.f16 $Vd, $Vn, $Vm$idx */
ARM_VFMSLDI /* 2388 */, ARM_INS_VFMSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16FML, 0 }, 0, 0
#endif
},
{
/* vfmsl.f16 $Vd, $Vn, $Vm */
ARM_VFMSLQ /* 2389 */, ARM_INS_VFMSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16FML, 0 }, 0, 0
#endif
},
{
/* vfmsl.f16 $Vd, $Vn, $Vm$idx */
ARM_VFMSLQI /* 2390 */, ARM_INS_VFMSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFP16FML, 0 }, 0, 0
#endif
},
{
/* vfms${p}.f32 $Sd, $Sn, $Sm */
ARM_VFMSS /* 2391 */, ARM_INS_VFMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP4, 0 }, 0, 0
#endif
},
{
/* vfms${p}.f32 $Vd, $Vn, $Vm */
ARM_VFMSfd /* 2392 */, ARM_INS_VFMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasVFP4, 0 }, 0, 0
#endif
},
{
/* vfms${p}.f32 $Vd, $Vn, $Vm */
ARM_VFMSfq /* 2393 */, ARM_INS_VFMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasVFP4, 0 }, 0, 0
#endif
},
{
/* vfms${p}.f16 $Vd, $Vn, $Vm */
ARM_VFMShd /* 2394 */, ARM_INS_VFMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vfms${p}.f16 $Vd, $Vn, $Vm */
ARM_VFMShq /* 2395 */, ARM_INS_VFMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vfnma${p}.f64 $Dd, $Dn, $Dm */
ARM_VFNMAD /* 2396 */, ARM_INS_VFNMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP4, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vfnma${p}.f16 $Sd, $Sn, $Sm */
ARM_VFNMAH /* 2397 */, ARM_INS_VFNMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vfnma${p}.f32 $Sd, $Sn, $Sm */
ARM_VFNMAS /* 2398 */, ARM_INS_VFNMA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP4, 0 }, 0, 0
#endif
},
{
/* vfnms${p}.f64 $Dd, $Dn, $Dm */
ARM_VFNMSD /* 2399 */, ARM_INS_VFNMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP4, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vfnms${p}.f16 $Sd, $Sn, $Sm */
ARM_VFNMSH /* 2400 */, ARM_INS_VFNMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vfnms${p}.f32 $Sd, $Sn, $Sm */
ARM_VFNMSS /* 2401 */, ARM_INS_VFNMS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP4, 0 }, 0, 0
#endif
},
{
/* vmaxnm.f64 $Dd, $Dn, $Dm */
ARM_VFP_VMAXNMD /* 2402 */, ARM_INS_VMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vmaxnm.f16 $Sd, $Sn, $Sm */
ARM_VFP_VMAXNMH /* 2403 */, ARM_INS_VMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmaxnm.f32 $Sd, $Sn, $Sm */
ARM_VFP_VMAXNMS /* 2404 */, ARM_INS_VMAXNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vminnm.f64 $Dd, $Dn, $Dm */
ARM_VFP_VMINNMD /* 2405 */, ARM_INS_VMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vminnm.f16 $Sd, $Sn, $Sm */
ARM_VFP_VMINNMH /* 2406 */, ARM_INS_VMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vminnm.f32 $Sd, $Sn, $Sm */
ARM_VFP_VMINNMS /* 2407 */, ARM_INS_VMINNM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vmov${p}.32 $R, $V$lane */
ARM_VGETLNi32 /* 2408 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmov${p}.s16 $R, $V$lane */
ARM_VGETLNs16 /* 2409 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.s8 $R, $V$lane */
ARM_VGETLNs8 /* 2410 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.u16 $R, $V$lane */
ARM_VGETLNu16 /* 2411 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.u8 $R, $V$lane */
ARM_VGETLNu8 /* 2412 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.s8 $Vd, $Vn, $Vm */
ARM_VHADDsv16i8 /* 2413 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.s32 $Vd, $Vn, $Vm */
ARM_VHADDsv2i32 /* 2414 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.s16 $Vd, $Vn, $Vm */
ARM_VHADDsv4i16 /* 2415 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.s32 $Vd, $Vn, $Vm */
ARM_VHADDsv4i32 /* 2416 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.s16 $Vd, $Vn, $Vm */
ARM_VHADDsv8i16 /* 2417 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.s8 $Vd, $Vn, $Vm */
ARM_VHADDsv8i8 /* 2418 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.u8 $Vd, $Vn, $Vm */
ARM_VHADDuv16i8 /* 2419 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.u32 $Vd, $Vn, $Vm */
ARM_VHADDuv2i32 /* 2420 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.u16 $Vd, $Vn, $Vm */
ARM_VHADDuv4i16 /* 2421 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.u32 $Vd, $Vn, $Vm */
ARM_VHADDuv4i32 /* 2422 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.u16 $Vd, $Vn, $Vm */
ARM_VHADDuv8i16 /* 2423 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhadd${p}.u8 $Vd, $Vn, $Vm */
ARM_VHADDuv8i8 /* 2424 */, ARM_INS_VHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.s8 $Vd, $Vn, $Vm */
ARM_VHSUBsv16i8 /* 2425 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.s32 $Vd, $Vn, $Vm */
ARM_VHSUBsv2i32 /* 2426 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.s16 $Vd, $Vn, $Vm */
ARM_VHSUBsv4i16 /* 2427 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.s32 $Vd, $Vn, $Vm */
ARM_VHSUBsv4i32 /* 2428 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.s16 $Vd, $Vn, $Vm */
ARM_VHSUBsv8i16 /* 2429 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.s8 $Vd, $Vn, $Vm */
ARM_VHSUBsv8i8 /* 2430 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.u8 $Vd, $Vn, $Vm */
ARM_VHSUBuv16i8 /* 2431 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.u32 $Vd, $Vn, $Vm */
ARM_VHSUBuv2i32 /* 2432 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.u16 $Vd, $Vn, $Vm */
ARM_VHSUBuv4i16 /* 2433 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.u32 $Vd, $Vn, $Vm */
ARM_VHSUBuv4i32 /* 2434 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.u16 $Vd, $Vn, $Vm */
ARM_VHSUBuv8i16 /* 2435 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vhsub${p}.u8 $Vd, $Vn, $Vm */
ARM_VHSUBuv8i8 /* 2436 */, ARM_INS_VHSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vins.f16 $Sd, $Sm */
ARM_VINSH /* 2437 */, ARM_INS_VINS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vjcvt${p}.s32.f64 $Sd, $Dm */
ARM_VJCVT /* 2438 */, ARM_INS_VJCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasV8_3a, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn */
ARM_VLD1DUPd16 /* 2439 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn! */
ARM_VLD1DUPd16wb_fixed /* 2440 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn, $Rm */
ARM_VLD1DUPd16wb_register /* 2441 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn */
ARM_VLD1DUPd32 /* 2442 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn! */
ARM_VLD1DUPd32wb_fixed /* 2443 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn, $Rm */
ARM_VLD1DUPd32wb_register /* 2444 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn */
ARM_VLD1DUPd8 /* 2445 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn! */
ARM_VLD1DUPd8wb_fixed /* 2446 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn, $Rm */
ARM_VLD1DUPd8wb_register /* 2447 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn */
ARM_VLD1DUPq16 /* 2448 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn! */
ARM_VLD1DUPq16wb_fixed /* 2449 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn, $Rm */
ARM_VLD1DUPq16wb_register /* 2450 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn */
ARM_VLD1DUPq32 /* 2451 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn! */
ARM_VLD1DUPq32wb_fixed /* 2452 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn, $Rm */
ARM_VLD1DUPq32wb_register /* 2453 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn */
ARM_VLD1DUPq8 /* 2454 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn! */
ARM_VLD1DUPq8wb_fixed /* 2455 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn, $Rm */
ARM_VLD1DUPq8wb_register /* 2456 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 \{$Vd[$lane]\}, $Rn */
ARM_VLD1LNd16 /* 2457 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 \{$Vd[$lane]\}, $Rn$Rm */
ARM_VLD1LNd16_UPD /* 2458 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 \{$Vd[$lane]\}, $Rn */
ARM_VLD1LNd32 /* 2459 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 \{$Vd[$lane]\}, $Rn$Rm */
ARM_VLD1LNd32_UPD /* 2460 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 \{$Vd[$lane]\}, $Rn */
ARM_VLD1LNd8 /* 2461 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 \{$Vd[$lane]\}, $Rn$Rm */
ARM_VLD1LNd8_UPD /* 2462 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1LNq16Pseudo /* 2463 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1LNq16Pseudo_UPD /* 2464 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1LNq32Pseudo /* 2465 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1LNq32Pseudo_UPD /* 2466 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1LNq8Pseudo /* 2467 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1LNq8Pseudo_UPD /* 2468 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn */
ARM_VLD1d16 /* 2469 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn */
ARM_VLD1d16Q /* 2470 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d16QPseudo /* 2471 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d16QPseudoWB_fixed /* 2472 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d16QPseudoWB_register /* 2473 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn! */
ARM_VLD1d16Qwb_fixed /* 2474 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn, $Rm */
ARM_VLD1d16Qwb_register /* 2475 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn */
ARM_VLD1d16T /* 2476 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d16TPseudo /* 2477 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d16TPseudoWB_fixed /* 2478 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d16TPseudoWB_register /* 2479 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn! */
ARM_VLD1d16Twb_fixed /* 2480 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn, $Rm */
ARM_VLD1d16Twb_register /* 2481 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn! */
ARM_VLD1d16wb_fixed /* 2482 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn, $Rm */
ARM_VLD1d16wb_register /* 2483 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn */
ARM_VLD1d32 /* 2484 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn */
ARM_VLD1d32Q /* 2485 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d32QPseudo /* 2486 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d32QPseudoWB_fixed /* 2487 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d32QPseudoWB_register /* 2488 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn! */
ARM_VLD1d32Qwb_fixed /* 2489 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn, $Rm */
ARM_VLD1d32Qwb_register /* 2490 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn */
ARM_VLD1d32T /* 2491 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d32TPseudo /* 2492 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d32TPseudoWB_fixed /* 2493 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d32TPseudoWB_register /* 2494 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn! */
ARM_VLD1d32Twb_fixed /* 2495 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn, $Rm */
ARM_VLD1d32Twb_register /* 2496 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn! */
ARM_VLD1d32wb_fixed /* 2497 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn, $Rm */
ARM_VLD1d32wb_register /* 2498 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn */
ARM_VLD1d64 /* 2499 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn */
ARM_VLD1d64Q /* 2500 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d64QPseudo /* 2501 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d64QPseudoWB_fixed /* 2502 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d64QPseudoWB_register /* 2503 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn! */
ARM_VLD1d64Qwb_fixed /* 2504 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn, $Rm */
ARM_VLD1d64Qwb_register /* 2505 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn */
ARM_VLD1d64T /* 2506 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d64TPseudo /* 2507 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d64TPseudoWB_fixed /* 2508 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d64TPseudoWB_register /* 2509 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn! */
ARM_VLD1d64Twb_fixed /* 2510 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn, $Rm */
ARM_VLD1d64Twb_register /* 2511 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn! */
ARM_VLD1d64wb_fixed /* 2512 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn, $Rm */
ARM_VLD1d64wb_register /* 2513 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn */
ARM_VLD1d8 /* 2514 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn */
ARM_VLD1d8Q /* 2515 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d8QPseudo /* 2516 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d8QPseudoWB_fixed /* 2517 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d8QPseudoWB_register /* 2518 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn! */
ARM_VLD1d8Qwb_fixed /* 2519 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn, $Rm */
ARM_VLD1d8Qwb_register /* 2520 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn */
ARM_VLD1d8T /* 2521 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d8TPseudo /* 2522 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d8TPseudoWB_fixed /* 2523 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1d8TPseudoWB_register /* 2524 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn! */
ARM_VLD1d8Twb_fixed /* 2525 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn, $Rm */
ARM_VLD1d8Twb_register /* 2526 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn! */
ARM_VLD1d8wb_fixed /* 2527 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn, $Rm */
ARM_VLD1d8wb_register /* 2528 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn */
ARM_VLD1q16 /* 2529 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q16HighQPseudo /* 2530 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q16HighQPseudo_UPD /* 2531 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q16HighTPseudo /* 2532 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q16HighTPseudo_UPD /* 2533 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q16LowQPseudo_UPD /* 2534 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q16LowTPseudo_UPD /* 2535 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn! */
ARM_VLD1q16wb_fixed /* 2536 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.16 $Vd, $Rn, $Rm */
ARM_VLD1q16wb_register /* 2537 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn */
ARM_VLD1q32 /* 2538 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q32HighQPseudo /* 2539 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q32HighQPseudo_UPD /* 2540 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q32HighTPseudo /* 2541 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q32HighTPseudo_UPD /* 2542 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q32LowQPseudo_UPD /* 2543 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q32LowTPseudo_UPD /* 2544 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn! */
ARM_VLD1q32wb_fixed /* 2545 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.32 $Vd, $Rn, $Rm */
ARM_VLD1q32wb_register /* 2546 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn */
ARM_VLD1q64 /* 2547 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q64HighQPseudo /* 2548 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q64HighQPseudo_UPD /* 2549 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q64HighTPseudo /* 2550 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q64HighTPseudo_UPD /* 2551 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q64LowQPseudo_UPD /* 2552 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q64LowTPseudo_UPD /* 2553 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn! */
ARM_VLD1q64wb_fixed /* 2554 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.64 $Vd, $Rn, $Rm */
ARM_VLD1q64wb_register /* 2555 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn */
ARM_VLD1q8 /* 2556 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q8HighQPseudo /* 2557 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q8HighQPseudo_UPD /* 2558 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q8HighTPseudo /* 2559 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q8HighTPseudo_UPD /* 2560 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q8LowQPseudo_UPD /* 2561 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD1q8LowTPseudo_UPD /* 2562 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn! */
ARM_VLD1q8wb_fixed /* 2563 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld1${p}.8 $Vd, $Rn, $Rm */
ARM_VLD1q8wb_register /* 2564 */, ARM_INS_VLD1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn */
ARM_VLD2DUPd16 /* 2565 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn! */
ARM_VLD2DUPd16wb_fixed /* 2566 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn, $Rm */
ARM_VLD2DUPd16wb_register /* 2567 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn */
ARM_VLD2DUPd16x2 /* 2568 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn! */
ARM_VLD2DUPd16x2wb_fixed /* 2569 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn, $Rm */
ARM_VLD2DUPd16x2wb_register /* 2570 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn */
ARM_VLD2DUPd32 /* 2571 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn! */
ARM_VLD2DUPd32wb_fixed /* 2572 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn, $Rm */
ARM_VLD2DUPd32wb_register /* 2573 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn */
ARM_VLD2DUPd32x2 /* 2574 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn! */
ARM_VLD2DUPd32x2wb_fixed /* 2575 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn, $Rm */
ARM_VLD2DUPd32x2wb_register /* 2576 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn */
ARM_VLD2DUPd8 /* 2577 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn! */
ARM_VLD2DUPd8wb_fixed /* 2578 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn, $Rm */
ARM_VLD2DUPd8wb_register /* 2579 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn */
ARM_VLD2DUPd8x2 /* 2580 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn! */
ARM_VLD2DUPd8x2wb_fixed /* 2581 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn, $Rm */
ARM_VLD2DUPd8x2wb_register /* 2582 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq16EvenPseudo /* 2583 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq16OddPseudo /* 2584 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq16OddPseudoWB_fixed /* 2585 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq16OddPseudoWB_register /* 2586 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq32EvenPseudo /* 2587 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq32OddPseudo /* 2588 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq32OddPseudoWB_fixed /* 2589 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq32OddPseudoWB_register /* 2590 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq8EvenPseudo /* 2591 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq8OddPseudo /* 2592 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq8OddPseudoWB_fixed /* 2593 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2DUPq8OddPseudoWB_register /* 2594 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 \{$Vd[$lane], $dst2[$lane]\}, $Rn */
ARM_VLD2LNd16 /* 2595 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNd16Pseudo /* 2596 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNd16Pseudo_UPD /* 2597 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 \{$Vd[$lane], $dst2[$lane]\}, $Rn$Rm */
ARM_VLD2LNd16_UPD /* 2598 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 \{$Vd[$lane], $dst2[$lane]\}, $Rn */
ARM_VLD2LNd32 /* 2599 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNd32Pseudo /* 2600 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNd32Pseudo_UPD /* 2601 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 \{$Vd[$lane], $dst2[$lane]\}, $Rn$Rm */
ARM_VLD2LNd32_UPD /* 2602 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 \{$Vd[$lane], $dst2[$lane]\}, $Rn */
ARM_VLD2LNd8 /* 2603 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNd8Pseudo /* 2604 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNd8Pseudo_UPD /* 2605 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 \{$Vd[$lane], $dst2[$lane]\}, $Rn$Rm */
ARM_VLD2LNd8_UPD /* 2606 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 \{$Vd[$lane], $dst2[$lane]\}, $Rn */
ARM_VLD2LNq16 /* 2607 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNq16Pseudo /* 2608 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNq16Pseudo_UPD /* 2609 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 \{$Vd[$lane], $dst2[$lane]\}, $Rn$Rm */
ARM_VLD2LNq16_UPD /* 2610 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 \{$Vd[$lane], $dst2[$lane]\}, $Rn */
ARM_VLD2LNq32 /* 2611 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNq32Pseudo /* 2612 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2LNq32Pseudo_UPD /* 2613 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 \{$Vd[$lane], $dst2[$lane]\}, $Rn$Rm */
ARM_VLD2LNq32_UPD /* 2614 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn */
ARM_VLD2b16 /* 2615 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn! */
ARM_VLD2b16wb_fixed /* 2616 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn, $Rm */
ARM_VLD2b16wb_register /* 2617 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn */
ARM_VLD2b32 /* 2618 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn! */
ARM_VLD2b32wb_fixed /* 2619 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn, $Rm */
ARM_VLD2b32wb_register /* 2620 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn */
ARM_VLD2b8 /* 2621 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn! */
ARM_VLD2b8wb_fixed /* 2622 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn, $Rm */
ARM_VLD2b8wb_register /* 2623 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn */
ARM_VLD2d16 /* 2624 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn! */
ARM_VLD2d16wb_fixed /* 2625 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn, $Rm */
ARM_VLD2d16wb_register /* 2626 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn */
ARM_VLD2d32 /* 2627 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn! */
ARM_VLD2d32wb_fixed /* 2628 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn, $Rm */
ARM_VLD2d32wb_register /* 2629 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn */
ARM_VLD2d8 /* 2630 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn! */
ARM_VLD2d8wb_fixed /* 2631 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn, $Rm */
ARM_VLD2d8wb_register /* 2632 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn */
ARM_VLD2q16 /* 2633 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2q16Pseudo /* 2634 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2q16PseudoWB_fixed /* 2635 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2q16PseudoWB_register /* 2636 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn! */
ARM_VLD2q16wb_fixed /* 2637 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.16 $Vd, $Rn, $Rm */
ARM_VLD2q16wb_register /* 2638 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn */
ARM_VLD2q32 /* 2639 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2q32Pseudo /* 2640 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2q32PseudoWB_fixed /* 2641 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2q32PseudoWB_register /* 2642 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn! */
ARM_VLD2q32wb_fixed /* 2643 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.32 $Vd, $Rn, $Rm */
ARM_VLD2q32wb_register /* 2644 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn */
ARM_VLD2q8 /* 2645 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2q8Pseudo /* 2646 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2q8PseudoWB_fixed /* 2647 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD2q8PseudoWB_register /* 2648 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn! */
ARM_VLD2q8wb_fixed /* 2649 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld2${p}.8 $Vd, $Rn, $Rm */
ARM_VLD2q8wb_register /* 2650 */, ARM_INS_VLD2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd[], $dst2[], $dst3[]\}, $Rn */
ARM_VLD3DUPd16 /* 2651 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPd16Pseudo /* 2652 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPd16Pseudo_UPD /* 2653 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd[], $dst2[], $dst3[]\}, $Rn$Rm */
ARM_VLD3DUPd16_UPD /* 2654 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd[], $dst2[], $dst3[]\}, $Rn */
ARM_VLD3DUPd32 /* 2655 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPd32Pseudo /* 2656 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPd32Pseudo_UPD /* 2657 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd[], $dst2[], $dst3[]\}, $Rn$Rm */
ARM_VLD3DUPd32_UPD /* 2658 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd[], $dst2[], $dst3[]\}, $Rn */
ARM_VLD3DUPd8 /* 2659 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPd8Pseudo /* 2660 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPd8Pseudo_UPD /* 2661 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd[], $dst2[], $dst3[]\}, $Rn$Rm */
ARM_VLD3DUPd8_UPD /* 2662 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd[], $dst2[], $dst3[]\}, $Rn */
ARM_VLD3DUPq16 /* 2663 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPq16EvenPseudo /* 2664 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPq16OddPseudo /* 2665 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPq16OddPseudo_UPD /* 2666 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd[], $dst2[], $dst3[]\}, $Rn$Rm */
ARM_VLD3DUPq16_UPD /* 2667 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd[], $dst2[], $dst3[]\}, $Rn */
ARM_VLD3DUPq32 /* 2668 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPq32EvenPseudo /* 2669 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPq32OddPseudo /* 2670 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPq32OddPseudo_UPD /* 2671 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd[], $dst2[], $dst3[]\}, $Rn$Rm */
ARM_VLD3DUPq32_UPD /* 2672 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd[], $dst2[], $dst3[]\}, $Rn */
ARM_VLD3DUPq8 /* 2673 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPq8EvenPseudo /* 2674 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPq8OddPseudo /* 2675 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3DUPq8OddPseudo_UPD /* 2676 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd[], $dst2[], $dst3[]\}, $Rn$Rm */
ARM_VLD3DUPq8_UPD /* 2677 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn */
ARM_VLD3LNd16 /* 2678 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNd16Pseudo /* 2679 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNd16Pseudo_UPD /* 2680 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn$Rm */
ARM_VLD3LNd16_UPD /* 2681 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn */
ARM_VLD3LNd32 /* 2682 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNd32Pseudo /* 2683 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNd32Pseudo_UPD /* 2684 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn$Rm */
ARM_VLD3LNd32_UPD /* 2685 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn */
ARM_VLD3LNd8 /* 2686 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNd8Pseudo /* 2687 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNd8Pseudo_UPD /* 2688 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn$Rm */
ARM_VLD3LNd8_UPD /* 2689 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn */
ARM_VLD3LNq16 /* 2690 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNq16Pseudo /* 2691 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNq16Pseudo_UPD /* 2692 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn$Rm */
ARM_VLD3LNq16_UPD /* 2693 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn */
ARM_VLD3LNq32 /* 2694 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNq32Pseudo /* 2695 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3LNq32Pseudo_UPD /* 2696 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd[$lane], $dst2[$lane], $dst3[$lane]\}, $Rn$Rm */
ARM_VLD3LNq32_UPD /* 2697 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd, $dst2, $dst3\}, $Rn */
ARM_VLD3d16 /* 2698 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3d16Pseudo /* 2699 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3d16Pseudo_UPD /* 2700 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd, $dst2, $dst3\}, $Rn$Rm */
ARM_VLD3d16_UPD /* 2701 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd, $dst2, $dst3\}, $Rn */
ARM_VLD3d32 /* 2702 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3d32Pseudo /* 2703 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3d32Pseudo_UPD /* 2704 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd, $dst2, $dst3\}, $Rn$Rm */
ARM_VLD3d32_UPD /* 2705 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd, $dst2, $dst3\}, $Rn */
ARM_VLD3d8 /* 2706 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3d8Pseudo /* 2707 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3d8Pseudo_UPD /* 2708 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd, $dst2, $dst3\}, $Rn$Rm */
ARM_VLD3d8_UPD /* 2709 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd, $dst2, $dst3\}, $Rn */
ARM_VLD3q16 /* 2710 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3q16Pseudo_UPD /* 2711 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.16 \{$Vd, $dst2, $dst3\}, $Rn$Rm */
ARM_VLD3q16_UPD /* 2712 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3q16oddPseudo /* 2713 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3q16oddPseudo_UPD /* 2714 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd, $dst2, $dst3\}, $Rn */
ARM_VLD3q32 /* 2715 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3q32Pseudo_UPD /* 2716 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.32 \{$Vd, $dst2, $dst3\}, $Rn$Rm */
ARM_VLD3q32_UPD /* 2717 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3q32oddPseudo /* 2718 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3q32oddPseudo_UPD /* 2719 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd, $dst2, $dst3\}, $Rn */
ARM_VLD3q8 /* 2720 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3q8Pseudo_UPD /* 2721 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld3${p}.8 \{$Vd, $dst2, $dst3\}, $Rn$Rm */
ARM_VLD3q8_UPD /* 2722 */, ARM_INS_VLD3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3q8oddPseudo /* 2723 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD3q8oddPseudo_UPD /* 2724 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn */
ARM_VLD4DUPd16 /* 2725 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPd16Pseudo /* 2726 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPd16Pseudo_UPD /* 2727 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn$Rm */
ARM_VLD4DUPd16_UPD /* 2728 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn */
ARM_VLD4DUPd32 /* 2729 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPd32Pseudo /* 2730 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPd32Pseudo_UPD /* 2731 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn$Rm */
ARM_VLD4DUPd32_UPD /* 2732 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn */
ARM_VLD4DUPd8 /* 2733 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPd8Pseudo /* 2734 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPd8Pseudo_UPD /* 2735 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn$Rm */
ARM_VLD4DUPd8_UPD /* 2736 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn */
ARM_VLD4DUPq16 /* 2737 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPq16EvenPseudo /* 2738 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPq16OddPseudo /* 2739 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPq16OddPseudo_UPD /* 2740 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn$Rm */
ARM_VLD4DUPq16_UPD /* 2741 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn */
ARM_VLD4DUPq32 /* 2742 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPq32EvenPseudo /* 2743 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPq32OddPseudo /* 2744 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPq32OddPseudo_UPD /* 2745 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn$Rm */
ARM_VLD4DUPq32_UPD /* 2746 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn */
ARM_VLD4DUPq8 /* 2747 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPq8EvenPseudo /* 2748 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPq8OddPseudo /* 2749 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4DUPq8OddPseudo_UPD /* 2750 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd[], $dst2[], $dst3[], $dst4[]\}, $Rn$Rm */
ARM_VLD4DUPq8_UPD /* 2751 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn */
ARM_VLD4LNd16 /* 2752 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNd16Pseudo /* 2753 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNd16Pseudo_UPD /* 2754 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn$Rm */
ARM_VLD4LNd16_UPD /* 2755 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn */
ARM_VLD4LNd32 /* 2756 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNd32Pseudo /* 2757 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNd32Pseudo_UPD /* 2758 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn$Rm */
ARM_VLD4LNd32_UPD /* 2759 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn */
ARM_VLD4LNd8 /* 2760 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNd8Pseudo /* 2761 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNd8Pseudo_UPD /* 2762 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn$Rm */
ARM_VLD4LNd8_UPD /* 2763 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn */
ARM_VLD4LNq16 /* 2764 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNq16Pseudo /* 2765 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNq16Pseudo_UPD /* 2766 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn$Rm */
ARM_VLD4LNq16_UPD /* 2767 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn */
ARM_VLD4LNq32 /* 2768 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNq32Pseudo /* 2769 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4LNq32Pseudo_UPD /* 2770 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $Rn$Rm */
ARM_VLD4LNq32_UPD /* 2771 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd, $dst2, $dst3, $dst4\}, $Rn */
ARM_VLD4d16 /* 2772 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4d16Pseudo /* 2773 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4d16Pseudo_UPD /* 2774 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd, $dst2, $dst3, $dst4\}, $Rn$Rm */
ARM_VLD4d16_UPD /* 2775 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd, $dst2, $dst3, $dst4\}, $Rn */
ARM_VLD4d32 /* 2776 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4d32Pseudo /* 2777 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4d32Pseudo_UPD /* 2778 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd, $dst2, $dst3, $dst4\}, $Rn$Rm */
ARM_VLD4d32_UPD /* 2779 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd, $dst2, $dst3, $dst4\}, $Rn */
ARM_VLD4d8 /* 2780 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4d8Pseudo /* 2781 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4d8Pseudo_UPD /* 2782 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd, $dst2, $dst3, $dst4\}, $Rn$Rm */
ARM_VLD4d8_UPD /* 2783 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd, $dst2, $dst3, $dst4\}, $Rn */
ARM_VLD4q16 /* 2784 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4q16Pseudo_UPD /* 2785 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.16 \{$Vd, $dst2, $dst3, $dst4\}, $Rn$Rm */
ARM_VLD4q16_UPD /* 2786 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4q16oddPseudo /* 2787 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4q16oddPseudo_UPD /* 2788 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd, $dst2, $dst3, $dst4\}, $Rn */
ARM_VLD4q32 /* 2789 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4q32Pseudo_UPD /* 2790 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.32 \{$Vd, $dst2, $dst3, $dst4\}, $Rn$Rm */
ARM_VLD4q32_UPD /* 2791 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4q32oddPseudo /* 2792 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4q32oddPseudo_UPD /* 2793 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd, $dst2, $dst3, $dst4\}, $Rn */
ARM_VLD4q8 /* 2794 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4q8Pseudo_UPD /* 2795 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vld4${p}.8 \{$Vd, $dst2, $dst3, $dst4\}, $Rn$Rm */
ARM_VLD4q8_UPD /* 2796 */, ARM_INS_VLD4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4q8oddPseudo /* 2797 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLD4q8oddPseudo_UPD /* 2798 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vldmdb${p} $Rn!, $regs */
ARM_VLDMDDB_UPD /* 2799 */, ARM_INS_VLDMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vldmia${p} $Rn, $regs */
ARM_VLDMDIA /* 2800 */, ARM_INS_VLDMIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vldmia${p} $Rn!, $regs */
ARM_VLDMDIA_UPD /* 2801 */, ARM_INS_VLDMIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VLDMQIA /* 2802 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vldmdb${p} $Rn!, $regs */
ARM_VLDMSDB_UPD /* 2803 */, ARM_INS_VLDMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vldmia${p} $Rn, $regs */
ARM_VLDMSIA /* 2804 */, ARM_INS_VLDMIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vldmia${p} $Rn!, $regs */
ARM_VLDMSIA_UPD /* 2805 */, ARM_INS_VLDMIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vldr${p} $Dd, $addr */
ARM_VLDRD /* 2806 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vldr${p}.16 $Sd, $addr */
ARM_VLDRH /* 2807 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs16, 0 }, 0, 0
#endif
},
{
/* vldr${p} $Sd, $addr */
ARM_VLDRS /* 2808 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpcxtns, $addr */
ARM_VLDR_FPCXTNS_off /* 2809 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpcxtns, $Rn$addr */
ARM_VLDR_FPCXTNS_post /* 2810 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpcxtns, $addr! */
ARM_VLDR_FPCXTNS_pre /* 2811 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpcxts, $addr */
ARM_VLDR_FPCXTS_off /* 2812 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpcxts, $Rn$addr */
ARM_VLDR_FPCXTS_post /* 2813 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpcxts, $addr! */
ARM_VLDR_FPCXTS_pre /* 2814 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpscr_nzcvqc, $addr */
ARM_VLDR_FPSCR_NZCVQC_off /* 2815 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpscr_nzcvqc, $Rn$addr */
ARM_VLDR_FPSCR_NZCVQC_post /* 2816 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpscr_nzcvqc, $addr! */
ARM_VLDR_FPSCR_NZCVQC_pre /* 2817 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpscr, $addr */
ARM_VLDR_FPSCR_off /* 2818 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpscr, $Rn$addr */
ARM_VLDR_FPSCR_post /* 2819 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vldr${p} fpscr, $addr! */
ARM_VLDR_FPSCR_pre /* 2820 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vldr${p} p0, $addr */
ARM_VLDR_P0_off /* 2821 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldr${p} p0, $Rn$addr */
ARM_VLDR_P0_post /* 2822 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldr${p} p0, $addr! */
ARM_VLDR_P0_pre /* 2823 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldr${p} vpr, $addr */
ARM_VLDR_VPR_off /* 2824 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldr${p} vpr, $Rn$addr */
ARM_VLDR_VPR_post /* 2825 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vldr${p} vpr, $addr! */
ARM_VLDR_VPR_pre /* 2826 */, ARM_INS_VLDR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vlldm${p} $Rn */
ARM_VLLDM /* 2827 */, ARM_INS_VLLDM,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_Q0, ARM_REG_Q1, ARM_REG_Q2, ARM_REG_Q3, ARM_REG_Q4, ARM_REG_Q5, ARM_REG_Q6, ARM_REG_Q7, ARM_REG_VPR, ARM_REG_FPSCR, ARM_REG_FPSCR_NZCV, 0 }, { ARM_FEATURE_HasV8MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vlstm${p} $Rn */
ARM_VLSTM /* 2828 */, ARM_INS_VLSTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vmax${p}.f32 $Vd, $Vn, $Vm */
ARM_VMAXfd /* 2829 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.f32 $Vd, $Vn, $Vm */
ARM_VMAXfq /* 2830 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.f16 $Vd, $Vn, $Vm */
ARM_VMAXhd /* 2831 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmax${p}.f16 $Vd, $Vn, $Vm */
ARM_VMAXhq /* 2832 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmax${p}.s8 $Vd, $Vn, $Vm */
ARM_VMAXsv16i8 /* 2833 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.s32 $Vd, $Vn, $Vm */
ARM_VMAXsv2i32 /* 2834 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.s16 $Vd, $Vn, $Vm */
ARM_VMAXsv4i16 /* 2835 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.s32 $Vd, $Vn, $Vm */
ARM_VMAXsv4i32 /* 2836 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.s16 $Vd, $Vn, $Vm */
ARM_VMAXsv8i16 /* 2837 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.s8 $Vd, $Vn, $Vm */
ARM_VMAXsv8i8 /* 2838 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.u8 $Vd, $Vn, $Vm */
ARM_VMAXuv16i8 /* 2839 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.u32 $Vd, $Vn, $Vm */
ARM_VMAXuv2i32 /* 2840 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.u16 $Vd, $Vn, $Vm */
ARM_VMAXuv4i16 /* 2841 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.u32 $Vd, $Vn, $Vm */
ARM_VMAXuv4i32 /* 2842 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.u16 $Vd, $Vn, $Vm */
ARM_VMAXuv8i16 /* 2843 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmax${p}.u8 $Vd, $Vn, $Vm */
ARM_VMAXuv8i8 /* 2844 */, ARM_INS_VMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.f32 $Vd, $Vn, $Vm */
ARM_VMINfd /* 2845 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.f32 $Vd, $Vn, $Vm */
ARM_VMINfq /* 2846 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.f16 $Vd, $Vn, $Vm */
ARM_VMINhd /* 2847 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmin${p}.f16 $Vd, $Vn, $Vm */
ARM_VMINhq /* 2848 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmin${p}.s8 $Vd, $Vn, $Vm */
ARM_VMINsv16i8 /* 2849 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.s32 $Vd, $Vn, $Vm */
ARM_VMINsv2i32 /* 2850 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.s16 $Vd, $Vn, $Vm */
ARM_VMINsv4i16 /* 2851 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.s32 $Vd, $Vn, $Vm */
ARM_VMINsv4i32 /* 2852 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.s16 $Vd, $Vn, $Vm */
ARM_VMINsv8i16 /* 2853 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.s8 $Vd, $Vn, $Vm */
ARM_VMINsv8i8 /* 2854 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.u8 $Vd, $Vn, $Vm */
ARM_VMINuv16i8 /* 2855 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.u32 $Vd, $Vn, $Vm */
ARM_VMINuv2i32 /* 2856 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.u16 $Vd, $Vn, $Vm */
ARM_VMINuv4i16 /* 2857 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.u32 $Vd, $Vn, $Vm */
ARM_VMINuv4i32 /* 2858 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.u16 $Vd, $Vn, $Vm */
ARM_VMINuv8i16 /* 2859 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmin${p}.u8 $Vd, $Vn, $Vm */
ARM_VMINuv8i8 /* 2860 */, ARM_INS_VMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f64 $Dd, $Dn, $Dm */
ARM_VMLAD /* 2861 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f16 $Sd, $Sn, $Sm */
ARM_VMLAH /* 2862 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VMLALslsv2i32 /* 2863 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VMLALslsv4i16 /* 2864 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.u32 $Vd, $Vn, $Vm$lane */
ARM_VMLALsluv2i32 /* 2865 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.u16 $Vd, $Vn, $Vm$lane */
ARM_VMLALsluv4i16 /* 2866 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.s32 $Vd, $Vn, $Vm */
ARM_VMLALsv2i64 /* 2867 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.s16 $Vd, $Vn, $Vm */
ARM_VMLALsv4i32 /* 2868 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.s8 $Vd, $Vn, $Vm */
ARM_VMLALsv8i16 /* 2869 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.u32 $Vd, $Vn, $Vm */
ARM_VMLALuv2i64 /* 2870 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.u16 $Vd, $Vn, $Vm */
ARM_VMLALuv4i32 /* 2871 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlal${p}.u8 $Vd, $Vn, $Vm */
ARM_VMLALuv8i16 /* 2872 */, ARM_INS_VMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f32 $Sd, $Sn, $Sm */
ARM_VMLAS /* 2873 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f32 $Vd, $Vn, $Vm */
ARM_VMLAfd /* 2874 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f32 $Vd, $Vn, $Vm */
ARM_VMLAfq /* 2875 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f16 $Vd, $Vn, $Vm */
ARM_VMLAhd /* 2876 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f16 $Vd, $Vn, $Vm */
ARM_VMLAhq /* 2877 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f32 $Vd, $Vn, $Vm$lane */
ARM_VMLAslfd /* 2878 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f32 $Vd, $Vn, $Vm$lane */
ARM_VMLAslfq /* 2879 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f16 $Vd, $Vn, $Vm$lane */
ARM_VMLAslhd /* 2880 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmla${p}.f16 $Vd, $Vn, $Vm$lane */
ARM_VMLAslhq /* 2881 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i32 $Vd, $Vn, $Vm$lane */
ARM_VMLAslv2i32 /* 2882 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i16 $Vd, $Vn, $Vm$lane */
ARM_VMLAslv4i16 /* 2883 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i32 $Vd, $Vn, $Vm$lane */
ARM_VMLAslv4i32 /* 2884 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i16 $Vd, $Vn, $Vm$lane */
ARM_VMLAslv8i16 /* 2885 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i8 $Vd, $Vn, $Vm */
ARM_VMLAv16i8 /* 2886 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i32 $Vd, $Vn, $Vm */
ARM_VMLAv2i32 /* 2887 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i16 $Vd, $Vn, $Vm */
ARM_VMLAv4i16 /* 2888 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i32 $Vd, $Vn, $Vm */
ARM_VMLAv4i32 /* 2889 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i16 $Vd, $Vn, $Vm */
ARM_VMLAv8i16 /* 2890 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmla${p}.i8 $Vd, $Vn, $Vm */
ARM_VMLAv8i8 /* 2891 */, ARM_INS_VMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f64 $Dd, $Dn, $Dm */
ARM_VMLSD /* 2892 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f16 $Sd, $Sn, $Sm */
ARM_VMLSH /* 2893 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VMLSLslsv2i32 /* 2894 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VMLSLslsv4i16 /* 2895 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.u32 $Vd, $Vn, $Vm$lane */
ARM_VMLSLsluv2i32 /* 2896 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.u16 $Vd, $Vn, $Vm$lane */
ARM_VMLSLsluv4i16 /* 2897 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.s32 $Vd, $Vn, $Vm */
ARM_VMLSLsv2i64 /* 2898 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.s16 $Vd, $Vn, $Vm */
ARM_VMLSLsv4i32 /* 2899 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.s8 $Vd, $Vn, $Vm */
ARM_VMLSLsv8i16 /* 2900 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.u32 $Vd, $Vn, $Vm */
ARM_VMLSLuv2i64 /* 2901 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.u16 $Vd, $Vn, $Vm */
ARM_VMLSLuv4i32 /* 2902 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmlsl${p}.u8 $Vd, $Vn, $Vm */
ARM_VMLSLuv8i16 /* 2903 */, ARM_INS_VMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f32 $Sd, $Sn, $Sm */
ARM_VMLSS /* 2904 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f32 $Vd, $Vn, $Vm */
ARM_VMLSfd /* 2905 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f32 $Vd, $Vn, $Vm */
ARM_VMLSfq /* 2906 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f16 $Vd, $Vn, $Vm */
ARM_VMLShd /* 2907 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f16 $Vd, $Vn, $Vm */
ARM_VMLShq /* 2908 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f32 $Vd, $Vn, $Vm$lane */
ARM_VMLSslfd /* 2909 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f32 $Vd, $Vn, $Vm$lane */
ARM_VMLSslfq /* 2910 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f16 $Vd, $Vn, $Vm$lane */
ARM_VMLSslhd /* 2911 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmls${p}.f16 $Vd, $Vn, $Vm$lane */
ARM_VMLSslhq /* 2912 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i32 $Vd, $Vn, $Vm$lane */
ARM_VMLSslv2i32 /* 2913 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i16 $Vd, $Vn, $Vm$lane */
ARM_VMLSslv4i16 /* 2914 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i32 $Vd, $Vn, $Vm$lane */
ARM_VMLSslv4i32 /* 2915 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i16 $Vd, $Vn, $Vm$lane */
ARM_VMLSslv8i16 /* 2916 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i8 $Vd, $Vn, $Vm */
ARM_VMLSv16i8 /* 2917 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i32 $Vd, $Vn, $Vm */
ARM_VMLSv2i32 /* 2918 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i16 $Vd, $Vn, $Vm */
ARM_VMLSv4i16 /* 2919 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i32 $Vd, $Vn, $Vm */
ARM_VMLSv4i32 /* 2920 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i16 $Vd, $Vn, $Vm */
ARM_VMLSv8i16 /* 2921 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmls${p}.i8 $Vd, $Vn, $Vm */
ARM_VMLSv8i8 /* 2922 */, ARM_INS_VMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmmla.bf16 $Vd, $Vn, $Vm */
ARM_VMMLA /* 2923 */, ARM_INS_VMMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasBF16, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.f64 $Dd, $Dm */
ARM_VMOVD /* 2924 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs64, 0 }, 0, 0
#endif
},
{
/* vmov${p} $Dm, $Rt, $Rt2 */
ARM_VMOVDRR /* 2925 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmovx.f16 $Sd, $Sm */
ARM_VMOVH /* 2926 */, ARM_INS_VMOVX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmov${p}.f16 $Sn, $Rt */
ARM_VMOVHR /* 2927 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs16, 0 }, 0, 0
#endif
},
{
/* vmovl${p}.s32 $Vd, $Vm */
ARM_VMOVLsv2i64 /* 2928 */, ARM_INS_VMOVL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmovl${p}.s16 $Vd, $Vm */
ARM_VMOVLsv4i32 /* 2929 */, ARM_INS_VMOVL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmovl${p}.s8 $Vd, $Vm */
ARM_VMOVLsv8i16 /* 2930 */, ARM_INS_VMOVL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmovl${p}.u32 $Vd, $Vm */
ARM_VMOVLuv2i64 /* 2931 */, ARM_INS_VMOVL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmovl${p}.u16 $Vd, $Vm */
ARM_VMOVLuv4i32 /* 2932 */, ARM_INS_VMOVL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmovl${p}.u8 $Vd, $Vm */
ARM_VMOVLuv8i16 /* 2933 */, ARM_INS_VMOVL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmovn${p}.i64 $Vd, $Vm */
ARM_VMOVNv2i32 /* 2934 */, ARM_INS_VMOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmovn${p}.i32 $Vd, $Vm */
ARM_VMOVNv4i16 /* 2935 */, ARM_INS_VMOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmovn${p}.i16 $Vd, $Vm */
ARM_VMOVNv8i8 /* 2936 */, ARM_INS_VMOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.f16 $Rt, $Sn */
ARM_VMOVRH /* 2937 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs16, 0 }, 0, 0
#endif
},
{
/* vmov${p} $Rt, $Rt2, $Dm */
ARM_VMOVRRD /* 2938 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmov${p} $Rt, $Rt2, $src1, $src2 */
ARM_VMOVRRS /* 2939 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmov${p} $Rt, $Sn */
ARM_VMOVRS /* 2940 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmov${p}.f32 $Sd, $Sm */
ARM_VMOVS /* 2941 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmov${p} $Sn, $Rt */
ARM_VMOVSR /* 2942 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmov${p} $dst1, $dst2, $src1, $src2 */
ARM_VMOVSRR /* 2943 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmov${p}.i8 $Vd, $SIMM */
ARM_VMOVv16i8 /* 2944 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.i64 $Vd, $SIMM */
ARM_VMOVv1i64 /* 2945 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.f32 $Vd, $SIMM */
ARM_VMOVv2f32 /* 2946 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.i32 $Vd, $SIMM */
ARM_VMOVv2i32 /* 2947 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.i64 $Vd, $SIMM */
ARM_VMOVv2i64 /* 2948 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.f32 $Vd, $SIMM */
ARM_VMOVv4f32 /* 2949 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.i16 $Vd, $SIMM */
ARM_VMOVv4i16 /* 2950 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.i32 $Vd, $SIMM */
ARM_VMOVv4i32 /* 2951 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.i16 $Vd, $SIMM */
ARM_VMOVv8i16 /* 2952 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.i8 $Vd, $SIMM */
ARM_VMOVv8i8 /* 2953 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, fpscr */
ARM_VMRS /* 2954 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, fpcxtns */
ARM_VMRS_FPCXTNS /* 2955 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, fpcxts */
ARM_VMRS_FPCXTS /* 2956 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, fpexc */
ARM_VMRS_FPEXC /* 2957 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, fpinst */
ARM_VMRS_FPINST /* 2958 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, fpinst2 */
ARM_VMRS_FPINST2 /* 2959 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, fpscr_nzcvqc */
ARM_VMRS_FPSCR_NZCVQC /* 2960 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, fpsid */
ARM_VMRS_FPSID /* 2961 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, mvfr0 */
ARM_VMRS_MVFR0 /* 2962 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, mvfr1 */
ARM_VMRS_MVFR1 /* 2963 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, mvfr2 */
ARM_VMRS_MVFR2 /* 2964 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, p0 */
ARM_VMRS_P0 /* 2965 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmrs${p} $Rt, vpr */
ARM_VMRS_VPR /* 2966 */, ARM_INS_VMRS,
#ifndef CAPSTONE_DIET
{ ARM_REG_VPR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmsr${p} fpscr, $Rt */
ARM_VMSR /* 2967 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmsr${p} fpcxtns, $Rt */
ARM_VMSR_FPCXTNS /* 2968 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vmsr${p} fpcxts, $Rt */
ARM_VMSR_FPCXTS /* 2969 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vmsr${p} fpexc, $Rt */
ARM_VMSR_FPEXC /* 2970 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmsr${p} fpinst, $Rt */
ARM_VMSR_FPINST /* 2971 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmsr${p} fpinst2, $Rt */
ARM_VMSR_FPINST2 /* 2972 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmsr${p} fpscr_nzcvqc, $Rt */
ARM_VMSR_FPSCR_NZCVQC /* 2973 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vmsr${p} fpsid, $Rt */
ARM_VMSR_FPSID /* 2974 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmsr${p} p0, $Rt */
ARM_VMSR_P0 /* 2975 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmsr${p} vpr, $Rt */
ARM_VMSR_VPR /* 2976 */, ARM_INS_VMSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_VPR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f64 $Dd, $Dn, $Dm */
ARM_VMULD /* 2977 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f16 $Sd, $Sn, $Sm */
ARM_VMULH /* 2978 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmull.p64 $Vd, $Vn, $Vm */
ARM_VMULLp64 /* 2979 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasAES, 0 }, 0, 0
#endif
},
{
/* vmull${p}.p8 $Vd, $Vn, $Vm */
ARM_VMULLp8 /* 2980 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VMULLslsv2i32 /* 2981 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VMULLslsv4i16 /* 2982 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.u32 $Vd, $Vn, $Vm$lane */
ARM_VMULLsluv2i32 /* 2983 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.u16 $Vd, $Vn, $Vm$lane */
ARM_VMULLsluv4i16 /* 2984 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.s32 $Vd, $Vn, $Vm */
ARM_VMULLsv2i64 /* 2985 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.s16 $Vd, $Vn, $Vm */
ARM_VMULLsv4i32 /* 2986 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.s8 $Vd, $Vn, $Vm */
ARM_VMULLsv8i16 /* 2987 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.u32 $Vd, $Vn, $Vm */
ARM_VMULLuv2i64 /* 2988 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.u16 $Vd, $Vn, $Vm */
ARM_VMULLuv4i32 /* 2989 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmull${p}.u8 $Vd, $Vn, $Vm */
ARM_VMULLuv8i16 /* 2990 */, ARM_INS_VMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f32 $Sd, $Sn, $Sm */
ARM_VMULS /* 2991 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f32 $Vd, $Vn, $Vm */
ARM_VMULfd /* 2992 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f32 $Vd, $Vn, $Vm */
ARM_VMULfq /* 2993 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f16 $Vd, $Vn, $Vm */
ARM_VMULhd /* 2994 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f16 $Vd, $Vn, $Vm */
ARM_VMULhq /* 2995 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmul${p}.p8 $Vd, $Vn, $Vm */
ARM_VMULpd /* 2996 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.p8 $Vd, $Vn, $Vm */
ARM_VMULpq /* 2997 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f32 $Vd, $Vn, $Vm$lane */
ARM_VMULslfd /* 2998 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f32 $Vd, $Vn, $Vm$lane */
ARM_VMULslfq /* 2999 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f16 $Vd, $Vn, $Vm$lane */
ARM_VMULslhd /* 3000 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmul${p}.f16 $Vd, $Vn, $Vm$lane */
ARM_VMULslhq /* 3001 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i32 $Vd, $Vn, $Vm$lane */
ARM_VMULslv2i32 /* 3002 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i16 $Vd, $Vn, $Vm$lane */
ARM_VMULslv4i16 /* 3003 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i32 $Vd, $Vn, $Vm$lane */
ARM_VMULslv4i32 /* 3004 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i16 $Vd, $Vn, $Vm$lane */
ARM_VMULslv8i16 /* 3005 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i8 $Vd, $Vn, $Vm */
ARM_VMULv16i8 /* 3006 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i32 $Vd, $Vn, $Vm */
ARM_VMULv2i32 /* 3007 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i16 $Vd, $Vn, $Vm */
ARM_VMULv4i16 /* 3008 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i32 $Vd, $Vn, $Vm */
ARM_VMULv4i32 /* 3009 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i16 $Vd, $Vn, $Vm */
ARM_VMULv8i16 /* 3010 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmul${p}.i8 $Vd, $Vn, $Vm */
ARM_VMULv8i8 /* 3011 */, ARM_INS_VMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmvn${p} $Vd, $Vm */
ARM_VMVNd /* 3012 */, ARM_INS_VMVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmvn${p} $Vd, $Vm */
ARM_VMVNq /* 3013 */, ARM_INS_VMVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmvn${p}.i32 $Vd, $SIMM */
ARM_VMVNv2i32 /* 3014 */, ARM_INS_VMVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmvn${p}.i16 $Vd, $SIMM */
ARM_VMVNv4i16 /* 3015 */, ARM_INS_VMVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmvn${p}.i32 $Vd, $SIMM */
ARM_VMVNv4i32 /* 3016 */, ARM_INS_VMVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmvn${p}.i16 $Vd, $SIMM */
ARM_VMVNv8i16 /* 3017 */, ARM_INS_VMVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vneg${p}.f64 $Dd, $Dm */
ARM_VNEGD /* 3018 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vneg${p}.f16 $Sd, $Sm */
ARM_VNEGH /* 3019 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vneg${p}.f32 $Sd, $Sm */
ARM_VNEGS /* 3020 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vneg${p}.f32 $Vd, $Vm */
ARM_VNEGf32q /* 3021 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vneg${p}.f32 $Vd, $Vm */
ARM_VNEGfd /* 3022 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vneg${p}.f16 $Vd, $Vm */
ARM_VNEGhd /* 3023 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vneg${p}.f16 $Vd, $Vm */
ARM_VNEGhq /* 3024 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vneg${p}.s16 $Vd, $Vm */
ARM_VNEGs16d /* 3025 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vneg${p}.s16 $Vd, $Vm */
ARM_VNEGs16q /* 3026 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vneg${p}.s32 $Vd, $Vm */
ARM_VNEGs32d /* 3027 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vneg${p}.s32 $Vd, $Vm */
ARM_VNEGs32q /* 3028 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vneg${p}.s8 $Vd, $Vm */
ARM_VNEGs8d /* 3029 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vneg${p}.s8 $Vd, $Vm */
ARM_VNEGs8q /* 3030 */, ARM_INS_VNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vnmla${p}.f64 $Dd, $Dn, $Dm */
ARM_VNMLAD /* 3031 */, ARM_INS_VNMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vnmla${p}.f16 $Sd, $Sn, $Sm */
ARM_VNMLAH /* 3032 */, ARM_INS_VNMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vnmla${p}.f32 $Sd, $Sn, $Sm */
ARM_VNMLAS /* 3033 */, ARM_INS_VNMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vnmls${p}.f64 $Dd, $Dn, $Dm */
ARM_VNMLSD /* 3034 */, ARM_INS_VNMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vnmls${p}.f16 $Sd, $Sn, $Sm */
ARM_VNMLSH /* 3035 */, ARM_INS_VNMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vnmls${p}.f32 $Sd, $Sn, $Sm */
ARM_VNMLSS /* 3036 */, ARM_INS_VNMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vnmul${p}.f64 $Dd, $Dn, $Dm */
ARM_VNMULD /* 3037 */, ARM_INS_VNMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vnmul${p}.f16 $Sd, $Sn, $Sm */
ARM_VNMULH /* 3038 */, ARM_INS_VNMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vnmul${p}.f32 $Sd, $Sn, $Sm */
ARM_VNMULS /* 3039 */, ARM_INS_VNMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vorn${p} $Vd, $Vn, $Vm */
ARM_VORNd /* 3040 */, ARM_INS_VORN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vorn${p} $Vd, $Vn, $Vm */
ARM_VORNq /* 3041 */, ARM_INS_VORN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vorr${p} $Vd, $Vn, $Vm */
ARM_VORRd /* 3042 */, ARM_INS_VORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vorr${p}.i32 $Vd, $SIMM */
ARM_VORRiv2i32 /* 3043 */, ARM_INS_VORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vorr${p}.i16 $Vd, $SIMM */
ARM_VORRiv4i16 /* 3044 */, ARM_INS_VORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vorr${p}.i32 $Vd, $SIMM */
ARM_VORRiv4i32 /* 3045 */, ARM_INS_VORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vorr${p}.i16 $Vd, $SIMM */
ARM_VORRiv8i16 /* 3046 */, ARM_INS_VORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vorr${p} $Vd, $Vn, $Vm */
ARM_VORRq /* 3047 */, ARM_INS_VORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.s8 $Vd, $Vm */
ARM_VPADALsv16i8 /* 3048 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.s32 $Vd, $Vm */
ARM_VPADALsv2i32 /* 3049 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.s16 $Vd, $Vm */
ARM_VPADALsv4i16 /* 3050 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.s32 $Vd, $Vm */
ARM_VPADALsv4i32 /* 3051 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.s16 $Vd, $Vm */
ARM_VPADALsv8i16 /* 3052 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.s8 $Vd, $Vm */
ARM_VPADALsv8i8 /* 3053 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.u8 $Vd, $Vm */
ARM_VPADALuv16i8 /* 3054 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.u32 $Vd, $Vm */
ARM_VPADALuv2i32 /* 3055 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.u16 $Vd, $Vm */
ARM_VPADALuv4i16 /* 3056 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.u32 $Vd, $Vm */
ARM_VPADALuv4i32 /* 3057 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.u16 $Vd, $Vm */
ARM_VPADALuv8i16 /* 3058 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadal${p}.u8 $Vd, $Vm */
ARM_VPADALuv8i8 /* 3059 */, ARM_INS_VPADAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.s8 $Vd, $Vm */
ARM_VPADDLsv16i8 /* 3060 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.s32 $Vd, $Vm */
ARM_VPADDLsv2i32 /* 3061 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.s16 $Vd, $Vm */
ARM_VPADDLsv4i16 /* 3062 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.s32 $Vd, $Vm */
ARM_VPADDLsv4i32 /* 3063 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.s16 $Vd, $Vm */
ARM_VPADDLsv8i16 /* 3064 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.s8 $Vd, $Vm */
ARM_VPADDLsv8i8 /* 3065 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.u8 $Vd, $Vm */
ARM_VPADDLuv16i8 /* 3066 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.u32 $Vd, $Vm */
ARM_VPADDLuv2i32 /* 3067 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.u16 $Vd, $Vm */
ARM_VPADDLuv4i16 /* 3068 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.u32 $Vd, $Vm */
ARM_VPADDLuv4i32 /* 3069 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.u16 $Vd, $Vm */
ARM_VPADDLuv8i16 /* 3070 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpaddl${p}.u8 $Vd, $Vm */
ARM_VPADDLuv8i8 /* 3071 */, ARM_INS_VPADDL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadd${p}.f32 $Vd, $Vn, $Vm */
ARM_VPADDf /* 3072 */, ARM_INS_VPADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadd${p}.f16 $Vd, $Vn, $Vm */
ARM_VPADDh /* 3073 */, ARM_INS_VPADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vpadd${p}.i16 $Vd, $Vn, $Vm */
ARM_VPADDi16 /* 3074 */, ARM_INS_VPADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadd${p}.i32 $Vd, $Vn, $Vm */
ARM_VPADDi32 /* 3075 */, ARM_INS_VPADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpadd${p}.i8 $Vd, $Vn, $Vm */
ARM_VPADDi8 /* 3076 */, ARM_INS_VPADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmax${p}.f32 $Vd, $Vn, $Vm */
ARM_VPMAXf /* 3077 */, ARM_INS_VPMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmax${p}.f16 $Vd, $Vn, $Vm */
ARM_VPMAXh /* 3078 */, ARM_INS_VPMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vpmax${p}.s16 $Vd, $Vn, $Vm */
ARM_VPMAXs16 /* 3079 */, ARM_INS_VPMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmax${p}.s32 $Vd, $Vn, $Vm */
ARM_VPMAXs32 /* 3080 */, ARM_INS_VPMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmax${p}.s8 $Vd, $Vn, $Vm */
ARM_VPMAXs8 /* 3081 */, ARM_INS_VPMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmax${p}.u16 $Vd, $Vn, $Vm */
ARM_VPMAXu16 /* 3082 */, ARM_INS_VPMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmax${p}.u32 $Vd, $Vn, $Vm */
ARM_VPMAXu32 /* 3083 */, ARM_INS_VPMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmax${p}.u8 $Vd, $Vn, $Vm */
ARM_VPMAXu8 /* 3084 */, ARM_INS_VPMAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmin${p}.f32 $Vd, $Vn, $Vm */
ARM_VPMINf /* 3085 */, ARM_INS_VPMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmin${p}.f16 $Vd, $Vn, $Vm */
ARM_VPMINh /* 3086 */, ARM_INS_VPMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vpmin${p}.s16 $Vd, $Vn, $Vm */
ARM_VPMINs16 /* 3087 */, ARM_INS_VPMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmin${p}.s32 $Vd, $Vn, $Vm */
ARM_VPMINs32 /* 3088 */, ARM_INS_VPMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmin${p}.s8 $Vd, $Vn, $Vm */
ARM_VPMINs8 /* 3089 */, ARM_INS_VPMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmin${p}.u16 $Vd, $Vn, $Vm */
ARM_VPMINu16 /* 3090 */, ARM_INS_VPMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmin${p}.u32 $Vd, $Vn, $Vm */
ARM_VPMINu32 /* 3091 */, ARM_INS_VPMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vpmin${p}.u8 $Vd, $Vn, $Vm */
ARM_VPMINu8 /* 3092 */, ARM_INS_VPMIN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqabs${p}.s8 $Vd, $Vm */
ARM_VQABSv16i8 /* 3093 */, ARM_INS_VQABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqabs${p}.s32 $Vd, $Vm */
ARM_VQABSv2i32 /* 3094 */, ARM_INS_VQABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqabs${p}.s16 $Vd, $Vm */
ARM_VQABSv4i16 /* 3095 */, ARM_INS_VQABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqabs${p}.s32 $Vd, $Vm */
ARM_VQABSv4i32 /* 3096 */, ARM_INS_VQABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqabs${p}.s16 $Vd, $Vm */
ARM_VQABSv8i16 /* 3097 */, ARM_INS_VQABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqabs${p}.s8 $Vd, $Vm */
ARM_VQABSv8i8 /* 3098 */, ARM_INS_VQABS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.s8 $Vd, $Vn, $Vm */
ARM_VQADDsv16i8 /* 3099 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.s64 $Vd, $Vn, $Vm */
ARM_VQADDsv1i64 /* 3100 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.s32 $Vd, $Vn, $Vm */
ARM_VQADDsv2i32 /* 3101 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.s64 $Vd, $Vn, $Vm */
ARM_VQADDsv2i64 /* 3102 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.s16 $Vd, $Vn, $Vm */
ARM_VQADDsv4i16 /* 3103 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.s32 $Vd, $Vn, $Vm */
ARM_VQADDsv4i32 /* 3104 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.s16 $Vd, $Vn, $Vm */
ARM_VQADDsv8i16 /* 3105 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.s8 $Vd, $Vn, $Vm */
ARM_VQADDsv8i8 /* 3106 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.u8 $Vd, $Vn, $Vm */
ARM_VQADDuv16i8 /* 3107 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.u64 $Vd, $Vn, $Vm */
ARM_VQADDuv1i64 /* 3108 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.u32 $Vd, $Vn, $Vm */
ARM_VQADDuv2i32 /* 3109 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.u64 $Vd, $Vn, $Vm */
ARM_VQADDuv2i64 /* 3110 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.u16 $Vd, $Vn, $Vm */
ARM_VQADDuv4i16 /* 3111 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.u32 $Vd, $Vn, $Vm */
ARM_VQADDuv4i32 /* 3112 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.u16 $Vd, $Vn, $Vm */
ARM_VQADDuv8i16 /* 3113 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqadd${p}.u8 $Vd, $Vn, $Vm */
ARM_VQADDuv8i8 /* 3114 */, ARM_INS_VQADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmlal${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQDMLALslv2i32 /* 3115 */, ARM_INS_VQDMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmlal${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQDMLALslv4i16 /* 3116 */, ARM_INS_VQDMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmlal${p}.s32 $Vd, $Vn, $Vm */
ARM_VQDMLALv2i64 /* 3117 */, ARM_INS_VQDMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmlal${p}.s16 $Vd, $Vn, $Vm */
ARM_VQDMLALv4i32 /* 3118 */, ARM_INS_VQDMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmlsl${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQDMLSLslv2i32 /* 3119 */, ARM_INS_VQDMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmlsl${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQDMLSLslv4i16 /* 3120 */, ARM_INS_VQDMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmlsl${p}.s32 $Vd, $Vn, $Vm */
ARM_VQDMLSLv2i64 /* 3121 */, ARM_INS_VQDMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmlsl${p}.s16 $Vd, $Vn, $Vm */
ARM_VQDMLSLv4i32 /* 3122 */, ARM_INS_VQDMLSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmulh${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQDMULHslv2i32 /* 3123 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmulh${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQDMULHslv4i16 /* 3124 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmulh${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQDMULHslv4i32 /* 3125 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmulh${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQDMULHslv8i16 /* 3126 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmulh${p}.s32 $Vd, $Vn, $Vm */
ARM_VQDMULHv2i32 /* 3127 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmulh${p}.s16 $Vd, $Vn, $Vm */
ARM_VQDMULHv4i16 /* 3128 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmulh${p}.s32 $Vd, $Vn, $Vm */
ARM_VQDMULHv4i32 /* 3129 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmulh${p}.s16 $Vd, $Vn, $Vm */
ARM_VQDMULHv8i16 /* 3130 */, ARM_INS_VQDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmull${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQDMULLslv2i32 /* 3131 */, ARM_INS_VQDMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmull${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQDMULLslv4i16 /* 3132 */, ARM_INS_VQDMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmull${p}.s32 $Vd, $Vn, $Vm */
ARM_VQDMULLv2i64 /* 3133 */, ARM_INS_VQDMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqdmull${p}.s16 $Vd, $Vn, $Vm */
ARM_VQDMULLv4i32 /* 3134 */, ARM_INS_VQDMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqmovun${p}.s64 $Vd, $Vm */
ARM_VQMOVNsuv2i32 /* 3135 */, ARM_INS_VQMOVUN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqmovun${p}.s32 $Vd, $Vm */
ARM_VQMOVNsuv4i16 /* 3136 */, ARM_INS_VQMOVUN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqmovun${p}.s16 $Vd, $Vm */
ARM_VQMOVNsuv8i8 /* 3137 */, ARM_INS_VQMOVUN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqmovn${p}.s64 $Vd, $Vm */
ARM_VQMOVNsv2i32 /* 3138 */, ARM_INS_VQMOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqmovn${p}.s32 $Vd, $Vm */
ARM_VQMOVNsv4i16 /* 3139 */, ARM_INS_VQMOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqmovn${p}.s16 $Vd, $Vm */
ARM_VQMOVNsv8i8 /* 3140 */, ARM_INS_VQMOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqmovn${p}.u64 $Vd, $Vm */
ARM_VQMOVNuv2i32 /* 3141 */, ARM_INS_VQMOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqmovn${p}.u32 $Vd, $Vm */
ARM_VQMOVNuv4i16 /* 3142 */, ARM_INS_VQMOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqmovn${p}.u16 $Vd, $Vm */
ARM_VQMOVNuv8i8 /* 3143 */, ARM_INS_VQMOVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqneg${p}.s8 $Vd, $Vm */
ARM_VQNEGv16i8 /* 3144 */, ARM_INS_VQNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqneg${p}.s32 $Vd, $Vm */
ARM_VQNEGv2i32 /* 3145 */, ARM_INS_VQNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqneg${p}.s16 $Vd, $Vm */
ARM_VQNEGv4i16 /* 3146 */, ARM_INS_VQNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqneg${p}.s32 $Vd, $Vm */
ARM_VQNEGv4i32 /* 3147 */, ARM_INS_VQNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqneg${p}.s16 $Vd, $Vm */
ARM_VQNEGv8i16 /* 3148 */, ARM_INS_VQNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqneg${p}.s8 $Vd, $Vm */
ARM_VQNEGv8i8 /* 3149 */, ARM_INS_VQNEG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQRDMLAHslv2i32 /* 3150 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQRDMLAHslv4i16 /* 3151 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQRDMLAHslv4i32 /* 3152 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQRDMLAHslv8i16 /* 3153 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${p}.s32 $Vd, $Vn, $Vm */
ARM_VQRDMLAHv2i32 /* 3154 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${p}.s16 $Vd, $Vn, $Vm */
ARM_VQRDMLAHv4i16 /* 3155 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${p}.s32 $Vd, $Vn, $Vm */
ARM_VQRDMLAHv4i32 /* 3156 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlah${p}.s16 $Vd, $Vn, $Vm */
ARM_VQRDMLAHv8i16 /* 3157 */, ARM_INS_VQRDMLAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlsh${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQRDMLSHslv2i32 /* 3158 */, ARM_INS_VQRDMLSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlsh${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQRDMLSHslv4i16 /* 3159 */, ARM_INS_VQRDMLSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlsh${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQRDMLSHslv4i32 /* 3160 */, ARM_INS_VQRDMLSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlsh${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQRDMLSHslv8i16 /* 3161 */, ARM_INS_VQRDMLSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlsh${p}.s32 $Vd, $Vn, $Vm */
ARM_VQRDMLSHv2i32 /* 3162 */, ARM_INS_VQRDMLSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlsh${p}.s16 $Vd, $Vn, $Vm */
ARM_VQRDMLSHv4i16 /* 3163 */, ARM_INS_VQRDMLSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlsh${p}.s32 $Vd, $Vn, $Vm */
ARM_VQRDMLSHv4i32 /* 3164 */, ARM_INS_VQRDMLSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmlsh${p}.s16 $Vd, $Vn, $Vm */
ARM_VQRDMLSHv8i16 /* 3165 */, ARM_INS_VQRDMLSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQRDMULHslv2i32 /* 3166 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQRDMULHslv4i16 /* 3167 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${p}.s32 $Vd, $Vn, $Vm$lane */
ARM_VQRDMULHslv4i32 /* 3168 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${p}.s16 $Vd, $Vn, $Vm$lane */
ARM_VQRDMULHslv8i16 /* 3169 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${p}.s32 $Vd, $Vn, $Vm */
ARM_VQRDMULHv2i32 /* 3170 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${p}.s16 $Vd, $Vn, $Vm */
ARM_VQRDMULHv4i16 /* 3171 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${p}.s32 $Vd, $Vn, $Vm */
ARM_VQRDMULHv4i32 /* 3172 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrdmulh${p}.s16 $Vd, $Vn, $Vm */
ARM_VQRDMULHv8i16 /* 3173 */, ARM_INS_VQRDMULH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.s8 $Vd, $Vm, $Vn */
ARM_VQRSHLsv16i8 /* 3174 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.s64 $Vd, $Vm, $Vn */
ARM_VQRSHLsv1i64 /* 3175 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.s32 $Vd, $Vm, $Vn */
ARM_VQRSHLsv2i32 /* 3176 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.s64 $Vd, $Vm, $Vn */
ARM_VQRSHLsv2i64 /* 3177 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.s16 $Vd, $Vm, $Vn */
ARM_VQRSHLsv4i16 /* 3178 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.s32 $Vd, $Vm, $Vn */
ARM_VQRSHLsv4i32 /* 3179 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.s16 $Vd, $Vm, $Vn */
ARM_VQRSHLsv8i16 /* 3180 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.s8 $Vd, $Vm, $Vn */
ARM_VQRSHLsv8i8 /* 3181 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.u8 $Vd, $Vm, $Vn */
ARM_VQRSHLuv16i8 /* 3182 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.u64 $Vd, $Vm, $Vn */
ARM_VQRSHLuv1i64 /* 3183 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.u32 $Vd, $Vm, $Vn */
ARM_VQRSHLuv2i32 /* 3184 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.u64 $Vd, $Vm, $Vn */
ARM_VQRSHLuv2i64 /* 3185 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.u16 $Vd, $Vm, $Vn */
ARM_VQRSHLuv4i16 /* 3186 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.u32 $Vd, $Vm, $Vn */
ARM_VQRSHLuv4i32 /* 3187 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.u16 $Vd, $Vm, $Vn */
ARM_VQRSHLuv8i16 /* 3188 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshl${p}.u8 $Vd, $Vm, $Vn */
ARM_VQRSHLuv8i8 /* 3189 */, ARM_INS_VQRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshrn${p}.s64 $Vd, $Vm, $SIMM */
ARM_VQRSHRNsv2i32 /* 3190 */, ARM_INS_VQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshrn${p}.s32 $Vd, $Vm, $SIMM */
ARM_VQRSHRNsv4i16 /* 3191 */, ARM_INS_VQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshrn${p}.s16 $Vd, $Vm, $SIMM */
ARM_VQRSHRNsv8i8 /* 3192 */, ARM_INS_VQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshrn${p}.u64 $Vd, $Vm, $SIMM */
ARM_VQRSHRNuv2i32 /* 3193 */, ARM_INS_VQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshrn${p}.u32 $Vd, $Vm, $SIMM */
ARM_VQRSHRNuv4i16 /* 3194 */, ARM_INS_VQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshrn${p}.u16 $Vd, $Vm, $SIMM */
ARM_VQRSHRNuv8i8 /* 3195 */, ARM_INS_VQRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshrun${p}.s64 $Vd, $Vm, $SIMM */
ARM_VQRSHRUNv2i32 /* 3196 */, ARM_INS_VQRSHRUN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshrun${p}.s32 $Vd, $Vm, $SIMM */
ARM_VQRSHRUNv4i16 /* 3197 */, ARM_INS_VQRSHRUN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqrshrun${p}.s16 $Vd, $Vm, $SIMM */
ARM_VQRSHRUNv8i8 /* 3198 */, ARM_INS_VQRSHRUN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s8 $Vd, $Vm, $SIMM */
ARM_VQSHLsiv16i8 /* 3199 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s64 $Vd, $Vm, $SIMM */
ARM_VQSHLsiv1i64 /* 3200 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s32 $Vd, $Vm, $SIMM */
ARM_VQSHLsiv2i32 /* 3201 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s64 $Vd, $Vm, $SIMM */
ARM_VQSHLsiv2i64 /* 3202 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s16 $Vd, $Vm, $SIMM */
ARM_VQSHLsiv4i16 /* 3203 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s32 $Vd, $Vm, $SIMM */
ARM_VQSHLsiv4i32 /* 3204 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s16 $Vd, $Vm, $SIMM */
ARM_VQSHLsiv8i16 /* 3205 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s8 $Vd, $Vm, $SIMM */
ARM_VQSHLsiv8i8 /* 3206 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshlu${p}.s8 $Vd, $Vm, $SIMM */
ARM_VQSHLsuv16i8 /* 3207 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshlu${p}.s64 $Vd, $Vm, $SIMM */
ARM_VQSHLsuv1i64 /* 3208 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshlu${p}.s32 $Vd, $Vm, $SIMM */
ARM_VQSHLsuv2i32 /* 3209 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshlu${p}.s64 $Vd, $Vm, $SIMM */
ARM_VQSHLsuv2i64 /* 3210 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshlu${p}.s16 $Vd, $Vm, $SIMM */
ARM_VQSHLsuv4i16 /* 3211 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshlu${p}.s32 $Vd, $Vm, $SIMM */
ARM_VQSHLsuv4i32 /* 3212 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshlu${p}.s16 $Vd, $Vm, $SIMM */
ARM_VQSHLsuv8i16 /* 3213 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshlu${p}.s8 $Vd, $Vm, $SIMM */
ARM_VQSHLsuv8i8 /* 3214 */, ARM_INS_VQSHLU,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s8 $Vd, $Vm, $Vn */
ARM_VQSHLsv16i8 /* 3215 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s64 $Vd, $Vm, $Vn */
ARM_VQSHLsv1i64 /* 3216 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s32 $Vd, $Vm, $Vn */
ARM_VQSHLsv2i32 /* 3217 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s64 $Vd, $Vm, $Vn */
ARM_VQSHLsv2i64 /* 3218 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s16 $Vd, $Vm, $Vn */
ARM_VQSHLsv4i16 /* 3219 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s32 $Vd, $Vm, $Vn */
ARM_VQSHLsv4i32 /* 3220 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s16 $Vd, $Vm, $Vn */
ARM_VQSHLsv8i16 /* 3221 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.s8 $Vd, $Vm, $Vn */
ARM_VQSHLsv8i8 /* 3222 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u8 $Vd, $Vm, $SIMM */
ARM_VQSHLuiv16i8 /* 3223 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u64 $Vd, $Vm, $SIMM */
ARM_VQSHLuiv1i64 /* 3224 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u32 $Vd, $Vm, $SIMM */
ARM_VQSHLuiv2i32 /* 3225 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u64 $Vd, $Vm, $SIMM */
ARM_VQSHLuiv2i64 /* 3226 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u16 $Vd, $Vm, $SIMM */
ARM_VQSHLuiv4i16 /* 3227 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u32 $Vd, $Vm, $SIMM */
ARM_VQSHLuiv4i32 /* 3228 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u16 $Vd, $Vm, $SIMM */
ARM_VQSHLuiv8i16 /* 3229 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u8 $Vd, $Vm, $SIMM */
ARM_VQSHLuiv8i8 /* 3230 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u8 $Vd, $Vm, $Vn */
ARM_VQSHLuv16i8 /* 3231 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u64 $Vd, $Vm, $Vn */
ARM_VQSHLuv1i64 /* 3232 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u32 $Vd, $Vm, $Vn */
ARM_VQSHLuv2i32 /* 3233 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u64 $Vd, $Vm, $Vn */
ARM_VQSHLuv2i64 /* 3234 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u16 $Vd, $Vm, $Vn */
ARM_VQSHLuv4i16 /* 3235 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u32 $Vd, $Vm, $Vn */
ARM_VQSHLuv4i32 /* 3236 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u16 $Vd, $Vm, $Vn */
ARM_VQSHLuv8i16 /* 3237 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshl${p}.u8 $Vd, $Vm, $Vn */
ARM_VQSHLuv8i8 /* 3238 */, ARM_INS_VQSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshrn${p}.s64 $Vd, $Vm, $SIMM */
ARM_VQSHRNsv2i32 /* 3239 */, ARM_INS_VQSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshrn${p}.s32 $Vd, $Vm, $SIMM */
ARM_VQSHRNsv4i16 /* 3240 */, ARM_INS_VQSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshrn${p}.s16 $Vd, $Vm, $SIMM */
ARM_VQSHRNsv8i8 /* 3241 */, ARM_INS_VQSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshrn${p}.u64 $Vd, $Vm, $SIMM */
ARM_VQSHRNuv2i32 /* 3242 */, ARM_INS_VQSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshrn${p}.u32 $Vd, $Vm, $SIMM */
ARM_VQSHRNuv4i16 /* 3243 */, ARM_INS_VQSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshrn${p}.u16 $Vd, $Vm, $SIMM */
ARM_VQSHRNuv8i8 /* 3244 */, ARM_INS_VQSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshrun${p}.s64 $Vd, $Vm, $SIMM */
ARM_VQSHRUNv2i32 /* 3245 */, ARM_INS_VQSHRUN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshrun${p}.s32 $Vd, $Vm, $SIMM */
ARM_VQSHRUNv4i16 /* 3246 */, ARM_INS_VQSHRUN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqshrun${p}.s16 $Vd, $Vm, $SIMM */
ARM_VQSHRUNv8i8 /* 3247 */, ARM_INS_VQSHRUN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.s8 $Vd, $Vn, $Vm */
ARM_VQSUBsv16i8 /* 3248 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.s64 $Vd, $Vn, $Vm */
ARM_VQSUBsv1i64 /* 3249 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.s32 $Vd, $Vn, $Vm */
ARM_VQSUBsv2i32 /* 3250 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.s64 $Vd, $Vn, $Vm */
ARM_VQSUBsv2i64 /* 3251 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.s16 $Vd, $Vn, $Vm */
ARM_VQSUBsv4i16 /* 3252 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.s32 $Vd, $Vn, $Vm */
ARM_VQSUBsv4i32 /* 3253 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.s16 $Vd, $Vn, $Vm */
ARM_VQSUBsv8i16 /* 3254 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.s8 $Vd, $Vn, $Vm */
ARM_VQSUBsv8i8 /* 3255 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.u8 $Vd, $Vn, $Vm */
ARM_VQSUBuv16i8 /* 3256 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.u64 $Vd, $Vn, $Vm */
ARM_VQSUBuv1i64 /* 3257 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.u32 $Vd, $Vn, $Vm */
ARM_VQSUBuv2i32 /* 3258 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.u64 $Vd, $Vn, $Vm */
ARM_VQSUBuv2i64 /* 3259 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.u16 $Vd, $Vn, $Vm */
ARM_VQSUBuv4i16 /* 3260 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.u32 $Vd, $Vn, $Vm */
ARM_VQSUBuv4i32 /* 3261 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.u16 $Vd, $Vn, $Vm */
ARM_VQSUBuv8i16 /* 3262 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vqsub${p}.u8 $Vd, $Vn, $Vm */
ARM_VQSUBuv8i8 /* 3263 */, ARM_INS_VQSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vraddhn${p}.i64 $Vd, $Vn, $Vm */
ARM_VRADDHNv2i32 /* 3264 */, ARM_INS_VRADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vraddhn${p}.i32 $Vd, $Vn, $Vm */
ARM_VRADDHNv4i16 /* 3265 */, ARM_INS_VRADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vraddhn${p}.i16 $Vd, $Vn, $Vm */
ARM_VRADDHNv8i8 /* 3266 */, ARM_INS_VRADDHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrecpe${p}.u32 $Vd, $Vm */
ARM_VRECPEd /* 3267 */, ARM_INS_VRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrecpe${p}.f32 $Vd, $Vm */
ARM_VRECPEfd /* 3268 */, ARM_INS_VRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrecpe${p}.f32 $Vd, $Vm */
ARM_VRECPEfq /* 3269 */, ARM_INS_VRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrecpe${p}.f16 $Vd, $Vm */
ARM_VRECPEhd /* 3270 */, ARM_INS_VRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrecpe${p}.f16 $Vd, $Vm */
ARM_VRECPEhq /* 3271 */, ARM_INS_VRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrecpe${p}.u32 $Vd, $Vm */
ARM_VRECPEq /* 3272 */, ARM_INS_VRECPE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrecps${p}.f32 $Vd, $Vn, $Vm */
ARM_VRECPSfd /* 3273 */, ARM_INS_VRECPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrecps${p}.f32 $Vd, $Vn, $Vm */
ARM_VRECPSfq /* 3274 */, ARM_INS_VRECPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrecps${p}.f16 $Vd, $Vn, $Vm */
ARM_VRECPShd /* 3275 */, ARM_INS_VRECPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrecps${p}.f16 $Vd, $Vn, $Vm */
ARM_VRECPShq /* 3276 */, ARM_INS_VRECPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrev16${p}.8 $Vd, $Vm */
ARM_VREV16d8 /* 3277 */, ARM_INS_VREV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev16${p}.8 $Vd, $Vm */
ARM_VREV16q8 /* 3278 */, ARM_INS_VREV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev32${p}.16 $Vd, $Vm */
ARM_VREV32d16 /* 3279 */, ARM_INS_VREV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev32${p}.8 $Vd, $Vm */
ARM_VREV32d8 /* 3280 */, ARM_INS_VREV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev32${p}.16 $Vd, $Vm */
ARM_VREV32q16 /* 3281 */, ARM_INS_VREV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev32${p}.8 $Vd, $Vm */
ARM_VREV32q8 /* 3282 */, ARM_INS_VREV32,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev64${p}.16 $Vd, $Vm */
ARM_VREV64d16 /* 3283 */, ARM_INS_VREV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev64${p}.32 $Vd, $Vm */
ARM_VREV64d32 /* 3284 */, ARM_INS_VREV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev64${p}.8 $Vd, $Vm */
ARM_VREV64d8 /* 3285 */, ARM_INS_VREV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev64${p}.16 $Vd, $Vm */
ARM_VREV64q16 /* 3286 */, ARM_INS_VREV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev64${p}.32 $Vd, $Vm */
ARM_VREV64q32 /* 3287 */, ARM_INS_VREV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrev64${p}.8 $Vd, $Vm */
ARM_VREV64q8 /* 3288 */, ARM_INS_VREV64,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.s8 $Vd, $Vn, $Vm */
ARM_VRHADDsv16i8 /* 3289 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.s32 $Vd, $Vn, $Vm */
ARM_VRHADDsv2i32 /* 3290 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.s16 $Vd, $Vn, $Vm */
ARM_VRHADDsv4i16 /* 3291 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.s32 $Vd, $Vn, $Vm */
ARM_VRHADDsv4i32 /* 3292 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.s16 $Vd, $Vn, $Vm */
ARM_VRHADDsv8i16 /* 3293 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.s8 $Vd, $Vn, $Vm */
ARM_VRHADDsv8i8 /* 3294 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.u8 $Vd, $Vn, $Vm */
ARM_VRHADDuv16i8 /* 3295 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.u32 $Vd, $Vn, $Vm */
ARM_VRHADDuv2i32 /* 3296 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.u16 $Vd, $Vn, $Vm */
ARM_VRHADDuv4i16 /* 3297 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.u32 $Vd, $Vn, $Vm */
ARM_VRHADDuv4i32 /* 3298 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.u16 $Vd, $Vn, $Vm */
ARM_VRHADDuv8i16 /* 3299 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrhadd${p}.u8 $Vd, $Vn, $Vm */
ARM_VRHADDuv8i8 /* 3300 */, ARM_INS_VRHADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrinta.f64 $Dd, $Dm */
ARM_VRINTAD /* 3301 */, ARM_INS_VRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vrinta.f16 $Sd, $Sm */
ARM_VRINTAH /* 3302 */, ARM_INS_VRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrinta.f32 $Vd, $Vm */
ARM_VRINTANDf /* 3303 */, ARM_INS_VRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrinta.f16 $Vd, $Vm */
ARM_VRINTANDh /* 3304 */, ARM_INS_VRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrinta.f32 $Vd, $Vm */
ARM_VRINTANQf /* 3305 */, ARM_INS_VRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrinta.f16 $Vd, $Vm */
ARM_VRINTANQh /* 3306 */, ARM_INS_VRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrinta.f32 $Sd, $Sm */
ARM_VRINTAS /* 3307 */, ARM_INS_VRINTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vrintm.f64 $Dd, $Dm */
ARM_VRINTMD /* 3308 */, ARM_INS_VRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vrintm.f16 $Sd, $Sm */
ARM_VRINTMH /* 3309 */, ARM_INS_VRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintm.f32 $Vd, $Vm */
ARM_VRINTMNDf /* 3310 */, ARM_INS_VRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintm.f16 $Vd, $Vm */
ARM_VRINTMNDh /* 3311 */, ARM_INS_VRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintm.f32 $Vd, $Vm */
ARM_VRINTMNQf /* 3312 */, ARM_INS_VRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintm.f16 $Vd, $Vm */
ARM_VRINTMNQh /* 3313 */, ARM_INS_VRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintm.f32 $Sd, $Sm */
ARM_VRINTMS /* 3314 */, ARM_INS_VRINTM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vrintn.f64 $Dd, $Dm */
ARM_VRINTND /* 3315 */, ARM_INS_VRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vrintn.f16 $Sd, $Sm */
ARM_VRINTNH /* 3316 */, ARM_INS_VRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintn.f32 $Vd, $Vm */
ARM_VRINTNNDf /* 3317 */, ARM_INS_VRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintn.f16 $Vd, $Vm */
ARM_VRINTNNDh /* 3318 */, ARM_INS_VRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintn.f32 $Vd, $Vm */
ARM_VRINTNNQf /* 3319 */, ARM_INS_VRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintn.f16 $Vd, $Vm */
ARM_VRINTNNQh /* 3320 */, ARM_INS_VRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintn.f32 $Sd, $Sm */
ARM_VRINTNS /* 3321 */, ARM_INS_VRINTN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vrintp.f64 $Dd, $Dm */
ARM_VRINTPD /* 3322 */, ARM_INS_VRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vrintp.f16 $Sd, $Sm */
ARM_VRINTPH /* 3323 */, ARM_INS_VRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintp.f32 $Vd, $Vm */
ARM_VRINTPNDf /* 3324 */, ARM_INS_VRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintp.f16 $Vd, $Vm */
ARM_VRINTPNDh /* 3325 */, ARM_INS_VRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintp.f32 $Vd, $Vm */
ARM_VRINTPNQf /* 3326 */, ARM_INS_VRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintp.f16 $Vd, $Vm */
ARM_VRINTPNQh /* 3327 */, ARM_INS_VRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintp.f32 $Sd, $Sm */
ARM_VRINTPS /* 3328 */, ARM_INS_VRINTP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vrintr${p}.f64 $Dd, $Dm */
ARM_VRINTRD /* 3329 */, ARM_INS_VRINTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vrintr${p}.f16 $Sd, $Sm */
ARM_VRINTRH /* 3330 */, ARM_INS_VRINTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintr${p}.f32 $Sd, $Sm */
ARM_VRINTRS /* 3331 */, ARM_INS_VRINTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vrintx${p}.f64 $Dd, $Dm */
ARM_VRINTXD /* 3332 */, ARM_INS_VRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vrintx${p}.f16 $Sd, $Sm */
ARM_VRINTXH /* 3333 */, ARM_INS_VRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintx.f32 $Vd, $Vm */
ARM_VRINTXNDf /* 3334 */, ARM_INS_VRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintx.f16 $Vd, $Vm */
ARM_VRINTXNDh /* 3335 */, ARM_INS_VRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintx.f32 $Vd, $Vm */
ARM_VRINTXNQf /* 3336 */, ARM_INS_VRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintx.f16 $Vd, $Vm */
ARM_VRINTXNQh /* 3337 */, ARM_INS_VRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintx${p}.f32 $Sd, $Sm */
ARM_VRINTXS /* 3338 */, ARM_INS_VRINTX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vrintz${p}.f64 $Dd, $Dm */
ARM_VRINTZD /* 3339 */, ARM_INS_VRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vrintz${p}.f16 $Sd, $Sm */
ARM_VRINTZH /* 3340 */, ARM_INS_VRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintz.f32 $Vd, $Vm */
ARM_VRINTZNDf /* 3341 */, ARM_INS_VRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintz.f16 $Vd, $Vm */
ARM_VRINTZNDh /* 3342 */, ARM_INS_VRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintz.f32 $Vd, $Vm */
ARM_VRINTZNQf /* 3343 */, ARM_INS_VRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrintz.f16 $Vd, $Vm */
ARM_VRINTZNQh /* 3344 */, ARM_INS_VRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8, ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrintz${p}.f32 $Sd, $Sm */
ARM_VRINTZS /* 3345 */, ARM_INS_VRINTZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.s8 $Vd, $Vm, $Vn */
ARM_VRSHLsv16i8 /* 3346 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.s64 $Vd, $Vm, $Vn */
ARM_VRSHLsv1i64 /* 3347 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.s32 $Vd, $Vm, $Vn */
ARM_VRSHLsv2i32 /* 3348 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.s64 $Vd, $Vm, $Vn */
ARM_VRSHLsv2i64 /* 3349 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.s16 $Vd, $Vm, $Vn */
ARM_VRSHLsv4i16 /* 3350 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.s32 $Vd, $Vm, $Vn */
ARM_VRSHLsv4i32 /* 3351 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.s16 $Vd, $Vm, $Vn */
ARM_VRSHLsv8i16 /* 3352 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.s8 $Vd, $Vm, $Vn */
ARM_VRSHLsv8i8 /* 3353 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.u8 $Vd, $Vm, $Vn */
ARM_VRSHLuv16i8 /* 3354 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.u64 $Vd, $Vm, $Vn */
ARM_VRSHLuv1i64 /* 3355 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.u32 $Vd, $Vm, $Vn */
ARM_VRSHLuv2i32 /* 3356 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.u64 $Vd, $Vm, $Vn */
ARM_VRSHLuv2i64 /* 3357 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.u16 $Vd, $Vm, $Vn */
ARM_VRSHLuv4i16 /* 3358 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.u32 $Vd, $Vm, $Vn */
ARM_VRSHLuv4i32 /* 3359 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.u16 $Vd, $Vm, $Vn */
ARM_VRSHLuv8i16 /* 3360 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshl${p}.u8 $Vd, $Vm, $Vn */
ARM_VRSHLuv8i8 /* 3361 */, ARM_INS_VRSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshrn${p}.i64 $Vd, $Vm, $SIMM */
ARM_VRSHRNv2i32 /* 3362 */, ARM_INS_VRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshrn${p}.i32 $Vd, $Vm, $SIMM */
ARM_VRSHRNv4i16 /* 3363 */, ARM_INS_VRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshrn${p}.i16 $Vd, $Vm, $SIMM */
ARM_VRSHRNv8i8 /* 3364 */, ARM_INS_VRSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.s8 $Vd, $Vm, $SIMM */
ARM_VRSHRsv16i8 /* 3365 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.s64 $Vd, $Vm, $SIMM */
ARM_VRSHRsv1i64 /* 3366 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.s32 $Vd, $Vm, $SIMM */
ARM_VRSHRsv2i32 /* 3367 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.s64 $Vd, $Vm, $SIMM */
ARM_VRSHRsv2i64 /* 3368 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.s16 $Vd, $Vm, $SIMM */
ARM_VRSHRsv4i16 /* 3369 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.s32 $Vd, $Vm, $SIMM */
ARM_VRSHRsv4i32 /* 3370 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.s16 $Vd, $Vm, $SIMM */
ARM_VRSHRsv8i16 /* 3371 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.s8 $Vd, $Vm, $SIMM */
ARM_VRSHRsv8i8 /* 3372 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.u8 $Vd, $Vm, $SIMM */
ARM_VRSHRuv16i8 /* 3373 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.u64 $Vd, $Vm, $SIMM */
ARM_VRSHRuv1i64 /* 3374 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.u32 $Vd, $Vm, $SIMM */
ARM_VRSHRuv2i32 /* 3375 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.u64 $Vd, $Vm, $SIMM */
ARM_VRSHRuv2i64 /* 3376 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.u16 $Vd, $Vm, $SIMM */
ARM_VRSHRuv4i16 /* 3377 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.u32 $Vd, $Vm, $SIMM */
ARM_VRSHRuv4i32 /* 3378 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.u16 $Vd, $Vm, $SIMM */
ARM_VRSHRuv8i16 /* 3379 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrshr${p}.u8 $Vd, $Vm, $SIMM */
ARM_VRSHRuv8i8 /* 3380 */, ARM_INS_VRSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsqrte${p}.u32 $Vd, $Vm */
ARM_VRSQRTEd /* 3381 */, ARM_INS_VRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsqrte${p}.f32 $Vd, $Vm */
ARM_VRSQRTEfd /* 3382 */, ARM_INS_VRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsqrte${p}.f32 $Vd, $Vm */
ARM_VRSQRTEfq /* 3383 */, ARM_INS_VRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsqrte${p}.f16 $Vd, $Vm */
ARM_VRSQRTEhd /* 3384 */, ARM_INS_VRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrsqrte${p}.f16 $Vd, $Vm */
ARM_VRSQRTEhq /* 3385 */, ARM_INS_VRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrsqrte${p}.u32 $Vd, $Vm */
ARM_VRSQRTEq /* 3386 */, ARM_INS_VRSQRTE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsqrts${p}.f32 $Vd, $Vn, $Vm */
ARM_VRSQRTSfd /* 3387 */, ARM_INS_VRSQRTS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsqrts${p}.f32 $Vd, $Vn, $Vm */
ARM_VRSQRTSfq /* 3388 */, ARM_INS_VRSQRTS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsqrts${p}.f16 $Vd, $Vn, $Vm */
ARM_VRSQRTShd /* 3389 */, ARM_INS_VRSQRTS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrsqrts${p}.f16 $Vd, $Vn, $Vm */
ARM_VRSQRTShq /* 3390 */, ARM_INS_VRSQRTS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.s8 $Vd, $Vm, $SIMM */
ARM_VRSRAsv16i8 /* 3391 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.s64 $Vd, $Vm, $SIMM */
ARM_VRSRAsv1i64 /* 3392 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.s32 $Vd, $Vm, $SIMM */
ARM_VRSRAsv2i32 /* 3393 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.s64 $Vd, $Vm, $SIMM */
ARM_VRSRAsv2i64 /* 3394 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.s16 $Vd, $Vm, $SIMM */
ARM_VRSRAsv4i16 /* 3395 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.s32 $Vd, $Vm, $SIMM */
ARM_VRSRAsv4i32 /* 3396 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.s16 $Vd, $Vm, $SIMM */
ARM_VRSRAsv8i16 /* 3397 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.s8 $Vd, $Vm, $SIMM */
ARM_VRSRAsv8i8 /* 3398 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.u8 $Vd, $Vm, $SIMM */
ARM_VRSRAuv16i8 /* 3399 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.u64 $Vd, $Vm, $SIMM */
ARM_VRSRAuv1i64 /* 3400 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.u32 $Vd, $Vm, $SIMM */
ARM_VRSRAuv2i32 /* 3401 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.u64 $Vd, $Vm, $SIMM */
ARM_VRSRAuv2i64 /* 3402 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.u16 $Vd, $Vm, $SIMM */
ARM_VRSRAuv4i16 /* 3403 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.u32 $Vd, $Vm, $SIMM */
ARM_VRSRAuv4i32 /* 3404 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.u16 $Vd, $Vm, $SIMM */
ARM_VRSRAuv8i16 /* 3405 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsra${p}.u8 $Vd, $Vm, $SIMM */
ARM_VRSRAuv8i8 /* 3406 */, ARM_INS_VRSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsubhn${p}.i64 $Vd, $Vn, $Vm */
ARM_VRSUBHNv2i32 /* 3407 */, ARM_INS_VRSUBHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsubhn${p}.i32 $Vd, $Vn, $Vm */
ARM_VRSUBHNv4i16 /* 3408 */, ARM_INS_VRSUBHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vrsubhn${p}.i16 $Vd, $Vn, $Vm */
ARM_VRSUBHNv8i8 /* 3409 */, ARM_INS_VRSUBHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vscclrm{$p} $regs */
ARM_VSCCLRMD /* 3410 */, ARM_INS_VSCCLRM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vscclrm{$p} $regs */
ARM_VSCCLRMS /* 3411 */, ARM_INS_VSCCLRM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vsdot.s8 $Vd, $Vn, $Vm */
ARM_VSDOTD /* 3412 */, ARM_INS_VSDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDotProd, 0 }, 0, 0
#endif
},
{
/* vsdot.s8 $Vd, $Vn, $Vm$lane */
ARM_VSDOTDI /* 3413 */, ARM_INS_VSDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDotProd, 0 }, 0, 0
#endif
},
{
/* vsdot.s8 $Vd, $Vn, $Vm */
ARM_VSDOTQ /* 3414 */, ARM_INS_VSDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDotProd, 0 }, 0, 0
#endif
},
{
/* vsdot.s8 $Vd, $Vn, $Vm$lane */
ARM_VSDOTQI /* 3415 */, ARM_INS_VSDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDotProd, 0 }, 0, 0
#endif
},
{
/* vseleq.f64 $Dd, $Dn, $Dm */
ARM_VSELEQD /* 3416 */, ARM_INS_VSELEQ,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vseleq.f16 $Sd, $Sn, $Sm */
ARM_VSELEQH /* 3417 */, ARM_INS_VSELEQ,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vseleq.f32 $Sd, $Sn, $Sm */
ARM_VSELEQS /* 3418 */, ARM_INS_VSELEQ,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vselge.f64 $Dd, $Dn, $Dm */
ARM_VSELGED /* 3419 */, ARM_INS_VSELGE,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vselge.f16 $Sd, $Sn, $Sm */
ARM_VSELGEH /* 3420 */, ARM_INS_VSELGE,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vselge.f32 $Sd, $Sn, $Sm */
ARM_VSELGES /* 3421 */, ARM_INS_VSELGE,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vselgt.f64 $Dd, $Dn, $Dm */
ARM_VSELGTD /* 3422 */, ARM_INS_VSELGT,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vselgt.f16 $Sd, $Sn, $Sm */
ARM_VSELGTH /* 3423 */, ARM_INS_VSELGT,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vselgt.f32 $Sd, $Sn, $Sm */
ARM_VSELGTS /* 3424 */, ARM_INS_VSELGT,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vselvs.f64 $Dd, $Dn, $Dm */
ARM_VSELVSD /* 3425 */, ARM_INS_VSELVS,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vselvs.f16 $Sd, $Sn, $Sm */
ARM_VSELVSH /* 3426 */, ARM_INS_VSELVS,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vselvs.f32 $Sd, $Sn, $Sm */
ARM_VSELVSS /* 3427 */, ARM_INS_VSELVS,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasFPARMv8, 0 }, 0, 0
#endif
},
{
/* vmov${p}.16 $V$lane, $R */
ARM_VSETLNi16 /* 3428 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vmov${p}.32 $V$lane, $R */
ARM_VSETLNi32 /* 3429 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vmov${p}.8 $V$lane, $R */
ARM_VSETLNi8 /* 3430 */, ARM_INS_VMOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshll${p}.i16 $Vd, $Vm, $SIMM */
ARM_VSHLLi16 /* 3431 */, ARM_INS_VSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshll${p}.i32 $Vd, $Vm, $SIMM */
ARM_VSHLLi32 /* 3432 */, ARM_INS_VSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshll${p}.i8 $Vd, $Vm, $SIMM */
ARM_VSHLLi8 /* 3433 */, ARM_INS_VSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshll${p}.s32 $Vd, $Vm, $SIMM */
ARM_VSHLLsv2i64 /* 3434 */, ARM_INS_VSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshll${p}.s16 $Vd, $Vm, $SIMM */
ARM_VSHLLsv4i32 /* 3435 */, ARM_INS_VSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshll${p}.s8 $Vd, $Vm, $SIMM */
ARM_VSHLLsv8i16 /* 3436 */, ARM_INS_VSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshll${p}.u32 $Vd, $Vm, $SIMM */
ARM_VSHLLuv2i64 /* 3437 */, ARM_INS_VSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshll${p}.u16 $Vd, $Vm, $SIMM */
ARM_VSHLLuv4i32 /* 3438 */, ARM_INS_VSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshll${p}.u8 $Vd, $Vm, $SIMM */
ARM_VSHLLuv8i16 /* 3439 */, ARM_INS_VSHLL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.i8 $Vd, $Vm, $SIMM */
ARM_VSHLiv16i8 /* 3440 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.i64 $Vd, $Vm, $SIMM */
ARM_VSHLiv1i64 /* 3441 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.i32 $Vd, $Vm, $SIMM */
ARM_VSHLiv2i32 /* 3442 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.i64 $Vd, $Vm, $SIMM */
ARM_VSHLiv2i64 /* 3443 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.i16 $Vd, $Vm, $SIMM */
ARM_VSHLiv4i16 /* 3444 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.i32 $Vd, $Vm, $SIMM */
ARM_VSHLiv4i32 /* 3445 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.i16 $Vd, $Vm, $SIMM */
ARM_VSHLiv8i16 /* 3446 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.i8 $Vd, $Vm, $SIMM */
ARM_VSHLiv8i8 /* 3447 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.s8 $Vd, $Vm, $Vn */
ARM_VSHLsv16i8 /* 3448 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.s64 $Vd, $Vm, $Vn */
ARM_VSHLsv1i64 /* 3449 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.s32 $Vd, $Vm, $Vn */
ARM_VSHLsv2i32 /* 3450 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.s64 $Vd, $Vm, $Vn */
ARM_VSHLsv2i64 /* 3451 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.s16 $Vd, $Vm, $Vn */
ARM_VSHLsv4i16 /* 3452 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.s32 $Vd, $Vm, $Vn */
ARM_VSHLsv4i32 /* 3453 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.s16 $Vd, $Vm, $Vn */
ARM_VSHLsv8i16 /* 3454 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.s8 $Vd, $Vm, $Vn */
ARM_VSHLsv8i8 /* 3455 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.u8 $Vd, $Vm, $Vn */
ARM_VSHLuv16i8 /* 3456 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.u64 $Vd, $Vm, $Vn */
ARM_VSHLuv1i64 /* 3457 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.u32 $Vd, $Vm, $Vn */
ARM_VSHLuv2i32 /* 3458 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.u64 $Vd, $Vm, $Vn */
ARM_VSHLuv2i64 /* 3459 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.u16 $Vd, $Vm, $Vn */
ARM_VSHLuv4i16 /* 3460 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.u32 $Vd, $Vm, $Vn */
ARM_VSHLuv4i32 /* 3461 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.u16 $Vd, $Vm, $Vn */
ARM_VSHLuv8i16 /* 3462 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshl${p}.u8 $Vd, $Vm, $Vn */
ARM_VSHLuv8i8 /* 3463 */, ARM_INS_VSHL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshrn${p}.i64 $Vd, $Vm, $SIMM */
ARM_VSHRNv2i32 /* 3464 */, ARM_INS_VSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshrn${p}.i32 $Vd, $Vm, $SIMM */
ARM_VSHRNv4i16 /* 3465 */, ARM_INS_VSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshrn${p}.i16 $Vd, $Vm, $SIMM */
ARM_VSHRNv8i8 /* 3466 */, ARM_INS_VSHRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.s8 $Vd, $Vm, $SIMM */
ARM_VSHRsv16i8 /* 3467 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.s64 $Vd, $Vm, $SIMM */
ARM_VSHRsv1i64 /* 3468 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.s32 $Vd, $Vm, $SIMM */
ARM_VSHRsv2i32 /* 3469 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.s64 $Vd, $Vm, $SIMM */
ARM_VSHRsv2i64 /* 3470 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.s16 $Vd, $Vm, $SIMM */
ARM_VSHRsv4i16 /* 3471 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.s32 $Vd, $Vm, $SIMM */
ARM_VSHRsv4i32 /* 3472 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.s16 $Vd, $Vm, $SIMM */
ARM_VSHRsv8i16 /* 3473 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.s8 $Vd, $Vm, $SIMM */
ARM_VSHRsv8i8 /* 3474 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.u8 $Vd, $Vm, $SIMM */
ARM_VSHRuv16i8 /* 3475 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.u64 $Vd, $Vm, $SIMM */
ARM_VSHRuv1i64 /* 3476 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.u32 $Vd, $Vm, $SIMM */
ARM_VSHRuv2i32 /* 3477 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.u64 $Vd, $Vm, $SIMM */
ARM_VSHRuv2i64 /* 3478 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.u16 $Vd, $Vm, $SIMM */
ARM_VSHRuv4i16 /* 3479 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.u32 $Vd, $Vm, $SIMM */
ARM_VSHRuv4i32 /* 3480 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.u16 $Vd, $Vm, $SIMM */
ARM_VSHRuv8i16 /* 3481 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vshr${p}.u8 $Vd, $Vm, $SIMM */
ARM_VSHRuv8i8 /* 3482 */, ARM_INS_VSHR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f64.s16 $dst, $a, $fbits */
ARM_VSHTOD /* 3483 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.s16 $dst, $a, $fbits */
ARM_VSHTOH /* 3484 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.s16 $dst, $a, $fbits */
ARM_VSHTOS /* 3485 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f64.s32 $Dd, $Sm */
ARM_VSITOD /* 3486 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.s32 $Sd, $Sm */
ARM_VSITOH /* 3487 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.s32 $Sd, $Sm */
ARM_VSITOS /* 3488 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vsli${p}.8 $Vd, $Vm, $SIMM */
ARM_VSLIv16i8 /* 3489 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsli${p}.64 $Vd, $Vm, $SIMM */
ARM_VSLIv1i64 /* 3490 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsli${p}.32 $Vd, $Vm, $SIMM */
ARM_VSLIv2i32 /* 3491 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsli${p}.64 $Vd, $Vm, $SIMM */
ARM_VSLIv2i64 /* 3492 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsli${p}.16 $Vd, $Vm, $SIMM */
ARM_VSLIv4i16 /* 3493 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsli${p}.32 $Vd, $Vm, $SIMM */
ARM_VSLIv4i32 /* 3494 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsli${p}.16 $Vd, $Vm, $SIMM */
ARM_VSLIv8i16 /* 3495 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsli${p}.8 $Vd, $Vm, $SIMM */
ARM_VSLIv8i8 /* 3496 */, ARM_INS_VSLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f64.s32 $dst, $a, $fbits */
ARM_VSLTOD /* 3497 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.s32 $dst, $a, $fbits */
ARM_VSLTOH /* 3498 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.s32 $dst, $a, $fbits */
ARM_VSLTOS /* 3499 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vsmmla.s8 $Vd, $Vn, $Vm */
ARM_VSMMLA /* 3500 */, ARM_INS_VSMMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMatMulInt8, 0 }, 0, 0
#endif
},
{
/* vsqrt${p}.f64 $Dd, $Dm */
ARM_VSQRTD /* 3501 */, ARM_INS_VSQRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vsqrt${p}.f16 $Sd, $Sm */
ARM_VSQRTH /* 3502 */, ARM_INS_VSQRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vsqrt${p}.f32 $Sd, $Sm */
ARM_VSQRTS /* 3503 */, ARM_INS_VSQRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vsra${p}.s8 $Vd, $Vm, $SIMM */
ARM_VSRAsv16i8 /* 3504 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.s64 $Vd, $Vm, $SIMM */
ARM_VSRAsv1i64 /* 3505 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.s32 $Vd, $Vm, $SIMM */
ARM_VSRAsv2i32 /* 3506 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.s64 $Vd, $Vm, $SIMM */
ARM_VSRAsv2i64 /* 3507 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.s16 $Vd, $Vm, $SIMM */
ARM_VSRAsv4i16 /* 3508 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.s32 $Vd, $Vm, $SIMM */
ARM_VSRAsv4i32 /* 3509 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.s16 $Vd, $Vm, $SIMM */
ARM_VSRAsv8i16 /* 3510 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.s8 $Vd, $Vm, $SIMM */
ARM_VSRAsv8i8 /* 3511 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.u8 $Vd, $Vm, $SIMM */
ARM_VSRAuv16i8 /* 3512 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.u64 $Vd, $Vm, $SIMM */
ARM_VSRAuv1i64 /* 3513 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.u32 $Vd, $Vm, $SIMM */
ARM_VSRAuv2i32 /* 3514 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.u64 $Vd, $Vm, $SIMM */
ARM_VSRAuv2i64 /* 3515 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.u16 $Vd, $Vm, $SIMM */
ARM_VSRAuv4i16 /* 3516 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.u32 $Vd, $Vm, $SIMM */
ARM_VSRAuv4i32 /* 3517 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.u16 $Vd, $Vm, $SIMM */
ARM_VSRAuv8i16 /* 3518 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsra${p}.u8 $Vd, $Vm, $SIMM */
ARM_VSRAuv8i8 /* 3519 */, ARM_INS_VSRA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsri${p}.8 $Vd, $Vm, $SIMM */
ARM_VSRIv16i8 /* 3520 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsri${p}.64 $Vd, $Vm, $SIMM */
ARM_VSRIv1i64 /* 3521 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsri${p}.32 $Vd, $Vm, $SIMM */
ARM_VSRIv2i32 /* 3522 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsri${p}.64 $Vd, $Vm, $SIMM */
ARM_VSRIv2i64 /* 3523 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsri${p}.16 $Vd, $Vm, $SIMM */
ARM_VSRIv4i16 /* 3524 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsri${p}.32 $Vd, $Vm, $SIMM */
ARM_VSRIv4i32 /* 3525 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsri${p}.16 $Vd, $Vm, $SIMM */
ARM_VSRIv8i16 /* 3526 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsri${p}.8 $Vd, $Vm, $SIMM */
ARM_VSRIv8i8 /* 3527 */, ARM_INS_VSRI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 \{$Vd[$lane]\}, $Rn */
ARM_VST1LNd16 /* 3528 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 \{$Vd[$lane]\}, $Rn$Rm */
ARM_VST1LNd16_UPD /* 3529 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 \{$Vd[$lane]\}, $Rn */
ARM_VST1LNd32 /* 3530 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 \{$Vd[$lane]\}, $Rn$Rm */
ARM_VST1LNd32_UPD /* 3531 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 \{$Vd[$lane]\}, $Rn */
ARM_VST1LNd8 /* 3532 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 \{$Vd[$lane]\}, $Rn$Rm */
ARM_VST1LNd8_UPD /* 3533 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1LNq16Pseudo /* 3534 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1LNq16Pseudo_UPD /* 3535 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1LNq32Pseudo /* 3536 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1LNq32Pseudo_UPD /* 3537 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1LNq8Pseudo /* 3538 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1LNq8Pseudo_UPD /* 3539 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn */
ARM_VST1d16 /* 3540 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn */
ARM_VST1d16Q /* 3541 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d16QPseudo /* 3542 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d16QPseudoWB_fixed /* 3543 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d16QPseudoWB_register /* 3544 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn! */
ARM_VST1d16Qwb_fixed /* 3545 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn, $Rm */
ARM_VST1d16Qwb_register /* 3546 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn */
ARM_VST1d16T /* 3547 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d16TPseudo /* 3548 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d16TPseudoWB_fixed /* 3549 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d16TPseudoWB_register /* 3550 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn! */
ARM_VST1d16Twb_fixed /* 3551 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn, $Rm */
ARM_VST1d16Twb_register /* 3552 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn! */
ARM_VST1d16wb_fixed /* 3553 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn, $Rm */
ARM_VST1d16wb_register /* 3554 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn */
ARM_VST1d32 /* 3555 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn */
ARM_VST1d32Q /* 3556 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d32QPseudo /* 3557 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d32QPseudoWB_fixed /* 3558 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d32QPseudoWB_register /* 3559 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn! */
ARM_VST1d32Qwb_fixed /* 3560 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn, $Rm */
ARM_VST1d32Qwb_register /* 3561 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn */
ARM_VST1d32T /* 3562 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d32TPseudo /* 3563 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d32TPseudoWB_fixed /* 3564 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d32TPseudoWB_register /* 3565 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn! */
ARM_VST1d32Twb_fixed /* 3566 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn, $Rm */
ARM_VST1d32Twb_register /* 3567 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn! */
ARM_VST1d32wb_fixed /* 3568 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn, $Rm */
ARM_VST1d32wb_register /* 3569 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn */
ARM_VST1d64 /* 3570 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn */
ARM_VST1d64Q /* 3571 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d64QPseudo /* 3572 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d64QPseudoWB_fixed /* 3573 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d64QPseudoWB_register /* 3574 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn! */
ARM_VST1d64Qwb_fixed /* 3575 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn, $Rm */
ARM_VST1d64Qwb_register /* 3576 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn */
ARM_VST1d64T /* 3577 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d64TPseudo /* 3578 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d64TPseudoWB_fixed /* 3579 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d64TPseudoWB_register /* 3580 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn! */
ARM_VST1d64Twb_fixed /* 3581 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn, $Rm */
ARM_VST1d64Twb_register /* 3582 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn! */
ARM_VST1d64wb_fixed /* 3583 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn, $Rm */
ARM_VST1d64wb_register /* 3584 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn */
ARM_VST1d8 /* 3585 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn */
ARM_VST1d8Q /* 3586 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d8QPseudo /* 3587 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d8QPseudoWB_fixed /* 3588 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d8QPseudoWB_register /* 3589 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn! */
ARM_VST1d8Qwb_fixed /* 3590 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn, $Rm */
ARM_VST1d8Qwb_register /* 3591 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn */
ARM_VST1d8T /* 3592 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d8TPseudo /* 3593 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d8TPseudoWB_fixed /* 3594 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1d8TPseudoWB_register /* 3595 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn! */
ARM_VST1d8Twb_fixed /* 3596 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn, $Rm */
ARM_VST1d8Twb_register /* 3597 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn! */
ARM_VST1d8wb_fixed /* 3598 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn, $Rm */
ARM_VST1d8wb_register /* 3599 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn */
ARM_VST1q16 /* 3600 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q16HighQPseudo /* 3601 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q16HighQPseudo_UPD /* 3602 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q16HighTPseudo /* 3603 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q16HighTPseudo_UPD /* 3604 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q16LowQPseudo_UPD /* 3605 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q16LowTPseudo_UPD /* 3606 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn! */
ARM_VST1q16wb_fixed /* 3607 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.16 $Vd, $Rn, $Rm */
ARM_VST1q16wb_register /* 3608 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn */
ARM_VST1q32 /* 3609 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q32HighQPseudo /* 3610 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q32HighQPseudo_UPD /* 3611 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q32HighTPseudo /* 3612 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q32HighTPseudo_UPD /* 3613 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q32LowQPseudo_UPD /* 3614 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q32LowTPseudo_UPD /* 3615 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn! */
ARM_VST1q32wb_fixed /* 3616 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.32 $Vd, $Rn, $Rm */
ARM_VST1q32wb_register /* 3617 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn */
ARM_VST1q64 /* 3618 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q64HighQPseudo /* 3619 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q64HighQPseudo_UPD /* 3620 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q64HighTPseudo /* 3621 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q64HighTPseudo_UPD /* 3622 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q64LowQPseudo_UPD /* 3623 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q64LowTPseudo_UPD /* 3624 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn! */
ARM_VST1q64wb_fixed /* 3625 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.64 $Vd, $Rn, $Rm */
ARM_VST1q64wb_register /* 3626 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn */
ARM_VST1q8 /* 3627 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q8HighQPseudo /* 3628 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q8HighQPseudo_UPD /* 3629 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q8HighTPseudo /* 3630 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q8HighTPseudo_UPD /* 3631 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q8LowQPseudo_UPD /* 3632 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST1q8LowTPseudo_UPD /* 3633 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn! */
ARM_VST1q8wb_fixed /* 3634 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst1${p}.8 $Vd, $Rn, $Rm */
ARM_VST1q8wb_register /* 3635 */, ARM_INS_VST1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 \{$Vd[$lane], $src2[$lane]\}, $Rn */
ARM_VST2LNd16 /* 3636 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNd16Pseudo /* 3637 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNd16Pseudo_UPD /* 3638 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 \{$Vd[$lane], $src2[$lane]\}, $Rn$Rm */
ARM_VST2LNd16_UPD /* 3639 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 \{$Vd[$lane], $src2[$lane]\}, $Rn */
ARM_VST2LNd32 /* 3640 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNd32Pseudo /* 3641 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNd32Pseudo_UPD /* 3642 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 \{$Vd[$lane], $src2[$lane]\}, $Rn$Rm */
ARM_VST2LNd32_UPD /* 3643 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 \{$Vd[$lane], $src2[$lane]\}, $Rn */
ARM_VST2LNd8 /* 3644 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNd8Pseudo /* 3645 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNd8Pseudo_UPD /* 3646 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 \{$Vd[$lane], $src2[$lane]\}, $Rn$Rm */
ARM_VST2LNd8_UPD /* 3647 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 \{$Vd[$lane], $src2[$lane]\}, $Rn */
ARM_VST2LNq16 /* 3648 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNq16Pseudo /* 3649 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNq16Pseudo_UPD /* 3650 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 \{$Vd[$lane], $src2[$lane]\}, $Rn$Rm */
ARM_VST2LNq16_UPD /* 3651 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 \{$Vd[$lane], $src2[$lane]\}, $Rn */
ARM_VST2LNq32 /* 3652 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNq32Pseudo /* 3653 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2LNq32Pseudo_UPD /* 3654 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 \{$Vd[$lane], $src2[$lane]\}, $Rn$Rm */
ARM_VST2LNq32_UPD /* 3655 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $Vd, $Rn */
ARM_VST2b16 /* 3656 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $Vd, $Rn! */
ARM_VST2b16wb_fixed /* 3657 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $Vd, $Rn, $Rm */
ARM_VST2b16wb_register /* 3658 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $Vd, $Rn */
ARM_VST2b32 /* 3659 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $Vd, $Rn! */
ARM_VST2b32wb_fixed /* 3660 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $Vd, $Rn, $Rm */
ARM_VST2b32wb_register /* 3661 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $Vd, $Rn */
ARM_VST2b8 /* 3662 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $Vd, $Rn! */
ARM_VST2b8wb_fixed /* 3663 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $Vd, $Rn, $Rm */
ARM_VST2b8wb_register /* 3664 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $Vd, $Rn */
ARM_VST2d16 /* 3665 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $Vd, $Rn! */
ARM_VST2d16wb_fixed /* 3666 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $Vd, $Rn, $Rm */
ARM_VST2d16wb_register /* 3667 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $Vd, $Rn */
ARM_VST2d32 /* 3668 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $Vd, $Rn! */
ARM_VST2d32wb_fixed /* 3669 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $Vd, $Rn, $Rm */
ARM_VST2d32wb_register /* 3670 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $Vd, $Rn */
ARM_VST2d8 /* 3671 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $Vd, $Rn! */
ARM_VST2d8wb_fixed /* 3672 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $Vd, $Rn, $Rm */
ARM_VST2d8wb_register /* 3673 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $Vd, $Rn */
ARM_VST2q16 /* 3674 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2q16Pseudo /* 3675 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2q16PseudoWB_fixed /* 3676 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2q16PseudoWB_register /* 3677 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $Vd, $Rn! */
ARM_VST2q16wb_fixed /* 3678 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.16 $Vd, $Rn, $Rm */
ARM_VST2q16wb_register /* 3679 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $Vd, $Rn */
ARM_VST2q32 /* 3680 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2q32Pseudo /* 3681 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2q32PseudoWB_fixed /* 3682 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2q32PseudoWB_register /* 3683 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $Vd, $Rn! */
ARM_VST2q32wb_fixed /* 3684 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.32 $Vd, $Rn, $Rm */
ARM_VST2q32wb_register /* 3685 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $Vd, $Rn */
ARM_VST2q8 /* 3686 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2q8Pseudo /* 3687 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2q8PseudoWB_fixed /* 3688 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST2q8PseudoWB_register /* 3689 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $Vd, $Rn! */
ARM_VST2q8wb_fixed /* 3690 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst2${p}.8 $Vd, $Rn, $Rm */
ARM_VST2q8wb_register /* 3691 */, ARM_INS_VST2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn */
ARM_VST3LNd16 /* 3692 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNd16Pseudo /* 3693 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNd16Pseudo_UPD /* 3694 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn$Rm */
ARM_VST3LNd16_UPD /* 3695 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn */
ARM_VST3LNd32 /* 3696 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNd32Pseudo /* 3697 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNd32Pseudo_UPD /* 3698 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn$Rm */
ARM_VST3LNd32_UPD /* 3699 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn */
ARM_VST3LNd8 /* 3700 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNd8Pseudo /* 3701 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNd8Pseudo_UPD /* 3702 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn$Rm */
ARM_VST3LNd8_UPD /* 3703 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn */
ARM_VST3LNq16 /* 3704 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNq16Pseudo /* 3705 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNq16Pseudo_UPD /* 3706 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn$Rm */
ARM_VST3LNq16_UPD /* 3707 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn */
ARM_VST3LNq32 /* 3708 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNq32Pseudo /* 3709 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3LNq32Pseudo_UPD /* 3710 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 \{$Vd[$lane], $src2[$lane], $src3[$lane]\}, $Rn$Rm */
ARM_VST3LNq32_UPD /* 3711 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 \{$Vd, $src2, $src3\}, $Rn */
ARM_VST3d16 /* 3712 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3d16Pseudo /* 3713 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3d16Pseudo_UPD /* 3714 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 \{$Vd, $src2, $src3\}, $Rn$Rm */
ARM_VST3d16_UPD /* 3715 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 \{$Vd, $src2, $src3\}, $Rn */
ARM_VST3d32 /* 3716 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3d32Pseudo /* 3717 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3d32Pseudo_UPD /* 3718 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 \{$Vd, $src2, $src3\}, $Rn$Rm */
ARM_VST3d32_UPD /* 3719 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 \{$Vd, $src2, $src3\}, $Rn */
ARM_VST3d8 /* 3720 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3d8Pseudo /* 3721 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3d8Pseudo_UPD /* 3722 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 \{$Vd, $src2, $src3\}, $Rn$Rm */
ARM_VST3d8_UPD /* 3723 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 \{$Vd, $src2, $src3\}, $Rn */
ARM_VST3q16 /* 3724 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3q16Pseudo_UPD /* 3725 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.16 \{$Vd, $src2, $src3\}, $Rn$Rm */
ARM_VST3q16_UPD /* 3726 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3q16oddPseudo /* 3727 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3q16oddPseudo_UPD /* 3728 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 \{$Vd, $src2, $src3\}, $Rn */
ARM_VST3q32 /* 3729 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3q32Pseudo_UPD /* 3730 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.32 \{$Vd, $src2, $src3\}, $Rn$Rm */
ARM_VST3q32_UPD /* 3731 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3q32oddPseudo /* 3732 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3q32oddPseudo_UPD /* 3733 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 \{$Vd, $src2, $src3\}, $Rn */
ARM_VST3q8 /* 3734 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3q8Pseudo_UPD /* 3735 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst3${p}.8 \{$Vd, $src2, $src3\}, $Rn$Rm */
ARM_VST3q8_UPD /* 3736 */, ARM_INS_VST3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3q8oddPseudo /* 3737 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST3q8oddPseudo_UPD /* 3738 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn */
ARM_VST4LNd16 /* 3739 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNd16Pseudo /* 3740 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNd16Pseudo_UPD /* 3741 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn$Rm */
ARM_VST4LNd16_UPD /* 3742 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn */
ARM_VST4LNd32 /* 3743 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNd32Pseudo /* 3744 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNd32Pseudo_UPD /* 3745 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn$Rm */
ARM_VST4LNd32_UPD /* 3746 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn */
ARM_VST4LNd8 /* 3747 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNd8Pseudo /* 3748 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNd8Pseudo_UPD /* 3749 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn$Rm */
ARM_VST4LNd8_UPD /* 3750 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn */
ARM_VST4LNq16 /* 3751 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNq16Pseudo /* 3752 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNq16Pseudo_UPD /* 3753 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn$Rm */
ARM_VST4LNq16_UPD /* 3754 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn */
ARM_VST4LNq32 /* 3755 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNq32Pseudo /* 3756 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4LNq32Pseudo_UPD /* 3757 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 \{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $Rn$Rm */
ARM_VST4LNq32_UPD /* 3758 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 \{$Vd, $src2, $src3, $src4\}, $Rn */
ARM_VST4d16 /* 3759 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4d16Pseudo /* 3760 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4d16Pseudo_UPD /* 3761 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 \{$Vd, $src2, $src3, $src4\}, $Rn$Rm */
ARM_VST4d16_UPD /* 3762 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 \{$Vd, $src2, $src3, $src4\}, $Rn */
ARM_VST4d32 /* 3763 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4d32Pseudo /* 3764 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4d32Pseudo_UPD /* 3765 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 \{$Vd, $src2, $src3, $src4\}, $Rn$Rm */
ARM_VST4d32_UPD /* 3766 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 \{$Vd, $src2, $src3, $src4\}, $Rn */
ARM_VST4d8 /* 3767 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4d8Pseudo /* 3768 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4d8Pseudo_UPD /* 3769 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 \{$Vd, $src2, $src3, $src4\}, $Rn$Rm */
ARM_VST4d8_UPD /* 3770 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 \{$Vd, $src2, $src3, $src4\}, $Rn */
ARM_VST4q16 /* 3771 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4q16Pseudo_UPD /* 3772 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.16 \{$Vd, $src2, $src3, $src4\}, $Rn$Rm */
ARM_VST4q16_UPD /* 3773 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4q16oddPseudo /* 3774 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4q16oddPseudo_UPD /* 3775 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 \{$Vd, $src2, $src3, $src4\}, $Rn */
ARM_VST4q32 /* 3776 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4q32Pseudo_UPD /* 3777 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.32 \{$Vd, $src2, $src3, $src4\}, $Rn$Rm */
ARM_VST4q32_UPD /* 3778 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4q32oddPseudo /* 3779 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4q32oddPseudo_UPD /* 3780 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 \{$Vd, $src2, $src3, $src4\}, $Rn */
ARM_VST4q8 /* 3781 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4q8Pseudo_UPD /* 3782 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vst4${p}.8 \{$Vd, $src2, $src3, $src4\}, $Rn$Rm */
ARM_VST4q8_UPD /* 3783 */, ARM_INS_VST4,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4q8oddPseudo /* 3784 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VST4q8oddPseudo_UPD /* 3785 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vstmdb${p} $Rn!, $regs */
ARM_VSTMDDB_UPD /* 3786 */, ARM_INS_VSTMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vstmia${p} $Rn, $regs */
ARM_VSTMDIA /* 3787 */, ARM_INS_VSTMIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vstmia${p} $Rn!, $regs */
ARM_VSTMDIA_UPD /* 3788 */, ARM_INS_VSTMIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VSTMQIA /* 3789 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vstmdb${p} $Rn!, $regs */
ARM_VSTMSDB_UPD /* 3790 */, ARM_INS_VSTMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vstmia${p} $Rn, $regs */
ARM_VSTMSIA /* 3791 */, ARM_INS_VSTMIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vstmia${p} $Rn!, $regs */
ARM_VSTMSIA_UPD /* 3792 */, ARM_INS_VSTMIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vstr${p} $Dd, $addr */
ARM_VSTRD /* 3793 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vstr${p}.16 $Sd, $addr */
ARM_VSTRH /* 3794 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs16, 0 }, 0, 0
#endif
},
{
/* vstr${p} $Sd, $addr */
ARM_VSTRS /* 3795 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFPRegs, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpcxtns, $addr */
ARM_VSTR_FPCXTNS_off /* 3796 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpcxtns, $Rn$addr */
ARM_VSTR_FPCXTNS_post /* 3797 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpcxtns, $addr! */
ARM_VSTR_FPCXTNS_pre /* 3798 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpcxts, $addr */
ARM_VSTR_FPCXTS_off /* 3799 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpcxts, $Rn$addr */
ARM_VSTR_FPCXTS_post /* 3800 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpcxts, $addr! */
ARM_VSTR_FPCXTS_pre /* 3801 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpscr_nzcvqc, $addr */
ARM_VSTR_FPSCR_NZCVQC_off /* 3802 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpscr_nzcvqc, $Rn$addr */
ARM_VSTR_FPSCR_NZCVQC_post /* 3803 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpscr_nzcvqc, $addr! */
ARM_VSTR_FPSCR_NZCVQC_pre /* 3804 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpscr, $addr */
ARM_VSTR_FPSCR_off /* 3805 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpscr, $Rn$addr */
ARM_VSTR_FPSCR_post /* 3806 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vstr${p} fpscr, $addr! */
ARM_VSTR_FPSCR_pre /* 3807 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_FEATURE_HasFPRegs, ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* vstr${p} p0, $addr */
ARM_VSTR_P0_off /* 3808 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstr${p} p0, $Rn$addr */
ARM_VSTR_P0_post /* 3809 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstr${p} p0, $addr! */
ARM_VSTR_P0_pre /* 3810 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstr${p} vpr, $addr */
ARM_VSTR_VPR_off /* 3811 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ ARM_REG_VPR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstr${p} vpr, $Rn$addr */
ARM_VSTR_VPR_post /* 3812 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ ARM_REG_VPR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vstr${p} vpr, $addr! */
ARM_VSTR_VPR_pre /* 3813 */, ARM_INS_VSTR,
#ifndef CAPSTONE_DIET
{ ARM_REG_VPR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasMVEInt, 0 }, 0, 0
#endif
},
{
/* vsub${p}.f64 $Dd, $Dn, $Dm */
ARM_VSUBD /* 3814 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vsub${p}.f16 $Sd, $Sn, $Sm */
ARM_VSUBH /* 3815 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vsubhn${p}.i64 $Vd, $Vn, $Vm */
ARM_VSUBHNv2i32 /* 3816 */, ARM_INS_VSUBHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubhn${p}.i32 $Vd, $Vn, $Vm */
ARM_VSUBHNv4i16 /* 3817 */, ARM_INS_VSUBHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubhn${p}.i16 $Vd, $Vn, $Vm */
ARM_VSUBHNv8i8 /* 3818 */, ARM_INS_VSUBHN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubl${p}.s32 $Vd, $Vn, $Vm */
ARM_VSUBLsv2i64 /* 3819 */, ARM_INS_VSUBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubl${p}.s16 $Vd, $Vn, $Vm */
ARM_VSUBLsv4i32 /* 3820 */, ARM_INS_VSUBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubl${p}.s8 $Vd, $Vn, $Vm */
ARM_VSUBLsv8i16 /* 3821 */, ARM_INS_VSUBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubl${p}.u32 $Vd, $Vn, $Vm */
ARM_VSUBLuv2i64 /* 3822 */, ARM_INS_VSUBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubl${p}.u16 $Vd, $Vn, $Vm */
ARM_VSUBLuv4i32 /* 3823 */, ARM_INS_VSUBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubl${p}.u8 $Vd, $Vn, $Vm */
ARM_VSUBLuv8i16 /* 3824 */, ARM_INS_VSUBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.f32 $Sd, $Sn, $Sm */
ARM_VSUBS /* 3825 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vsubw${p}.s32 $Vd, $Vn, $Vm */
ARM_VSUBWsv2i64 /* 3826 */, ARM_INS_VSUBW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubw${p}.s16 $Vd, $Vn, $Vm */
ARM_VSUBWsv4i32 /* 3827 */, ARM_INS_VSUBW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubw${p}.s8 $Vd, $Vn, $Vm */
ARM_VSUBWsv8i16 /* 3828 */, ARM_INS_VSUBW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubw${p}.u32 $Vd, $Vn, $Vm */
ARM_VSUBWuv2i64 /* 3829 */, ARM_INS_VSUBW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubw${p}.u16 $Vd, $Vn, $Vm */
ARM_VSUBWuv4i32 /* 3830 */, ARM_INS_VSUBW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsubw${p}.u8 $Vd, $Vn, $Vm */
ARM_VSUBWuv8i16 /* 3831 */, ARM_INS_VSUBW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.f32 $Vd, $Vn, $Vm */
ARM_VSUBfd /* 3832 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.f32 $Vd, $Vn, $Vm */
ARM_VSUBfq /* 3833 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.f16 $Vd, $Vn, $Vm */
ARM_VSUBhd /* 3834 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vsub${p}.f16 $Vd, $Vn, $Vm */
ARM_VSUBhq /* 3835 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vsub${p}.i8 $Vd, $Vn, $Vm */
ARM_VSUBv16i8 /* 3836 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.i64 $Vd, $Vn, $Vm */
ARM_VSUBv1i64 /* 3837 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.i32 $Vd, $Vn, $Vm */
ARM_VSUBv2i32 /* 3838 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.i64 $Vd, $Vn, $Vm */
ARM_VSUBv2i64 /* 3839 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.i16 $Vd, $Vn, $Vm */
ARM_VSUBv4i16 /* 3840 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.i32 $Vd, $Vn, $Vm */
ARM_VSUBv4i32 /* 3841 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.i16 $Vd, $Vn, $Vm */
ARM_VSUBv8i16 /* 3842 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsub${p}.i8 $Vd, $Vn, $Vm */
ARM_VSUBv8i8 /* 3843 */, ARM_INS_VSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vsudot.u8 $Vd, $Vn, $Vm$lane */
ARM_VSUDOTDI /* 3844 */, ARM_INS_VSUDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMatMulInt8, 0 }, 0, 0
#endif
},
{
/* vsudot.u8 $Vd, $Vn, $Vm$lane */
ARM_VSUDOTQI /* 3845 */, ARM_INS_VSUDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMatMulInt8, 0 }, 0, 0
#endif
},
{
/* vswp${p} $Vd, $Vm */
ARM_VSWPd /* 3846 */, ARM_INS_VSWP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vswp${p} $Vd, $Vm */
ARM_VSWPq /* 3847 */, ARM_INS_VSWP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtbl${p}.8 $Vd, $Vn, $Vm */
ARM_VTBL1 /* 3848 */, ARM_INS_VTBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtbl${p}.8 $Vd, $Vn, $Vm */
ARM_VTBL2 /* 3849 */, ARM_INS_VTBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtbl${p}.8 $Vd, $Vn, $Vm */
ARM_VTBL3 /* 3850 */, ARM_INS_VTBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VTBL3Pseudo /* 3851 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vtbl${p}.8 $Vd, $Vn, $Vm */
ARM_VTBL4 /* 3852 */, ARM_INS_VTBL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VTBL4Pseudo /* 3853 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vtbx${p}.8 $Vd, $Vn, $Vm */
ARM_VTBX1 /* 3854 */, ARM_INS_VTBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtbx${p}.8 $Vd, $Vn, $Vm */
ARM_VTBX2 /* 3855 */, ARM_INS_VTBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtbx${p}.8 $Vd, $Vn, $Vm */
ARM_VTBX3 /* 3856 */, ARM_INS_VTBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VTBX3Pseudo /* 3857 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vtbx${p}.8 $Vd, $Vn, $Vm */
ARM_VTBX4 /* 3858 */, ARM_INS_VTBX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_VTBX4Pseudo /* 3859 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s16.f64 $dst, $a, $fbits */
ARM_VTOSHD /* 3860 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s16.f16 $dst, $a, $fbits */
ARM_VTOSHH /* 3861 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s16.f32 $dst, $a, $fbits */
ARM_VTOSHS /* 3862 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvtr${p}.s32.f64 $Sd, $Dm */
ARM_VTOSIRD /* 3863 */, ARM_INS_VCVTR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtr${p}.s32.f16 $Sd, $Sm */
ARM_VTOSIRH /* 3864 */, ARM_INS_VCVTR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtr${p}.s32.f32 $Sd, $Sm */
ARM_VTOSIRS /* 3865 */, ARM_INS_VCVTR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f64 $Sd, $Dm */
ARM_VTOSIZD /* 3866 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f16 $Sd, $Sm */
ARM_VTOSIZH /* 3867 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f32 $Sd, $Sm */
ARM_VTOSIZS /* 3868 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f64 $dst, $a, $fbits */
ARM_VTOSLD /* 3869 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f16 $dst, $a, $fbits */
ARM_VTOSLH /* 3870 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.s32.f32 $dst, $a, $fbits */
ARM_VTOSLS /* 3871 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u16.f64 $dst, $a, $fbits */
ARM_VTOUHD /* 3872 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u16.f16 $dst, $a, $fbits */
ARM_VTOUHH /* 3873 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u16.f32 $dst, $a, $fbits */
ARM_VTOUHS /* 3874 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvtr${p}.u32.f64 $Sd, $Dm */
ARM_VTOUIRD /* 3875 */, ARM_INS_VCVTR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvtr${p}.u32.f16 $Sd, $Sm */
ARM_VTOUIRH /* 3876 */, ARM_INS_VCVTR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvtr${p}.u32.f32 $Sd, $Sm */
ARM_VTOUIRS /* 3877 */, ARM_INS_VCVTR,
#ifndef CAPSTONE_DIET
{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f64 $Sd, $Dm */
ARM_VTOUIZD /* 3878 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f16 $Sd, $Sm */
ARM_VTOUIZH /* 3879 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f32 $Sd, $Sm */
ARM_VTOUIZS /* 3880 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f64 $dst, $a, $fbits */
ARM_VTOULD /* 3881 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f16 $dst, $a, $fbits */
ARM_VTOULH /* 3882 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.u32.f32 $dst, $a, $fbits */
ARM_VTOULS /* 3883 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vtrn${p}.16 $Vd, $Vm */
ARM_VTRNd16 /* 3884 */, ARM_INS_VTRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtrn${p}.32 $Vd, $Vm */
ARM_VTRNd32 /* 3885 */, ARM_INS_VTRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtrn${p}.8 $Vd, $Vm */
ARM_VTRNd8 /* 3886 */, ARM_INS_VTRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtrn${p}.16 $Vd, $Vm */
ARM_VTRNq16 /* 3887 */, ARM_INS_VTRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtrn${p}.32 $Vd, $Vm */
ARM_VTRNq32 /* 3888 */, ARM_INS_VTRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtrn${p}.8 $Vd, $Vm */
ARM_VTRNq8 /* 3889 */, ARM_INS_VTRN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtst${p}.8 $Vd, $Vn, $Vm */
ARM_VTSTv16i8 /* 3890 */, ARM_INS_VTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtst${p}.32 $Vd, $Vn, $Vm */
ARM_VTSTv2i32 /* 3891 */, ARM_INS_VTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtst${p}.16 $Vd, $Vn, $Vm */
ARM_VTSTv4i16 /* 3892 */, ARM_INS_VTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtst${p}.32 $Vd, $Vn, $Vm */
ARM_VTSTv4i32 /* 3893 */, ARM_INS_VTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtst${p}.16 $Vd, $Vn, $Vm */
ARM_VTSTv8i16 /* 3894 */, ARM_INS_VTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vtst${p}.8 $Vd, $Vn, $Vm */
ARM_VTSTv8i8 /* 3895 */, ARM_INS_VTST,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vudot.u8 $Vd, $Vn, $Vm */
ARM_VUDOTD /* 3896 */, ARM_INS_VUDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDotProd, 0 }, 0, 0
#endif
},
{
/* vudot.u8 $Vd, $Vn, $Vm$lane */
ARM_VUDOTDI /* 3897 */, ARM_INS_VUDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDotProd, 0 }, 0, 0
#endif
},
{
/* vudot.u8 $Vd, $Vn, $Vm */
ARM_VUDOTQ /* 3898 */, ARM_INS_VUDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDotProd, 0 }, 0, 0
#endif
},
{
/* vudot.u8 $Vd, $Vn, $Vm$lane */
ARM_VUDOTQI /* 3899 */, ARM_INS_VUDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDotProd, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f64.u16 $dst, $a, $fbits */
ARM_VUHTOD /* 3900 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.u16 $dst, $a, $fbits */
ARM_VUHTOH /* 3901 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.u16 $dst, $a, $fbits */
ARM_VUHTOS /* 3902 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f64.u32 $Dd, $Sm */
ARM_VUITOD /* 3903 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.u32 $Sd, $Sm */
ARM_VUITOH /* 3904 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.u32 $Sd, $Sm */
ARM_VUITOS /* 3905 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f64.u32 $dst, $a, $fbits */
ARM_VULTOD /* 3906 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, ARM_FEATURE_HasDPVFP, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f16.u32 $dst, $a, $fbits */
ARM_VULTOH /* 3907 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasFullFP16, 0 }, 0, 0
#endif
},
{
/* vcvt${p}.f32.u32 $dst, $a, $fbits */
ARM_VULTOS /* 3908 */, ARM_INS_VCVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasVFP2, 0 }, 0, 0
#endif
},
{
/* vummla.u8 $Vd, $Vn, $Vm */
ARM_VUMMLA /* 3909 */, ARM_INS_VUMMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMatMulInt8, 0 }, 0, 0
#endif
},
{
/* vusdot.s8 $Vd, $Vn, $Vm */
ARM_VUSDOTD /* 3910 */, ARM_INS_VUSDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMatMulInt8, 0 }, 0, 0
#endif
},
{
/* vusdot.s8 $Vd, $Vn, $Vm$lane */
ARM_VUSDOTDI /* 3911 */, ARM_INS_VUSDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMatMulInt8, 0 }, 0, 0
#endif
},
{
/* vusdot.s8 $Vd, $Vn, $Vm */
ARM_VUSDOTQ /* 3912 */, ARM_INS_VUSDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMatMulInt8, 0 }, 0, 0
#endif
},
{
/* vusdot.s8 $Vd, $Vn, $Vm$lane */
ARM_VUSDOTQI /* 3913 */, ARM_INS_VUSDOT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMatMulInt8, 0 }, 0, 0
#endif
},
{
/* vusmmla.s8 $Vd, $Vn, $Vm */
ARM_VUSMMLA /* 3914 */, ARM_INS_VUSMMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasMatMulInt8, 0 }, 0, 0
#endif
},
{
/* vuzp${p}.16 $Vd, $Vm */
ARM_VUZPd16 /* 3915 */, ARM_INS_VUZP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vuzp${p}.8 $Vd, $Vm */
ARM_VUZPd8 /* 3916 */, ARM_INS_VUZP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vuzp${p}.16 $Vd, $Vm */
ARM_VUZPq16 /* 3917 */, ARM_INS_VUZP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vuzp${p}.32 $Vd, $Vm */
ARM_VUZPq32 /* 3918 */, ARM_INS_VUZP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vuzp${p}.8 $Vd, $Vm */
ARM_VUZPq8 /* 3919 */, ARM_INS_VUZP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vzip${p}.16 $Vd, $Vm */
ARM_VZIPd16 /* 3920 */, ARM_INS_VZIP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vzip${p}.8 $Vd, $Vm */
ARM_VZIPd8 /* 3921 */, ARM_INS_VZIP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vzip${p}.16 $Vd, $Vm */
ARM_VZIPq16 /* 3922 */, ARM_INS_VZIP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vzip${p}.32 $Vd, $Vm */
ARM_VZIPq32 /* 3923 */, ARM_INS_VZIP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* vzip${p}.8 $Vd, $Vm */
ARM_VZIPq8 /* 3924 */, ARM_INS_VZIP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasNEON, 0 }, 0, 0
#endif
},
{
/* ldmda${p} $Rn, $regs ^ */
ARM_sysLDMDA /* 3925 */, ARM_INS_LDMDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmda${p} $Rn!, $regs ^ */
ARM_sysLDMDA_UPD /* 3926 */, ARM_INS_LDMDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmdb${p} $Rn, $regs ^ */
ARM_sysLDMDB /* 3927 */, ARM_INS_LDMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmdb${p} $Rn!, $regs ^ */
ARM_sysLDMDB_UPD /* 3928 */, ARM_INS_LDMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldm${p} $Rn, $regs ^ */
ARM_sysLDMIA /* 3929 */, ARM_INS_LDM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldm${p} $Rn!, $regs ^ */
ARM_sysLDMIA_UPD /* 3930 */, ARM_INS_LDM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmib${p} $Rn, $regs ^ */
ARM_sysLDMIB /* 3931 */, ARM_INS_LDMIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* ldmib${p} $Rn!, $regs ^ */
ARM_sysLDMIB_UPD /* 3932 */, ARM_INS_LDMIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmda${p} $Rn, $regs ^ */
ARM_sysSTMDA /* 3933 */, ARM_INS_STMDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmda${p} $Rn!, $regs ^ */
ARM_sysSTMDA_UPD /* 3934 */, ARM_INS_STMDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmdb${p} $Rn, $regs ^ */
ARM_sysSTMDB /* 3935 */, ARM_INS_STMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmdb${p} $Rn!, $regs ^ */
ARM_sysSTMDB_UPD /* 3936 */, ARM_INS_STMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stm${p} $Rn, $regs ^ */
ARM_sysSTMIA /* 3937 */, ARM_INS_STM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stm${p} $Rn!, $regs ^ */
ARM_sysSTMIA_UPD /* 3938 */, ARM_INS_STM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmib${p} $Rn, $regs ^ */
ARM_sysSTMIB /* 3939 */, ARM_INS_STMIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* stmib${p} $Rn!, $regs ^ */
ARM_sysSTMIB_UPD /* 3940 */, ARM_INS_STMIB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsARM, 0 }, 0, 0
#endif
},
{
/* adc${s}${p} $Rd, $Rn, $imm */
ARM_t2ADCri /* 3941 */, ARM_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* adc${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2ADCrr /* 3942 */, ARM_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* adc${s}${p}.w $Rd, $Rn, $ShiftedRm */
ARM_t2ADCrs /* 3943 */, ARM_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* add${s}${p}.w $Rd, $Rn, $imm */
ARM_t2ADDri /* 3944 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* addw${p} $Rd, $Rn, $imm */
ARM_t2ADDri12 /* 3945 */, ARM_INS_ADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* add${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2ADDrr /* 3946 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* add${s}${p}.w $Rd, $Rn, $ShiftedRm */
ARM_t2ADDrs /* 3947 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* add${s}${p}.w $Rd, $Rn, $imm */
ARM_t2ADDspImm /* 3948 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* addw${p} $Rd, $Rn, $imm */
ARM_t2ADDspImm12 /* 3949 */, ARM_INS_ADDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* adr{$p}.w $Rd, $addr */
ARM_t2ADR /* 3950 */, ARM_INS_ADR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* and${s}${p} $Rd, $Rn, $imm */
ARM_t2ANDri /* 3951 */, ARM_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* and${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2ANDrr /* 3952 */, ARM_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* and${s}${p}.w $Rd, $Rn, $ShiftedRm */
ARM_t2ANDrs /* 3953 */, ARM_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* asr${s}${p}.w $Rd, $Rm, $imm */
ARM_t2ASRri /* 3954 */, ARM_INS_ASR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* asr${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2ASRrr /* 3955 */, ARM_INS_ASR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* aut r12, lr, sp */
ARM_t2AUT /* 3956 */, ARM_INS_AUT,
#ifndef CAPSTONE_DIET
{ ARM_REG_R12, ARM_REG_LR, ARM_REG_SP, 0 }, { 0 }, { ARM_FEATURE_HasV7, ARM_FEATURE_IsMClass, 0 }, 0, 0
#endif
},
{
/* autg${p} $Ra, $Rn, $Rm */
ARM_t2AUTG /* 3957 */, ARM_INS_AUTG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasPACBTI, 0 }, 0, 0
#endif
},
{
/* b${p}.w $target */
ARM_t2B /* 3958 */, ARM_INS_B,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 1, 0
#endif
},
{
/* bfc${p} $Rd, $imm */
ARM_t2BFC /* 3959 */, ARM_INS_BFC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* bfi${p} $Rd, $Rn, $imm */
ARM_t2BFI /* 3960 */, ARM_INS_BFI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* bfl${p} $b_label, $label */
ARM_t2BFLi /* 3961 */, ARM_INS_BFL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasLOB, 0 }, 0, 0
#endif
},
{
/* bflx${p} $b_label, $Rn */
ARM_t2BFLr /* 3962 */, ARM_INS_BFLX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasLOB, 0 }, 0, 0
#endif
},
{
/* bf${p} $b_label, $label */
ARM_t2BFi /* 3963 */, ARM_INS_BF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasLOB, 0 }, 0, 0
#endif
},
{
/* bfcsel $b_label, $label, $ba_label, $bcond */
ARM_t2BFic /* 3964 */, ARM_INS_BFCSEL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasLOB, 0 }, 0, 0
#endif
},
{
/* bfx${p} $b_label, $Rn */
ARM_t2BFr /* 3965 */, ARM_INS_BFX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasLOB, 0 }, 0, 0
#endif
},
{
/* bic${s}${p} $Rd, $Rn, $imm */
ARM_t2BICri /* 3966 */, ARM_INS_BIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* bic${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2BICrr /* 3967 */, ARM_INS_BIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* bic${s}${p}.w $Rd, $Rn, $ShiftedRm */
ARM_t2BICrs /* 3968 */, ARM_INS_BIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* bti */
ARM_t2BTI /* 3969 */, ARM_INS_BTI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV7, ARM_FEATURE_IsMClass, 0 }, 0, 0
#endif
},
{
/* bxaut${p} $Ra, $Rn, $Rm */
ARM_t2BXAUT /* 3970 */, ARM_INS_BXAUT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasPACBTI, 0 }, 1, 1
#endif
},
{
/* bxj${p} $func */
ARM_t2BXJ /* 3971 */, ARM_INS_BXJ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 1, 1
#endif
},
{
/* b${p}.w $target */
ARM_t2Bcc /* 3972 */, ARM_INS_B,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb2, 0 }, 1, 0
#endif
},
{
/* cdp${p} $cop, $opc1, $CRd, $CRn, $CRm, $opc2 */
ARM_t2CDP /* 3973 */, ARM_INS_CDP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* cdp2${p} $cop, $opc1, $CRd, $CRn, $CRm, $opc2 */
ARM_t2CDP2 /* 3974 */, ARM_INS_CDP2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* clrex${p} */
ARM_t2CLREX /* 3975 */, ARM_INS_CLREX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* clrm${p} $regs */
ARM_t2CLRM /* 3976 */, ARM_INS_CLRM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* clz${p} $Rd, $Rm */
ARM_t2CLZ /* 3977 */, ARM_INS_CLZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* cmn${p}.w $Rn, $imm */
ARM_t2CMNri /* 3978 */, ARM_INS_CMN,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* cmn${p}.w $Rn, $Rm */
ARM_t2CMNzrr /* 3979 */, ARM_INS_CMN,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* cmn${p}.w $Rn, $ShiftedRm */
ARM_t2CMNzrs /* 3980 */, ARM_INS_CMN,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* cmp${p}.w $Rn, $imm */
ARM_t2CMPri /* 3981 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* cmp${p}.w $Rn, $Rm */
ARM_t2CMPrr /* 3982 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* cmp${p}.w $Rn, $ShiftedRm */
ARM_t2CMPrs /* 3983 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* cps $mode */
ARM_t2CPS1p /* 3984 */, ARM_INS_CPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* cps$imod.w $iflags */
ARM_t2CPS2p /* 3985 */, ARM_INS_CPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* cps$imod $iflags, $mode */
ARM_t2CPS3p /* 3986 */, ARM_INS_CPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* crc32b $Rd, $Rn, $Rm */
ARM_t2CRC32B /* 3987 */, ARM_INS_CRC32B,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32cb $Rd, $Rn, $Rm */
ARM_t2CRC32CB /* 3988 */, ARM_INS_CRC32CB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32ch $Rd, $Rn, $Rm */
ARM_t2CRC32CH /* 3989 */, ARM_INS_CRC32CH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32cw $Rd, $Rn, $Rm */
ARM_t2CRC32CW /* 3990 */, ARM_INS_CRC32CW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32h $Rd, $Rn, $Rm */
ARM_t2CRC32H /* 3991 */, ARM_INS_CRC32H,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* crc32w $Rd, $Rn, $Rm */
ARM_t2CRC32W /* 3992 */, ARM_INS_CRC32W,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, ARM_FEATURE_HasCRC, 0 }, 0, 0
#endif
},
{
/* csel $Rd, $Rn, $Rm, $fcond */
ARM_t2CSEL /* 3993 */, ARM_INS_CSEL,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* csinc $Rd, $Rn, $Rm, $fcond */
ARM_t2CSINC /* 3994 */, ARM_INS_CSINC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* csinv $Rd, $Rn, $Rm, $fcond */
ARM_t2CSINV /* 3995 */, ARM_INS_CSINV,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* csneg $Rd, $Rn, $Rm, $fcond */
ARM_t2CSNEG /* 3996 */, ARM_INS_CSNEG,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_HasV8_1MMainline, 0 }, 0, 0
#endif
},
{
/* dbg${p} $opt */
ARM_t2DBG /* 3997 */, ARM_INS_DBG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* dcps1${p} */
ARM_t2DCPS1 /* 3998 */, ARM_INS_DCPS1,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, 0 }, 0, 0
#endif
},
{
/* dcps2${p} */
ARM_t2DCPS2 /* 3999 */, ARM_INS_DCPS2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, 0 }, 0, 0
#endif
},
{
/* dcps3${p} */
ARM_t2DCPS3 /* 4000 */, ARM_INS_DCPS3,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, 0 }, 0, 0
#endif
},
{
/* dls $LR, $Rn */
ARM_t2DLS /* 4001 */, ARM_INS_DLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasLOB, 0 }, 0, 0
#endif
},
{
/* dmb${p} $opt */
ARM_t2DMB /* 4002 */, ARM_INS_DMB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasDB, 0 }, 0, 0
#endif
},
{
/* dsb${p} $opt */
ARM_t2DSB /* 4003 */, ARM_INS_DSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasDB, 0 }, 0, 0
#endif
},
{
/* eor${s}${p} $Rd, $Rn, $imm */
ARM_t2EORri /* 4004 */, ARM_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* eor${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2EORrr /* 4005 */, ARM_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* eor${s}${p}.w $Rd, $Rn, $ShiftedRm */
ARM_t2EORrs /* 4006 */, ARM_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* hint${p}.w $imm */
ARM_t2HINT /* 4007 */, ARM_INS_HINT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* hvc.w $imm16 */
ARM_t2HVC /* 4008 */, ARM_INS_HVC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_CALL, ARM_FEATURE_IsThumb2, ARM_FEATURE_HasVirtualization, 0 }, 0, 0
#endif
},
{
/* isb${p} $opt */
ARM_t2ISB /* 4009 */, ARM_INS_ISB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasDB, 0 }, 0, 0
#endif
},
{
/* it$mask $cc */
ARM_t2IT /* 4010 */, ARM_INS_IT,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_ITSTATE, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2Int_eh_sjlj_setjmp /* 4011 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_t2Int_eh_sjlj_setjmp_nofp /* 4012 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* lda${p} $Rt, $addr */
ARM_t2LDA /* 4013 */, ARM_INS_LDA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* ldab${p} $Rt, $addr */
ARM_t2LDAB /* 4014 */, ARM_INS_LDAB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* ldaex${p} $Rt, $addr */
ARM_t2LDAEX /* 4015 */, ARM_INS_LDAEX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* ldaexb${p} $Rt, $addr */
ARM_t2LDAEXB /* 4016 */, ARM_INS_LDAEXB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* ldaexd${p} $Rt, $Rt2, $addr */
ARM_t2LDAEXD /* 4017 */, ARM_INS_LDAEXD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* ldaexh${p} $Rt, $addr */
ARM_t2LDAEXH /* 4018 */, ARM_INS_LDAEXH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* ldah${p} $Rt, $addr */
ARM_t2LDAH /* 4019 */, ARM_INS_LDAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* ldc2l${p} $cop, $CRd, $addr */
ARM_t2LDC2L_OFFSET /* 4020 */, ARM_INS_LDC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc2l${p} $cop, $CRd, $addr, $option */
ARM_t2LDC2L_OPTION /* 4021 */, ARM_INS_LDC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc2l${p} $cop, $CRd, $addr, $offset */
ARM_t2LDC2L_POST /* 4022 */, ARM_INS_LDC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc2l${p} $cop, $CRd, $addr! */
ARM_t2LDC2L_PRE /* 4023 */, ARM_INS_LDC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc2${p} $cop, $CRd, $addr */
ARM_t2LDC2_OFFSET /* 4024 */, ARM_INS_LDC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc2${p} $cop, $CRd, $addr, $option */
ARM_t2LDC2_OPTION /* 4025 */, ARM_INS_LDC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc2${p} $cop, $CRd, $addr, $offset */
ARM_t2LDC2_POST /* 4026 */, ARM_INS_LDC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc2${p} $cop, $CRd, $addr! */
ARM_t2LDC2_PRE /* 4027 */, ARM_INS_LDC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldcl${p} $cop, $CRd, $addr */
ARM_t2LDCL_OFFSET /* 4028 */, ARM_INS_LDCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldcl${p} $cop, $CRd, $addr, $option */
ARM_t2LDCL_OPTION /* 4029 */, ARM_INS_LDCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldcl${p} $cop, $CRd, $addr, $offset */
ARM_t2LDCL_POST /* 4030 */, ARM_INS_LDCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldcl${p} $cop, $CRd, $addr! */
ARM_t2LDCL_PRE /* 4031 */, ARM_INS_LDCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc${p} $cop, $CRd, $addr */
ARM_t2LDC_OFFSET /* 4032 */, ARM_INS_LDC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc${p} $cop, $CRd, $addr, $option */
ARM_t2LDC_OPTION /* 4033 */, ARM_INS_LDC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc${p} $cop, $CRd, $addr, $offset */
ARM_t2LDC_POST /* 4034 */, ARM_INS_LDC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldc${p} $cop, $CRd, $addr! */
ARM_t2LDC_PRE /* 4035 */, ARM_INS_LDC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldmdb${p} $Rn, $regs */
ARM_t2LDMDB /* 4036 */, ARM_INS_LDMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldmdb${p} $Rn!, $regs */
ARM_t2LDMDB_UPD /* 4037 */, ARM_INS_LDMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldm${p}.w $Rn, $regs */
ARM_t2LDMIA /* 4038 */, ARM_INS_LDM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldm${p}.w $Rn!, $regs */
ARM_t2LDMIA_UPD /* 4039 */, ARM_INS_LDM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrbt${p} $Rt, $addr */
ARM_t2LDRBT /* 4040 */, ARM_INS_LDRBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $Rn$offset */
ARM_t2LDRB_POST /* 4041 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr! */
ARM_t2LDRB_PRE /* 4042 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrb${p}.w $Rt, $addr */
ARM_t2LDRBi12 /* 4043 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr */
ARM_t2LDRBi8 /* 4044 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrb${p}.w $Rt, $addr */
ARM_t2LDRBpci /* 4045 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrb${p}.w $Rt, $addr */
ARM_t2LDRBs /* 4046 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrd${p} $Rt, $Rt2, $addr$imm */
ARM_t2LDRD_POST /* 4047 */, ARM_INS_LDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrd${p} $Rt, $Rt2, $addr! */
ARM_t2LDRD_PRE /* 4048 */, ARM_INS_LDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrd${p} $Rt, $Rt2, $addr */
ARM_t2LDRDi8 /* 4049 */, ARM_INS_LDRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrex${p} $Rt, $addr */
ARM_t2LDREX /* 4050 */, ARM_INS_LDREX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* ldrexb${p} $Rt, $addr */
ARM_t2LDREXB /* 4051 */, ARM_INS_LDREXB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* ldrexd${p} $Rt, $Rt2, $addr */
ARM_t2LDREXD /* 4052 */, ARM_INS_LDREXD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* ldrexh${p} $Rt, $addr */
ARM_t2LDREXH /* 4053 */, ARM_INS_LDREXH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* ldrht${p} $Rt, $addr */
ARM_t2LDRHT /* 4054 */, ARM_INS_LDRHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrh${p} $Rt, $Rn$offset */
ARM_t2LDRH_POST /* 4055 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrh${p} $Rt, $addr! */
ARM_t2LDRH_PRE /* 4056 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrh${p}.w $Rt, $addr */
ARM_t2LDRHi12 /* 4057 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrh${p} $Rt, $addr */
ARM_t2LDRHi8 /* 4058 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrh${p}.w $Rt, $addr */
ARM_t2LDRHpci /* 4059 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrh${p}.w $Rt, $addr */
ARM_t2LDRHs /* 4060 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsbt${p} $Rt, $addr */
ARM_t2LDRSBT /* 4061 */, ARM_INS_LDRSBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsb${p} $Rt, $Rn$offset */
ARM_t2LDRSB_POST /* 4062 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsb${p} $Rt, $addr! */
ARM_t2LDRSB_PRE /* 4063 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsb${p}.w $Rt, $addr */
ARM_t2LDRSBi12 /* 4064 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsb${p} $Rt, $addr */
ARM_t2LDRSBi8 /* 4065 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsb${p}.w $Rt, $addr */
ARM_t2LDRSBpci /* 4066 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsb${p}.w $Rt, $addr */
ARM_t2LDRSBs /* 4067 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsht${p} $Rt, $addr */
ARM_t2LDRSHT /* 4068 */, ARM_INS_LDRSHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsh${p} $Rt, $Rn$offset */
ARM_t2LDRSH_POST /* 4069 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsh${p} $Rt, $addr! */
ARM_t2LDRSH_PRE /* 4070 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsh${p}.w $Rt, $addr */
ARM_t2LDRSHi12 /* 4071 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsh${p} $Rt, $addr */
ARM_t2LDRSHi8 /* 4072 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsh${p}.w $Rt, $addr */
ARM_t2LDRSHpci /* 4073 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrsh${p}.w $Rt, $addr */
ARM_t2LDRSHs /* 4074 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldrt${p} $Rt, $addr */
ARM_t2LDRT /* 4075 */, ARM_INS_LDRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $Rn$offset */
ARM_t2LDR_POST /* 4076 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr! */
ARM_t2LDR_PRE /* 4077 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldr${p}.w $Rt, $addr */
ARM_t2LDRi12 /* 4078 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr */
ARM_t2LDRi8 /* 4079 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldr${p}.w $Rt, $addr */
ARM_t2LDRpci /* 4080 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ldr${p}.w $Rt, $addr */
ARM_t2LDRs /* 4081 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* le $label */
ARM_t2LE /* 4082 */, ARM_INS_LE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasLOB, 0 }, 1, 0
#endif
},
{
/* le $LRin, $label */
ARM_t2LEUpdate /* 4083 */, ARM_INS_LE,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasLOB, 0 }, 1, 0
#endif
},
{
/* lsl${s}${p}.w $Rd, $Rm, $imm */
ARM_t2LSLri /* 4084 */, ARM_INS_LSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* lsl${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2LSLrr /* 4085 */, ARM_INS_LSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* lsr${s}${p}.w $Rd, $Rm, $imm */
ARM_t2LSRri /* 4086 */, ARM_INS_LSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* lsr${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2LSRrr /* 4087 */, ARM_INS_LSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mcr${p} $cop, $opc1, $Rt, $CRn, $CRm, $opc2 */
ARM_t2MCR /* 4088 */, ARM_INS_MCR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mcr2${p} $cop, $opc1, $Rt, $CRn, $CRm, $opc2 */
ARM_t2MCR2 /* 4089 */, ARM_INS_MCR2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* mcrr${p} $cop, $opc1, $Rt, $Rt2, $CRm */
ARM_t2MCRR /* 4090 */, ARM_INS_MCRR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mcrr2${p} $cop, $opc1, $Rt, $Rt2, $CRm */
ARM_t2MCRR2 /* 4091 */, ARM_INS_MCRR2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* mla${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2MLA /* 4092 */, ARM_INS_MLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mls${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2MLS /* 4093 */, ARM_INS_MLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* movt${p} $Rd, $imm */
ARM_t2MOVTi16 /* 4094 */, ARM_INS_MOVT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* mov${s}${p}.w $Rd, $imm */
ARM_t2MOVi /* 4095 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* movw${p} $Rd, $imm */
ARM_t2MOVi16 /* 4096 */, ARM_INS_MOVW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* mov${s}${p}.w $Rd, $Rm */
ARM_t2MOVr /* 4097 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* asrs${p}.w $Rd, $Rm, #1 */
ARM_t2MOVsra_flag /* 4098 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* lsrs${p}.w $Rd, $Rm, #1 */
ARM_t2MOVsrl_flag /* 4099 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* mrc${p} $cop, $opc1, $Rt, $CRn, $CRm, $opc2 */
ARM_t2MRC /* 4100 */, ARM_INS_MRC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mrc2${p} $cop, $opc1, $Rt, $CRn, $CRm, $opc2 */
ARM_t2MRC2 /* 4101 */, ARM_INS_MRC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* mrrc${p} $cop, $opc1, $Rt, $Rt2, $CRm */
ARM_t2MRRC /* 4102 */, ARM_INS_MRRC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mrrc2${p} $cop, $opc1, $Rt, $Rt2, $CRm */
ARM_t2MRRC2 /* 4103 */, ARM_INS_MRRC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_PreV8, 0 }, 0, 0
#endif
},
{
/* mrs${p} $Rd, apsr */
ARM_t2MRS_AR /* 4104 */, ARM_INS_MRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* mrs${p} $Rd, $SYSm */
ARM_t2MRS_M /* 4105 */, ARM_INS_MRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_IsMClass, 0 }, 0, 0
#endif
},
{
/* mrs${p} $Rd, $banked */
ARM_t2MRSbanked /* 4106 */, ARM_INS_MRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasVirtualization, 0 }, 0, 0
#endif
},
{
/* mrs${p} $Rd, spsr */
ARM_t2MRSsys_AR /* 4107 */, ARM_INS_MRS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* msr${p} $mask, $Rn */
ARM_t2MSR_AR /* 4108 */, ARM_INS_MSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* msr${p} $SYSm, $Rn */
ARM_t2MSR_M /* 4109 */, ARM_INS_MSR,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_IsMClass, 0 }, 0, 0
#endif
},
{
/* msr${p} $banked, $Rn */
ARM_t2MSRbanked /* 4110 */, ARM_INS_MSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasVirtualization, 0 }, 0, 0
#endif
},
{
/* mul${p} $Rd, $Rn, $Rm */
ARM_t2MUL /* 4111 */, ARM_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mvn${s}${p} $Rd, $imm */
ARM_t2MVNi /* 4112 */, ARM_INS_MVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mvn${s}${p}.w $Rd, $Rm */
ARM_t2MVNr /* 4113 */, ARM_INS_MVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* mvn${s}${p}.w $Rd, $ShiftedRm */
ARM_t2MVNs /* 4114 */, ARM_INS_MVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* orn${s}${p} $Rd, $Rn, $imm */
ARM_t2ORNri /* 4115 */, ARM_INS_ORN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* orn${s}${p} $Rd, $Rn, $Rm */
ARM_t2ORNrr /* 4116 */, ARM_INS_ORN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* orn${s}${p} $Rd, $Rn, $ShiftedRm */
ARM_t2ORNrs /* 4117 */, ARM_INS_ORN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* orr${s}${p} $Rd, $Rn, $imm */
ARM_t2ORRri /* 4118 */, ARM_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* orr${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2ORRrr /* 4119 */, ARM_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* orr${s}${p}.w $Rd, $Rn, $ShiftedRm */
ARM_t2ORRrs /* 4120 */, ARM_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* pac r12, lr, sp */
ARM_t2PAC /* 4121 */, ARM_INS_PAC,
#ifndef CAPSTONE_DIET
{ ARM_REG_LR, ARM_REG_SP, 0 }, { ARM_REG_R12, 0 }, { ARM_FEATURE_HasV7, ARM_FEATURE_IsMClass, 0 }, 0, 0
#endif
},
{
/* pacbti r12, lr, sp */
ARM_t2PACBTI /* 4122 */, ARM_INS_PACBTI,
#ifndef CAPSTONE_DIET
{ ARM_REG_LR, ARM_REG_SP, 0 }, { ARM_REG_R12, 0 }, { ARM_FEATURE_HasV7, ARM_FEATURE_IsMClass, 0 }, 0, 0
#endif
},
{
/* pacg${p} $Rd, $Rn, $Rm */
ARM_t2PACG /* 4123 */, ARM_INS_PACG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasPACBTI, 0 }, 0, 0
#endif
},
{
/* pkhbt${p} $Rd, $Rn, $Rm$sh */
ARM_t2PKHBT /* 4124 */, ARM_INS_PKHBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* pkhtb${p} $Rd, $Rn, $Rm$sh */
ARM_t2PKHTB /* 4125 */, ARM_INS_PKHTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* pldw${p} $addr */
ARM_t2PLDWi12 /* 4126 */, ARM_INS_PLDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV7, ARM_FEATURE_HasMP, 0 }, 0, 0
#endif
},
{
/* pldw${p} $addr */
ARM_t2PLDWi8 /* 4127 */, ARM_INS_PLDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV7, ARM_FEATURE_HasMP, 0 }, 0, 0
#endif
},
{
/* pldw${p} $addr */
ARM_t2PLDWs /* 4128 */, ARM_INS_PLDW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV7, ARM_FEATURE_HasMP, 0 }, 0, 0
#endif
},
{
/* pld${p} $addr */
ARM_t2PLDi12 /* 4129 */, ARM_INS_PLD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* pld${p} $addr */
ARM_t2PLDi8 /* 4130 */, ARM_INS_PLD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* pld${p} $addr */
ARM_t2PLDpci /* 4131 */, ARM_INS_PLD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* pld${p} $addr */
ARM_t2PLDs /* 4132 */, ARM_INS_PLD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* pli${p} $addr */
ARM_t2PLIi12 /* 4133 */, ARM_INS_PLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV7, 0 }, 0, 0
#endif
},
{
/* pli${p} $addr */
ARM_t2PLIi8 /* 4134 */, ARM_INS_PLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV7, 0 }, 0, 0
#endif
},
{
/* pli${p} $addr */
ARM_t2PLIpci /* 4135 */, ARM_INS_PLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV7, 0 }, 0, 0
#endif
},
{
/* pli${p} $addr */
ARM_t2PLIs /* 4136 */, ARM_INS_PLI,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV7, 0 }, 0, 0
#endif
},
{
/* qadd${p} $Rd, $Rm, $Rn */
ARM_t2QADD /* 4137 */, ARM_INS_QADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* qadd16${p} $Rd, $Rn, $Rm */
ARM_t2QADD16 /* 4138 */, ARM_INS_QADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* qadd8${p} $Rd, $Rn, $Rm */
ARM_t2QADD8 /* 4139 */, ARM_INS_QADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* qasx${p} $Rd, $Rn, $Rm */
ARM_t2QASX /* 4140 */, ARM_INS_QASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* qdadd${p} $Rd, $Rm, $Rn */
ARM_t2QDADD /* 4141 */, ARM_INS_QDADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* qdsub${p} $Rd, $Rm, $Rn */
ARM_t2QDSUB /* 4142 */, ARM_INS_QDSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* qsax${p} $Rd, $Rn, $Rm */
ARM_t2QSAX /* 4143 */, ARM_INS_QSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* qsub${p} $Rd, $Rm, $Rn */
ARM_t2QSUB /* 4144 */, ARM_INS_QSUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* qsub16${p} $Rd, $Rn, $Rm */
ARM_t2QSUB16 /* 4145 */, ARM_INS_QSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* qsub8${p} $Rd, $Rn, $Rm */
ARM_t2QSUB8 /* 4146 */, ARM_INS_QSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* rbit${p} $Rd, $Rm */
ARM_t2RBIT /* 4147 */, ARM_INS_RBIT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* rev${p}.w $Rd, $Rm */
ARM_t2REV /* 4148 */, ARM_INS_REV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* rev16${p}.w $Rd, $Rm */
ARM_t2REV16 /* 4149 */, ARM_INS_REV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* revsh${p}.w $Rd, $Rm */
ARM_t2REVSH /* 4150 */, ARM_INS_REVSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* rfedb${p} $Rn */
ARM_t2RFEDB /* 4151 */, ARM_INS_RFEDB,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_JUMP, ARM_GRP_RET, ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 1, 0
#endif
},
{
/* rfedb${p} $Rn! */
ARM_t2RFEDBW /* 4152 */, ARM_INS_RFEDB,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_JUMP, ARM_GRP_RET, ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 1, 0
#endif
},
{
/* rfeia${p} $Rn */
ARM_t2RFEIA /* 4153 */, ARM_INS_RFEIA,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_JUMP, ARM_GRP_RET, ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 1, 0
#endif
},
{
/* rfeia${p} $Rn! */
ARM_t2RFEIAW /* 4154 */, ARM_INS_RFEIA,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_JUMP, ARM_GRP_RET, ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 1, 0
#endif
},
{
/* ror${s}${p}.w $Rd, $Rm, $imm */
ARM_t2RORri /* 4155 */, ARM_INS_ROR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ror${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2RORrr /* 4156 */, ARM_INS_ROR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* rrx${s}${p} $Rd, $Rm */
ARM_t2RRX /* 4157 */, ARM_INS_RRX,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* rsb${s}${p}.w $Rd, $Rn, $imm */
ARM_t2RSBri /* 4158 */, ARM_INS_RSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* rsb${s}${p} $Rd, $Rn, $Rm */
ARM_t2RSBrr /* 4159 */, ARM_INS_RSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* rsb${s}${p} $Rd, $Rn, $ShiftedRm */
ARM_t2RSBrs /* 4160 */, ARM_INS_RSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sadd16${p} $Rd, $Rn, $Rm */
ARM_t2SADD16 /* 4161 */, ARM_INS_SADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* sadd8${p} $Rd, $Rn, $Rm */
ARM_t2SADD8 /* 4162 */, ARM_INS_SADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* sasx${p} $Rd, $Rn, $Rm */
ARM_t2SASX /* 4163 */, ARM_INS_SASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* sb */
ARM_t2SB /* 4164 */, ARM_INS_SB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasSB, 0 }, 0, 0
#endif
},
{
/* sbc${s}${p} $Rd, $Rn, $imm */
ARM_t2SBCri /* 4165 */, ARM_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sbc${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2SBCrr /* 4166 */, ARM_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sbc${s}${p}.w $Rd, $Rn, $ShiftedRm */
ARM_t2SBCrs /* 4167 */, ARM_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sbfx${p} $Rd, $Rn, $lsb, $msb */
ARM_t2SBFX /* 4168 */, ARM_INS_SBFX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sdiv${p} $Rd, $Rn, $Rm */
ARM_t2SDIV /* 4169 */, ARM_INS_SDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDivideInThumb, ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* sel${p} $Rd, $Rn, $Rm */
ARM_t2SEL /* 4170 */, ARM_INS_SEL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* setpan $imm */
ARM_t2SETPAN /* 4171 */, ARM_INS_SETPAN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8, ARM_FEATURE_HasV8_1a, 0 }, 0, 0
#endif
},
{
/* sg${p} */
ARM_t2SG /* 4172 */, ARM_INS_SG,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* shadd16${p} $Rd, $Rn, $Rm */
ARM_t2SHADD16 /* 4173 */, ARM_INS_SHADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* shadd8${p} $Rd, $Rn, $Rm */
ARM_t2SHADD8 /* 4174 */, ARM_INS_SHADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* shasx${p} $Rd, $Rn, $Rm */
ARM_t2SHASX /* 4175 */, ARM_INS_SHASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* shsax${p} $Rd, $Rn, $Rm */
ARM_t2SHSAX /* 4176 */, ARM_INS_SHSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* shsub16${p} $Rd, $Rn, $Rm */
ARM_t2SHSUB16 /* 4177 */, ARM_INS_SHSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* shsub8${p} $Rd, $Rn, $Rm */
ARM_t2SHSUB8 /* 4178 */, ARM_INS_SHSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smc${p} $opt */
ARM_t2SMC /* 4179 */, ARM_INS_SMC,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { 0 }, { ARM_GRP_CALL, ARM_FEATURE_IsThumb2, ARM_FEATURE_HasTrustZone, 0 }, 0, 0
#endif
},
{
/* smlabb${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLABB /* 4180 */, ARM_INS_SMLABB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlabt${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLABT /* 4181 */, ARM_INS_SMLABT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlad${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLAD /* 4182 */, ARM_INS_SMLAD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smladx${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLADX /* 4183 */, ARM_INS_SMLADX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlal${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_t2SMLAL /* 4184 */, ARM_INS_SMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* smlalbb${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_t2SMLALBB /* 4185 */, ARM_INS_SMLALBB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlalbt${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_t2SMLALBT /* 4186 */, ARM_INS_SMLALBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlald${p} $Ra, $Rd, $Rn, $Rm */
ARM_t2SMLALD /* 4187 */, ARM_INS_SMLALD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlaldx${p} $Ra, $Rd, $Rn, $Rm */
ARM_t2SMLALDX /* 4188 */, ARM_INS_SMLALDX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlaltb${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_t2SMLALTB /* 4189 */, ARM_INS_SMLALTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlaltt${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_t2SMLALTT /* 4190 */, ARM_INS_SMLALTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlatb${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLATB /* 4191 */, ARM_INS_SMLATB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlatt${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLATT /* 4192 */, ARM_INS_SMLATT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlawb${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLAWB /* 4193 */, ARM_INS_SMLAWB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlawt${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLAWT /* 4194 */, ARM_INS_SMLAWT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlsd${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLSD /* 4195 */, ARM_INS_SMLSD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlsdx${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMLSDX /* 4196 */, ARM_INS_SMLSDX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlsld${p} $Ra, $Rd, $Rn, $Rm */
ARM_t2SMLSLD /* 4197 */, ARM_INS_SMLSLD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smlsldx${p} $Ra, $Rd, $Rn, $Rm */
ARM_t2SMLSLDX /* 4198 */, ARM_INS_SMLSLDX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smmla${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMMLA /* 4199 */, ARM_INS_SMMLA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smmlar${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMMLAR /* 4200 */, ARM_INS_SMMLAR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smmls${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMMLS /* 4201 */, ARM_INS_SMMLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smmlsr${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2SMMLSR /* 4202 */, ARM_INS_SMMLSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smmul${p} $Rd, $Rn, $Rm */
ARM_t2SMMUL /* 4203 */, ARM_INS_SMMUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smmulr${p} $Rd, $Rn, $Rm */
ARM_t2SMMULR /* 4204 */, ARM_INS_SMMULR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smuad${p} $Rd, $Rn, $Rm */
ARM_t2SMUAD /* 4205 */, ARM_INS_SMUAD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smuadx${p} $Rd, $Rn, $Rm */
ARM_t2SMUADX /* 4206 */, ARM_INS_SMUADX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smulbb${p} $Rd, $Rn, $Rm */
ARM_t2SMULBB /* 4207 */, ARM_INS_SMULBB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smulbt${p} $Rd, $Rn, $Rm */
ARM_t2SMULBT /* 4208 */, ARM_INS_SMULBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smull${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_t2SMULL /* 4209 */, ARM_INS_SMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* smultb${p} $Rd, $Rn, $Rm */
ARM_t2SMULTB /* 4210 */, ARM_INS_SMULTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smultt${p} $Rd, $Rn, $Rm */
ARM_t2SMULTT /* 4211 */, ARM_INS_SMULTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smulwb${p} $Rd, $Rn, $Rm */
ARM_t2SMULWB /* 4212 */, ARM_INS_SMULWB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smulwt${p} $Rd, $Rn, $Rm */
ARM_t2SMULWT /* 4213 */, ARM_INS_SMULWT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smusd${p} $Rd, $Rn, $Rm */
ARM_t2SMUSD /* 4214 */, ARM_INS_SMUSD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* smusdx${p} $Rd, $Rn, $Rm */
ARM_t2SMUSDX /* 4215 */, ARM_INS_SMUSDX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* srsdb${p} sp, $mode */
ARM_t2SRSDB /* 4216 */, ARM_INS_SRSDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* srsdb${p} sp!, $mode */
ARM_t2SRSDB_UPD /* 4217 */, ARM_INS_SRSDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* srsia${p} sp, $mode */
ARM_t2SRSIA /* 4218 */, ARM_INS_SRSIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* srsia${p} sp!, $mode */
ARM_t2SRSIA_UPD /* 4219 */, ARM_INS_SRSIA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* ssat${p} $Rd, $sat_imm, $Rn$sh */
ARM_t2SSAT /* 4220 */, ARM_INS_SSAT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* ssat16${p} $Rd, $sat_imm, $Rn */
ARM_t2SSAT16 /* 4221 */, ARM_INS_SSAT16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* ssax${p} $Rd, $Rn, $Rm */
ARM_t2SSAX /* 4222 */, ARM_INS_SSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* ssub16${p} $Rd, $Rn, $Rm */
ARM_t2SSUB16 /* 4223 */, ARM_INS_SSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* ssub8${p} $Rd, $Rn, $Rm */
ARM_t2SSUB8 /* 4224 */, ARM_INS_SSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* stc2l${p} $cop, $CRd, $addr */
ARM_t2STC2L_OFFSET /* 4225 */, ARM_INS_STC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc2l${p} $cop, $CRd, $addr, $option */
ARM_t2STC2L_OPTION /* 4226 */, ARM_INS_STC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc2l${p} $cop, $CRd, $addr, $offset */
ARM_t2STC2L_POST /* 4227 */, ARM_INS_STC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc2l${p} $cop, $CRd, $addr! */
ARM_t2STC2L_PRE /* 4228 */, ARM_INS_STC2L,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc2${p} $cop, $CRd, $addr */
ARM_t2STC2_OFFSET /* 4229 */, ARM_INS_STC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc2${p} $cop, $CRd, $addr, $option */
ARM_t2STC2_OPTION /* 4230 */, ARM_INS_STC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc2${p} $cop, $CRd, $addr, $offset */
ARM_t2STC2_POST /* 4231 */, ARM_INS_STC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc2${p} $cop, $CRd, $addr! */
ARM_t2STC2_PRE /* 4232 */, ARM_INS_STC2,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_PreV8, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stcl${p} $cop, $CRd, $addr */
ARM_t2STCL_OFFSET /* 4233 */, ARM_INS_STCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stcl${p} $cop, $CRd, $addr, $option */
ARM_t2STCL_OPTION /* 4234 */, ARM_INS_STCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stcl${p} $cop, $CRd, $addr, $offset */
ARM_t2STCL_POST /* 4235 */, ARM_INS_STCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stcl${p} $cop, $CRd, $addr! */
ARM_t2STCL_PRE /* 4236 */, ARM_INS_STCL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc${p} $cop, $CRd, $addr */
ARM_t2STC_OFFSET /* 4237 */, ARM_INS_STC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc${p} $cop, $CRd, $addr, $option */
ARM_t2STC_OPTION /* 4238 */, ARM_INS_STC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc${p} $cop, $CRd, $addr, $offset */
ARM_t2STC_POST /* 4239 */, ARM_INS_STC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stc${p} $cop, $CRd, $addr! */
ARM_t2STC_PRE /* 4240 */, ARM_INS_STC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stl${p} $Rt, $addr */
ARM_t2STL /* 4241 */, ARM_INS_STL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* stlb${p} $Rt, $addr */
ARM_t2STLB /* 4242 */, ARM_INS_STLB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* stlex${p} $Rd, $Rt, $addr */
ARM_t2STLEX /* 4243 */, ARM_INS_STLEX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* stlexb${p} $Rd, $Rt, $addr */
ARM_t2STLEXB /* 4244 */, ARM_INS_STLEXB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* stlexd${p} $Rd, $Rt, $Rt2, $addr */
ARM_t2STLEXD /* 4245 */, ARM_INS_STLEXD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* stlexh${p} $Rd, $Rt, $addr */
ARM_t2STLEXH /* 4246 */, ARM_INS_STLEXH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, ARM_FEATURE_HasV7Clrex, 0 }, 0, 0
#endif
},
{
/* stlh${p} $Rt, $addr */
ARM_t2STLH /* 4247 */, ARM_INS_STLH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasAcquireRelease, 0 }, 0, 0
#endif
},
{
/* stmdb${p} $Rn, $regs */
ARM_t2STMDB /* 4248 */, ARM_INS_STMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stmdb${p} $Rn!, $regs */
ARM_t2STMDB_UPD /* 4249 */, ARM_INS_STMDB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stm${p}.w $Rn, $regs */
ARM_t2STMIA /* 4250 */, ARM_INS_STM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* stm${p}.w $Rn!, $regs */
ARM_t2STMIA_UPD /* 4251 */, ARM_INS_STM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strbt${p} $Rt, $addr */
ARM_t2STRBT /* 4252 */, ARM_INS_STRBT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $Rn$offset */
ARM_t2STRB_POST /* 4253 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $addr! */
ARM_t2STRB_PRE /* 4254 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strb${p}.w $Rt, $addr */
ARM_t2STRBi12 /* 4255 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $addr */
ARM_t2STRBi8 /* 4256 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strb${p}.w $Rt, $addr */
ARM_t2STRBs /* 4257 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strd${p} $Rt, $Rt2, $addr$imm */
ARM_t2STRD_POST /* 4258 */, ARM_INS_STRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strd${p} $Rt, $Rt2, $addr! */
ARM_t2STRD_PRE /* 4259 */, ARM_INS_STRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strd${p} $Rt, $Rt2, $addr */
ARM_t2STRDi8 /* 4260 */, ARM_INS_STRD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strex${p} $Rd, $Rt, $addr */
ARM_t2STREX /* 4261 */, ARM_INS_STREX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* strexb${p} $Rd, $Rt, $addr */
ARM_t2STREXB /* 4262 */, ARM_INS_STREXB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* strexd${p} $Rd, $Rt, $Rt2, $addr */
ARM_t2STREXD /* 4263 */, ARM_INS_STREXD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* strexh${p} $Rd, $Rt, $addr */
ARM_t2STREXH /* 4264 */, ARM_INS_STREXH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* strht${p} $Rt, $addr */
ARM_t2STRHT /* 4265 */, ARM_INS_STRHT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strh${p} $Rt, $Rn$offset */
ARM_t2STRH_POST /* 4266 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strh${p} $Rt, $addr! */
ARM_t2STRH_PRE /* 4267 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strh${p}.w $Rt, $addr */
ARM_t2STRHi12 /* 4268 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strh${p} $Rt, $addr */
ARM_t2STRHi8 /* 4269 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strh${p}.w $Rt, $addr */
ARM_t2STRHs /* 4270 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* strt${p} $Rt, $addr */
ARM_t2STRT /* 4271 */, ARM_INS_STRT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $Rn$offset */
ARM_t2STR_POST /* 4272 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr! */
ARM_t2STR_PRE /* 4273 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* str${p}.w $Rt, $addr */
ARM_t2STRi12 /* 4274 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr */
ARM_t2STRi8 /* 4275 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* str${p}.w $Rt, $addr */
ARM_t2STRs /* 4276 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* subs${p} pc, lr, $imm */
ARM_t2SUBS_PC_LR /* 4277 */, ARM_INS_SUBS,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_JUMP, ARM_GRP_RET, ARM_FEATURE_IsThumb2, ARM_FEATURE_IsNotMClass, 0 }, 1, 0
#endif
},
{
/* sub${s}${p}.w $Rd, $Rn, $imm */
ARM_t2SUBri /* 4278 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* subw${p} $Rd, $Rn, $imm */
ARM_t2SUBri12 /* 4279 */, ARM_INS_SUBW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sub${s}${p}.w $Rd, $Rn, $Rm */
ARM_t2SUBrr /* 4280 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sub${s}${p}.w $Rd, $Rn, $ShiftedRm */
ARM_t2SUBrs /* 4281 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sub${s}${p}.w $Rd, $Rn, $imm */
ARM_t2SUBspImm /* 4282 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* subw${p} $Rd, $Rn, $imm */
ARM_t2SUBspImm12 /* 4283 */, ARM_INS_SUBW,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sxtab${p} $Rd, $Rn, $Rm$rot */
ARM_t2SXTAB /* 4284 */, ARM_INS_SXTAB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sxtab16${p} $Rd, $Rn, $Rm$rot */
ARM_t2SXTAB16 /* 4285 */, ARM_INS_SXTAB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sxtah${p} $Rd, $Rn, $Rm$rot */
ARM_t2SXTAH /* 4286 */, ARM_INS_SXTAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sxtb${p}.w $Rd, $Rm$rot */
ARM_t2SXTB /* 4287 */, ARM_INS_SXTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sxtb16${p} $Rd, $Rm$rot */
ARM_t2SXTB16 /* 4288 */, ARM_INS_SXTB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* sxth${p}.w $Rd, $Rm$rot */
ARM_t2SXTH /* 4289 */, ARM_INS_SXTH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* tbb${p} $addr */
ARM_t2TBB /* 4290 */, ARM_INS_TBB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_FEATURE_IsThumb2, 0 }, 1, 1
#endif
},
{
/* tbh${p} $addr */
ARM_t2TBH /* 4291 */, ARM_INS_TBH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_FEATURE_IsThumb2, 0 }, 1, 1
#endif
},
{
/* teq${p}.w $Rn, $imm */
ARM_t2TEQri /* 4292 */, ARM_INS_TEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* teq${p}.w $Rn, $Rm */
ARM_t2TEQrr /* 4293 */, ARM_INS_TEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* teq${p}.w $Rn, $ShiftedRm */
ARM_t2TEQrs /* 4294 */, ARM_INS_TEQ,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* tsb${p} $opt */
ARM_t2TSB /* 4295 */, ARM_INS_TSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8_4a, 0 }, 0, 0
#endif
},
{
/* tst${p}.w $Rn, $imm */
ARM_t2TSTri /* 4296 */, ARM_INS_TST,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* tst${p}.w $Rn, $Rm */
ARM_t2TSTrr /* 4297 */, ARM_INS_TST,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* tst${p}.w $Rn, $ShiftedRm */
ARM_t2TSTrs /* 4298 */, ARM_INS_TST,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* tt${p} $Rt, $Rn */
ARM_t2TT /* 4299 */, ARM_INS_TT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* tta${p} $Rt, $Rn */
ARM_t2TTA /* 4300 */, ARM_INS_TTA,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* ttat${p} $Rt, $Rn */
ARM_t2TTAT /* 4301 */, ARM_INS_TTAT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* ttt${p} $Rt, $Rn */
ARM_t2TTT /* 4302 */, ARM_INS_TTT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* uadd16${p} $Rd, $Rn, $Rm */
ARM_t2UADD16 /* 4303 */, ARM_INS_UADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uadd8${p} $Rd, $Rn, $Rm */
ARM_t2UADD8 /* 4304 */, ARM_INS_UADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uasx${p} $Rd, $Rn, $Rm */
ARM_t2UASX /* 4305 */, ARM_INS_UASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* ubfx${p} $Rd, $Rn, $lsb, $msb */
ARM_t2UBFX /* 4306 */, ARM_INS_UBFX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* udf.w $imm16 */
ARM_t2UDF /* 4307 */, ARM_INS_UDF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* udiv${p} $Rd, $Rn, $Rm */
ARM_t2UDIV /* 4308 */, ARM_INS_UDIV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDivideInThumb, ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 0, 0
#endif
},
{
/* uhadd16${p} $Rd, $Rn, $Rm */
ARM_t2UHADD16 /* 4309 */, ARM_INS_UHADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uhadd8${p} $Rd, $Rn, $Rm */
ARM_t2UHADD8 /* 4310 */, ARM_INS_UHADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uhasx${p} $Rd, $Rn, $Rm */
ARM_t2UHASX /* 4311 */, ARM_INS_UHASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uhsax${p} $Rd, $Rn, $Rm */
ARM_t2UHSAX /* 4312 */, ARM_INS_UHSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uhsub16${p} $Rd, $Rn, $Rm */
ARM_t2UHSUB16 /* 4313 */, ARM_INS_UHSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uhsub8${p} $Rd, $Rn, $Rm */
ARM_t2UHSUB8 /* 4314 */, ARM_INS_UHSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* umaal${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_t2UMAAL /* 4315 */, ARM_INS_UMAAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* umlal${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_t2UMLAL /* 4316 */, ARM_INS_UMLAL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* umull${p} $RdLo, $RdHi, $Rn, $Rm */
ARM_t2UMULL /* 4317 */, ARM_INS_UMULL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* uqadd16${p} $Rd, $Rn, $Rm */
ARM_t2UQADD16 /* 4318 */, ARM_INS_UQADD16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uqadd8${p} $Rd, $Rn, $Rm */
ARM_t2UQADD8 /* 4319 */, ARM_INS_UQADD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uqasx${p} $Rd, $Rn, $Rm */
ARM_t2UQASX /* 4320 */, ARM_INS_UQASX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uqsax${p} $Rd, $Rn, $Rm */
ARM_t2UQSAX /* 4321 */, ARM_INS_UQSAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uqsub16${p} $Rd, $Rn, $Rm */
ARM_t2UQSUB16 /* 4322 */, ARM_INS_UQSUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uqsub8${p} $Rd, $Rn, $Rm */
ARM_t2UQSUB8 /* 4323 */, ARM_INS_UQSUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* usad8${p} $Rd, $Rn, $Rm */
ARM_t2USAD8 /* 4324 */, ARM_INS_USAD8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* usada8${p} $Rd, $Rn, $Rm, $Ra */
ARM_t2USADA8 /* 4325 */, ARM_INS_USADA8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* usat${p} $Rd, $sat_imm, $Rn$sh */
ARM_t2USAT /* 4326 */, ARM_INS_USAT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* usat16${p} $Rd, $sat_imm, $Rn */
ARM_t2USAT16 /* 4327 */, ARM_INS_USAT16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* usax${p} $Rd, $Rn, $Rm */
ARM_t2USAX /* 4328 */, ARM_INS_USAX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* usub16${p} $Rd, $Rn, $Rm */
ARM_t2USUB16 /* 4329 */, ARM_INS_USUB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* usub8${p} $Rd, $Rn, $Rm */
ARM_t2USUB8 /* 4330 */, ARM_INS_USUB8,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, ARM_FEATURE_HasDSP, 0 }, 0, 0
#endif
},
{
/* uxtab${p} $Rd, $Rn, $Rm$rot */
ARM_t2UXTAB /* 4331 */, ARM_INS_UXTAB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* uxtab16${p} $Rd, $Rn, $Rm$rot */
ARM_t2UXTAB16 /* 4332 */, ARM_INS_UXTAB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* uxtah${p} $Rd, $Rn, $Rm$rot */
ARM_t2UXTAH /* 4333 */, ARM_INS_UXTAH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* uxtb${p}.w $Rd, $Rm$rot */
ARM_t2UXTB /* 4334 */, ARM_INS_UXTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* uxtb16${p} $Rd, $Rm$rot */
ARM_t2UXTB16 /* 4335 */, ARM_INS_UXTB16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_HasDSP, ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* uxth${p}.w $Rd, $Rm$rot */
ARM_t2UXTH /* 4336 */, ARM_INS_UXTH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb2, 0 }, 0, 0
#endif
},
{
/* wls $LR, $Rn, $label */
ARM_t2WLS /* 4337 */, ARM_INS_WLS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb2, ARM_FEATURE_HasV8_1MMainline, ARM_FEATURE_HasLOB, 0 }, 1, 0
#endif
},
{
/* adc${s}${p} $Rdn, $Rm */
ARM_tADC /* 4338 */, ARM_INS_ADC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* add${p} $Rdn, $Rm */
ARM_tADDhirr /* 4339 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* add${s}${p} $Rd, $Rm, $imm3 */
ARM_tADDi3 /* 4340 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* add${s}${p} $Rdn, $imm8 */
ARM_tADDi8 /* 4341 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* add${p} $Rdn, $sp, $Rn */
ARM_tADDrSP /* 4342 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* add${p} $dst, $sp, $imm */
ARM_tADDrSPi /* 4343 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* add${s}${p} $Rd, $Rn, $Rm */
ARM_tADDrr /* 4344 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* add${p} $Rdn, $imm */
ARM_tADDspi /* 4345 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* add${p} $Rdn, $Rm */
ARM_tADDspr /* 4346 */, ARM_INS_ADD,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* adr{$p} $Rd, $addr */
ARM_tADR /* 4347 */, ARM_INS_ADR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* and${s}${p} $Rdn, $Rm */
ARM_tAND /* 4348 */, ARM_INS_AND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* asr${s}${p} $Rd, $Rm, $imm5 */
ARM_tASRri /* 4349 */, ARM_INS_ASR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* asr${s}${p} $Rdn, $Rm */
ARM_tASRrr /* 4350 */, ARM_INS_ASR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* b${p} $target */
ARM_tB /* 4351 */, ARM_INS_B,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb, 0 }, 1, 0
#endif
},
{
/* bic${s}${p} $Rdn, $Rm */
ARM_tBIC /* 4352 */, ARM_INS_BIC,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* bkpt $val */
ARM_tBKPT /* 4353 */, ARM_INS_BKPT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* bl${p} $func */
ARM_tBL /* 4354 */, ARM_INS_BL,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_CALL, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* blxns${p} $func */
ARM_tBLXNSr /* 4355 */, ARM_INS_BLXNS,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_CALL, ARM_FEATURE_IsThumb, ARM_FEATURE_Has8MSecExt, 0 }, 0, 0
#endif
},
{
/* blx${p} $func */
ARM_tBLXi /* 4356 */, ARM_INS_BLX,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_CALL, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb, ARM_FEATURE_HasV5T, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* blx${p} $func */
ARM_tBLXr /* 4357 */, ARM_INS_BLX,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_CALL, ARM_FEATURE_IsThumb, ARM_FEATURE_HasV5T, 0 }, 0, 0
#endif
},
{
/* bx${p} $Rm */
ARM_tBX /* 4358 */, ARM_INS_BX,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_FEATURE_IsThumb, 0 }, 1, 1
#endif
},
{
/* bxns${p} $Rm */
ARM_tBXNS /* 4359 */, ARM_INS_BXNS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_FEATURE_IsThumb, ARM_FEATURE_Has8MSecExt, 0 }, 1, 1
#endif
},
{
/* b${p} $target */
ARM_tBcc /* 4360 */, ARM_INS_B,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb, 0 }, 1, 0
#endif
},
{
/* cbnz $Rn, $target */
ARM_tCBNZ /* 4361 */, ARM_INS_CBNZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 1, 0
#endif
},
{
/* cbz $Rn, $target */
ARM_tCBZ /* 4362 */, ARM_INS_CBZ,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_BRANCH_RELATIVE, ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8MBaseline, 0 }, 1, 0
#endif
},
{
/* cmn${p} $Rn, $Rm */
ARM_tCMNz /* 4363 */, ARM_INS_CMN,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* cmp${p} $Rn, $Rm */
ARM_tCMPhir /* 4364 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* cmp${p} $Rn, $imm8 */
ARM_tCMPi8 /* 4365 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* cmp${p} $Rn, $Rm */
ARM_tCMPr /* 4366 */, ARM_INS_CMP,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* cps$imod $iflags */
ARM_tCPS /* 4367 */, ARM_INS_CPS,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* eor${s}${p} $Rdn, $Rm */
ARM_tEOR /* 4368 */, ARM_INS_EOR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* hint${p} $imm */
ARM_tHINT /* 4369 */, ARM_INS_HINT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV6M, 0 }, 0, 0
#endif
},
{
/* hlt $val */
ARM_tHLT /* 4370 */, ARM_INS_HLT,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV8, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tInt_WIN_eh_sjlj_longjmp /* 4371 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tInt_eh_sjlj_longjmp /* 4372 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tInt_eh_sjlj_setjmp /* 4373 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* ldm${p} $Rn, $regs */
ARM_tLDMIA /* 4374 */, ARM_INS_LDM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr */
ARM_tLDRBi /* 4375 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldrb${p} $Rt, $addr */
ARM_tLDRBr /* 4376 */, ARM_INS_LDRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldrh${p} $Rt, $addr */
ARM_tLDRHi /* 4377 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldrh${p} $Rt, $addr */
ARM_tLDRHr /* 4378 */, ARM_INS_LDRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldrsb${p} $Rt, $addr */
ARM_tLDRSB /* 4379 */, ARM_INS_LDRSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldrsh${p} $Rt, $addr */
ARM_tLDRSH /* 4380 */, ARM_INS_LDRSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr */
ARM_tLDRi /* 4381 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr */
ARM_tLDRpci /* 4382 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr */
ARM_tLDRr /* 4383 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* ldr${p} $Rt, $addr */
ARM_tLDRspi /* 4384 */, ARM_INS_LDR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* lsl${s}${p} $Rd, $Rm, $imm5 */
ARM_tLSLri /* 4385 */, ARM_INS_LSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* lsl${s}${p} $Rdn, $Rm */
ARM_tLSLrr /* 4386 */, ARM_INS_LSL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* lsr${s}${p} $Rd, $Rm, $imm5 */
ARM_tLSRri /* 4387 */, ARM_INS_LSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* lsr${s}${p} $Rdn, $Rm */
ARM_tLSRrr /* 4388 */, ARM_INS_LSR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* movs $Rd, $Rm */
ARM_tMOVSr /* 4389 */, ARM_INS_MOVS,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* mov${s}${p} $Rd, $imm8 */
ARM_tMOVi8 /* 4390 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* mov${p} $Rd, $Rm */
ARM_tMOVr /* 4391 */, ARM_INS_MOV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* mul${s}${p} $Rd, $Rn, $Rm */
ARM_tMUL /* 4392 */, ARM_INS_MUL,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* mvn${s}${p} $Rd, $Rn */
ARM_tMVN /* 4393 */, ARM_INS_MVN,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* orr${s}${p} $Rdn, $Rm */
ARM_tORR /* 4394 */, ARM_INS_ORR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* <No AsmString> */
ARM_tPICADD /* 4395 */, ARM_INS_INVALID,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { 0 }, 0, 0
#endif
},
{
/* pop${p} $regs */
ARM_tPOP /* 4396 */, ARM_INS_POP,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* push${p} $regs */
ARM_tPUSH /* 4397 */, ARM_INS_PUSH,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* rev${p} $Rd, $Rm */
ARM_tREV /* 4398 */, ARM_INS_REV,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* rev16${p} $Rd, $Rm */
ARM_tREV16 /* 4399 */, ARM_INS_REV16,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* revsh${p} $Rd, $Rm */
ARM_tREVSH /* 4400 */, ARM_INS_REVSH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* ror${s}${p} $Rdn, $Rm */
ARM_tROR /* 4401 */, ARM_INS_ROR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* rsb${s}${p} $Rd, $Rn, #0 */
ARM_tRSB /* 4402 */, ARM_INS_RSB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* sbc${s}${p} $Rdn, $Rm */
ARM_tSBC /* 4403 */, ARM_INS_SBC,
#ifndef CAPSTONE_DIET
{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* setend $end */
ARM_tSETEND /* 4404 */, ARM_INS_SETEND,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_IsNotMClass, 0 }, 0, 0
#endif
},
{
/* stm${p} $Rn!, $regs */
ARM_tSTMIA_UPD /* 4405 */, ARM_INS_STM,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $addr */
ARM_tSTRBi /* 4406 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* strb${p} $Rt, $addr */
ARM_tSTRBr /* 4407 */, ARM_INS_STRB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* strh${p} $Rt, $addr */
ARM_tSTRHi /* 4408 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* strh${p} $Rt, $addr */
ARM_tSTRHr /* 4409 */, ARM_INS_STRH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr */
ARM_tSTRi /* 4410 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr */
ARM_tSTRr /* 4411 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* str${p} $Rt, $addr */
ARM_tSTRspi /* 4412 */, ARM_INS_STR,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* sub${s}${p} $Rd, $Rm, $imm3 */
ARM_tSUBi3 /* 4413 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* sub${s}${p} $Rdn, $imm8 */
ARM_tSUBi8 /* 4414 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* sub${s}${p} $Rd, $Rn, $Rm */
ARM_tSUBrr /* 4415 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* sub${p} $Rdn, $imm */
ARM_tSUBspi /* 4416 */, ARM_INS_SUB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* svc${p} $imm */
ARM_tSVC /* 4417 */, ARM_INS_SVC,
#ifndef CAPSTONE_DIET
{ ARM_REG_SP, 0 }, { 0 }, { ARM_GRP_CALL, ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* sxtb${p} $Rd, $Rm */
ARM_tSXTB /* 4418 */, ARM_INS_SXTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* sxth${p} $Rd, $Rm */
ARM_tSXTH /* 4419 */, ARM_INS_SXTH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* trap */
ARM_tTRAP /* 4420 */, ARM_INS_TRAP,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* tst${p} $Rn, $Rm */
ARM_tTST /* 4421 */, ARM_INS_TST,
#ifndef CAPSTONE_DIET
{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* udf $imm8 */
ARM_tUDF /* 4422 */, ARM_INS_UDF,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},
{
/* uxtb${p} $Rd, $Rm */
ARM_tUXTB /* 4423 */, ARM_INS_UXTB,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* uxth${p} $Rd, $Rm */
ARM_tUXTH /* 4424 */, ARM_INS_UXTH,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, ARM_FEATURE_HasV6, 0 }, 0, 0
#endif
},
{
/* __brkdiv0 */
ARM_t__brkdiv0 /* 4425 */, ARM_INS___BRKDIV0,
#ifndef CAPSTONE_DIET
{ 0 }, { 0 }, { ARM_FEATURE_IsThumb, 0 }, 0, 0
#endif
},