| 2017-06-20 Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| Backport from mainline |
| 2017-04-24 Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * config/tc-arm.c (move_or_literal_pool): Remove code generating MOVS. |
| Forbid MOV.W and MOVW if destination is SP or PC. |
| * testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s: Explain |
| expectation of LDR not generating a MOVS for low registers and small |
| constants. Add tests of MOVW generation. |
| * testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: Update |
| expected disassembly. |
| |
| 2017-06-20 Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| Backport from mainline |
| 2017-05-08 Thomas Preud'homme <thomas.preudhomme@arm.com> |
| |
| * testsuite/ld-arm/arm-elf.exp |
| (Secure gateway import library generation): Check e_type field |
| of import library and executable produced. |
| * testsuite/ld-arm/cmse-implib.type: Expectations for e_type field. |
| |
| 2017-06-05 Alan Modra <amodra@gmail.com> |
| |
| Apply from master |
| 2017-03-15 Nick Clifton <nickc@redhat.com> |
| * config/tc-riscv.c (riscv_pre_output_hook): Fix compile time |
| warning about discarding a const qualifier. |
| |
| 2017-04-03 Palmer Dabbelt <palmer@dabbelt.com> |
| |
| * config/tc-riscv.c (riscv_clear_subsets): Cast argument to free to |
| avoid const warnings. |
| |
| 2017-03-30 Palmer Dabbelt <palmer@dabbelt.com> |
| |
| * config/tc-riscv.c (riscv_clear_subsets): New function. |
| (riscv_add_subset): Call riscv_clear_subsets and riscv_set_rvc to |
| clear RVC when it's been previously set. |
| |
| 2017-03-21 Palmer Dabbbelt <palmer@dabbelt.com> |
| |
| * config/tc-riscv.c (md_show_usage): Remove defuct -m32, -m64, |
| -msoft-float, -mhard-float, -mno-rvc, and -mrvc options; and don't |
| print an invalid default ISA string. |
| * doc/c-riscv.texi (OPTIONS): Add -fpic and -fno-pic options. |
| |
| 2017-03-14 Kito Cheng <kito.cheng@gmail.com> |
| |
| * config/tc-riscv.c (validate_riscv_insn): Add 'o' RVC immediate |
| encoding format, which can accept 0-valued immediates. |
| (riscv_ip): Likewise. |
| |
| 2017-03-02 Kuan-Lin Chen <rufus@andestech.com> |
| |
| * config/tc-riscv.h (HWARD2_USE_FIXED_ADVANCE_PC): New define. |
| |
| 2017-03-02 Kuan-Lin Chen <rufus@andestech.com> |
| |
| * config/tc-riscv.c (md_apply_fix): Set fx_frag and |
| fx_next->fx_frag for CFA_advance_loc relocations. |
| |
| 2017-03-02 Kuan-Lin Chen <rufus@andestech.com> |
| |
| * config/tc-riscv.c (md_apply_fix): Compute the correct offsets |
| for CFA relocations. |
| |
| 2017-03-27 Alan Modra <amodra@gmail.com> |
| |
| PR 21303 |
| * testsuite/gas/ppc/pr21303.d, |
| * testsuite/gas/ppc/pr21303.s: New test |
| * testsuite/gas/ppc/ppc.exp: Run it. |
| |
| 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> |
| |
| Backport from mainline |
| 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> |
| |
| * config/tc-s390.c (s390_parse_cpu): Remove S390_INSTR_FLAG_VX2 |
| from cpu_table. Remove vx2, and novx2 from cpu_flags. |
| |
| 2017-03-08 Peter Bergner <bergner@vnet.ibm.com> |
| |
| * testsuite/gas/ppc/altivec2.d (as): Use the -mpower8 option. |
| (objdump): Use the -Mpower8 option. |
| |
| 2017-03-08 Peter Bergner <bergner@vnet.ibm.com> |
| |
| Apply from master. |
| 2017-03-08 Peter Bergner <bergner@vnet.ibm.com> |
| * testsuite/gas/ppc/power9.d <lnia> New test. |
| * testsuite/gas/ppc/power9.s: Likewise. |
| |
| 2017-03-02 Tristan Gingold <gingold@adacore.com> |
| |
| * configure: Regenerate. |
| |
| 2017-03-02 Tristan Gingold <gingold@adacore.com> |
| |
| * configure: Regenerate. |
| |
| 2017-02-28 Alan Modra <amodra@gmail.com> |
| |
| * config/tc-nios2.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define. |
| |
| 2017-02-28 Alan Modra <amodra@gmail.com> |
| |
| * config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis. |
| (md_apply_fix): Remove fx_subsy check. Move code converting to |
| pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA. Remove code |
| emiiting errors on seeing fx_pcrel set on unexpected relocs, as |
| that is done now by the generic code via.. |
| * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define. |
| (TC_VALIDATE_FIX_SUB): Define. |
| |
| 2017-02-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/c-aarch64.texi: Document that sve implies fp16, simd and compnum. |
| * config/tc-aarch64.c (parse_vector_type_for_operand): Allow .q |
| to be used with SVE registers. |
| (parse_operands): Handle new SVE operands. |
| (aarch64_features): Make "sve" require F16 rather than FP. Also |
| require COMPNUM. |
| * testsuite/gas/aarch64/sve.s: Add tests for new instructions. |
| Include compnum tests. |
| * testsuite/gas/aarch64/sve.d: Update accordingly. |
| * testsuite/gas/aarch64/sve-invalid.s: Add tests for new instructions. |
| * testsuite/gas/aarch64/sve-invalid.l: Update accordingly. Also |
| update expected output for new FMOV and MOV alternatives. |
| |
| 2017-02-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/c-aarch64.texi: Add a "compnum" entry. |
| * config/tc-aarch64.c (aarch64_features): Likewise, |
| * testsuite/gas/aarch64/advsimd-compnum.s: New test. |
| * testsuite/gas/aarch64/advsimd-compnum.d: Likewise. |
| |
| 2017-02-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * testsuite/gas/aarch64/sve-sysreg.s, |
| testsuite/gas/aarch64/sve-sysreg.d, |
| testsuite/gas/aarch64/sve-sysreg-invalid.d, |
| testsuite/gas/aarch64/sve-sysreg-invalid.l: New tests. |
| |
| 2017-02-27 Richard Sandiford <richard.sandiford@arm.com> |
| |
| * doc/c-aarch64.texi: Fix sve entry. |
| |
| 2017-02-27 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| * config/tc-aarch64.c (aarch64_features): Add rcpc. |
| * doc/c-aarch64.texi (AArch64 Extensions): Document rcpc. |
| * testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ... |
| * testsuite/gas/aarch64/ldst-rcpc.d: This. |
| * testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ... |
| * testsuite/gas/aarch64/ldst-rcpc.s: This. |
| * testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test. |
| |
| 2017-02-14 Alan Modra <amodra@gmail.com> |
| |
| * testsuite/gas/ppc/cell.s: Correct invalid registers. |
| * testsuite/gas/ppc/vle-simple-1.s: Likewise. |
| * testsuite/gas/ppc/vle-simple-2.s: Likewise. |
| |
| 2017-02-10 Nicholas Piggin <npiggin@gmail.com> |
| |
| * testsuite/gas/ppc/power9.d <scv, rfscv>: New tests. |
| |
| 2017-01-30 Maciej W. Rozycki <macro@imgtec.com> |
| |
| * config/tc-mips.c (mips_ignore_branch_isa): New variable. |
| (options): Add OPTION_IGNORE_BRANCH_ISA and |
| OPTION_NO_IGNORE_BRANCH_ISA enum values. |
| (md_longopts): Add "mignore-branch-isa" and |
| "mno-ignore-branch-isa" options. |
| (md_parse_option): Handle OPTION_IGNORE_BRANCH_ISA and |
| OPTION_NO_IGNORE_BRANCH_ISA. |
| (fix_bad_cross_mode_branch_p): Return FALSE if |
| `mips_ignore_branch_isa' has been set. |
| (md_show_usage): Add `-mignore-branch-isa' and |
| `-mno-ignore-branch-isa'. |
| |
| * doc/as.texinfo (Target MIPS options): Add |
| `-mignore-branch-isa' and `-mno-ignore-branch-isa' options. |
| (-mignore-branch-isa, -mno-ignore-branch-isa): New options. |
| * doc/c-mips.texi (MIPS Options): Add `-mignore-branch-isa' and |
| `-mno-ignore-branch-isa' options. |
| |
| * testsuite/gas/mips/branch-local-ignore-2.d: New test. |
| * testsuite/gas/mips/branch-local-ignore-3.d: New test. |
| * testsuite/gas/mips/branch-local-ignore-n32-2.d: New test. |
| * testsuite/gas/mips/branch-local-ignore-n32-3.d: New test. |
| * testsuite/gas/mips/branch-local-ignore-n64-2.d: New test. |
| * testsuite/gas/mips/branch-local-ignore-n64-3.d: New test. |
| * testsuite/gas/mips/mips.exp: Run the new tests. |
| |
| 2017-01-30 Maciej W. Rozycki <macro@imgtec.com> |
| |
| * testsuite/gas/mips/branch-local-2.d: New test. |
| * testsuite/gas/mips/branch-local-3.d: New test. |
| * testsuite/gas/mips/branch-local-n32-2.d: New test. |
| * testsuite/gas/mips/branch-local-n32-3.d: New test. |
| * testsuite/gas/mips/branch-local-n64-2.d: New test. |
| * testsuite/gas/mips/branch-local-n64-3.d: New test. |
| * testsuite/gas/mips/mips.exp: Fold corresponding list tests |
| into the new tests. |
| |
| 2017-01-24 Sebastian Huber <sebastian.huber@embedded-brains.de> |
| |
| * configure.tgt (riscv*-*-*): Remove em=linux. |
| |
| 2017-01-18 Maciej W. Rozycki <macro@imgtec.com> |
| |
| PR gas/20649 |
| * config/tc-mips.c (pic_need_relax): Don't check for linkonce |
| symbols, remove the `segtype' parameter. |
| (mips_frob_file, md_estimate_size_before_relax): Adjust |
| accordingly. |
| (s_is_linkonce): Add an explanatory comment. |
| * testsuite/gas/mips/comdat-reloc.d: New test. |
| * testsuite/gas/mips/comdat-reloc.s: New test source. |
| * testsuite/gas/mips/mips.exp: Run the new test. |
| |
| 2017-01-18 Bernhard Rosenkranzer <bero@lindev.ch> |
| |
| PR 21059 |
| * config/bfin-lex.l: Support processing with flex 2.6.3. |
| * itbl-lex.l: Likewise. |
| |
| 2017-01-12 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
| |
| * config/tc-i386.c (cpu_arch): Add .avx512_vpopcntdq. |
| (cpu_noarch): Add noavx512_vpopcntdq. |
| * doc/c-i386.texi: Document avx512_vpopcntdq, noavx512_vpopcntdq. |
| * testsuite/gas/i386/i386.exp: Run AVX512_VPOPCNTDQ tests. |
| * testsuite/gas/i386/avx512_vpopcntdqd-intel.d: New file. |
| * testsuite/gas/i386/avx512_vpopcntdqd.d: Ditto. |
| * testsuite/gas/i386/avx512_vpopcntdqd.s: Ditto. |
| * testsuite/gas/i386/x86-64-avx512_vpopcntdqd-intel.d: Ditto. |
| * testsuite/gas/i386/x86-64-avx512_vpopcntdqd.d: Ditto. |
| * testsuite/gas/i386/x86-64-avx512_vpopcntdqd.s: Ditto. |
| |
| 2017-01-09 Andrew Waterman <andrew@sifive.com> |
| |
| * config/tc-riscv.c (append_insn): Don't eagerly apply relocations |
| against constants. |
| (md_apply_fix): Mark relocations against constants as "done." |
| |
| 2017-01-09 Andrew Waterman <andrew@sifive.com> |
| |
| * config/tc-riscv.c (append_insn): Don't eagerly apply relocations |
| against constants. |
| (md_apply_fix): Mark relocations against constants as "done." |
| |
| 2017-01-09 Palmer Dabbelt <palmer@dabbelt.com> |
| Kito Cheng <kito.cheng@gmail.com> |
| |
| * emulparams/elf32lriscv-defs.sh (INITIAL_READONLY_SECTIONS): |
| Removed. |
| (SDATA_START_SYMBOLS): Likewise. |
| |
| 2017-01-09 Andrew Waterman <andrew@sifive.com> |
| |
| * config/tc-riscv.c (relaxed_branch_length): Use the long |
| sequence when the target is a weak symbol. |
| |
| 2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com> |
| |
| * config/tc-aarch64.c (aarch64_features): Add rcpc. |
| * doc/c-aarch64.texi (AArch64 Extensions): Document rcpc. |
| * testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ... |
| * testsuite/gas/aarch64/ldst-rcpc.d: This. |
| * testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ... |
| * testsuite/gas/aarch64/ldst-rcpc.s: This. |
| * testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test. |
| |
| 2017-01-04 Norm Jacobs <norm.jacobs@oracle.com> |
| |
| PR gas/20992 |
| * configure.tgt: Treat sparcv9 as sparc64. |
| |
| 2017-01-03 Kito Cheng <kito.cheng@gmail.com> |
| |
| * config/tc-riscv.c (riscv_set_arch): Whitelist the "q" ISA |
| extension. |
| (riscv_after_parse_args): Set FLOAT_ABI_QUAD when the Q ISA is |
| enabled and no other ABI is specified. |
| |
| 2017-01-03 Dimitar Dimitrov <dimitar@dinux.eu> |
| |
| * config/tc-pru.c (md_number_to_chars): Fix parameter to be |
| valueT, as declared in tc.h. |
| (md_apply_fix): Fix to work on 32-bit hosts. |
| >>>>>>> 0115611... RISC-V/GAS: Correct branch relaxation for weak symbols. |
| |
| 2017-01-02 Alan Modra <amodra@gmail.com> |
| |
| Update year range in copyright notice of all files. |
| |
| For older changes see ChangeLog-2016 |
| |
| Copyright (C) 2017 Free Software Foundation, Inc. |
| |
| Copying and distribution of this file, with or without modification, |
| are permitted in any medium without royalty provided the copyright |
| notice and this notice are preserved. |
| |
| Local Variables: |
| mode: change-log |
| left-margin: 8 |
| fill-column: 74 |
| version-control: never |
| End: |
