blob: db49e3d478d0fe5633018c7989994650da920c84 [file] [log] [blame]
/* Simulator model support for m32rxf.
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright 1996-2016 Free Software Foundation, Inc.
This file is part of the GNU simulators.
This file is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
It is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#define WANT_CPU m32rxf
#define WANT_CPU_M32RXF
#include "sim-main.h"
/* The profiling data is recorded here, but is accessed via the profiling
mechanism. After all, this is information for profiling. */
#if WITH_PROFILE_MODEL_P
/* Model handlers for each insn. */
static int
model_m32rx_add (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_add3 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_and (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_and3 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_and3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_or (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_or3 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_and3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_xor (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_xor3 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_and3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_addi (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addi.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_addv (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_addv3 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_addx (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bc8 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl8.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bc24 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl24.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_beq (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_beq.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_beqz (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_beq.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src2 = FLD (in_src2);
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bgez (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_beq.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src2 = FLD (in_src2);
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bgtz (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_beq.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src2 = FLD (in_src2);
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_blez (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_beq.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src2 = FLD (in_src2);
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bltz (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_beq.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src2 = FLD (in_src2);
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bnez (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_beq.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src2 = FLD (in_src2);
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bl8 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl8.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bl24 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl24.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bcl8 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl8.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bcl24 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl24.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bnc8 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl8.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bnc24 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl24.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bne (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_beq.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bra8 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl8.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bra24 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl24.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bncl8 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl8.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_bncl24 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_bl24.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_cmp (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_cmpi (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_d.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src2 = FLD (in_src2);
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_cmpu (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_cmpui (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_d.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src2 = FLD (in_src2);
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_cmpeq (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_cmpz (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src2 = FLD (in_src2);
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_div (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_divu (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_rem (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_remu (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_divh (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_jc (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_jl.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
in_sr = FLD (in_sr);
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_jnc (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_jl.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
in_sr = FLD (in_sr);
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_jl (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_jl.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
in_sr = FLD (in_sr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_jmp (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_jl.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
in_sr = FLD (in_sr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ld (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ld_d (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ldb (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ldb_d (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ldh (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ldh_d (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ldub (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ldub_d (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_lduh (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_lduh_d (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ld_plus (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_dr = FLD (in_sr);
out_dr = FLD (out_sr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ld24 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld24.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
out_dr = FLD (out_dr);
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addi.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
out_dr = FLD (out_dr);
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_ldi16 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
out_dr = FLD (out_dr);
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_lock (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = 0;
INT out_dr = 0;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_machi_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_machi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_maclo_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_machi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_macwhi_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_machi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_macwlo_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_machi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mul (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mulhi_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_machi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mullo_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_machi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_machi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_machi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mv (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
out_dr = FLD (out_dr);
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
out_dr = FLD (out_dr);
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
out_dr = FLD (out_dr);
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mvfc (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
out_dr = FLD (out_dr);
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_src1);
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_src1);
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_mvtc (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
referenced |= 1 << 0;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_empty.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_not (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_ld_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_rac_dsi (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_rac_dsi.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = -1;
INT in_src2 = -1;
cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_empty.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_seth (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_seth.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
out_dr = FLD (out_dr);
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_slli.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_slli.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add3.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_slli.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_st (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_d.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_d.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_d.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
return cycles;
#undef FLD
}
static int
model_m32rx_st_plus (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_dr = FLD (in_src2);
out_dr = FLD (out_src2);
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_sth_plus (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_dr = FLD (in_src2);
out_dr = FLD (out_src2);
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_stb_plus (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_dr = FLD (in_src2);
out_dr = FLD (out_src2);
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_st_plus.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_src1 = 0;
INT in_src2 = 0;
in_src1 = FLD (in_src1);
in_src2 = FLD (in_src2);
referenced |= 1 << 0;
referenced |= 1 << 1;
cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
}
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_dr = FLD (in_src2);
out_dr = FLD (out_src2);
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_add.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
in_sr = FLD (in_sr);
in_dr = FLD (in_dr);
out_dr = FLD (out_dr);
referenced |= 1 << 0;
referenced |= 1 << 1;
referenced |= 1 << 2;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}
static int
model_m32rx_trap (SIM_CPU *current_cpu, void *sem_arg)
{
#define FLD(f) abuf->fields.sfmt_trap.f
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
const IDESC * UNUSED idesc = abuf->idesc;
int cycles = 0;
{
int referenced = 0;
int UNUSED insn_referenced = abuf->written;
INT in_sr = -1;
INT in_dr = -1;
INT out_dr = -1;
cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
}
return cycles;
#undef FLD
}