| /* |
| * HND Run Time Environment ioctl. |
| * |
| * Copyright 1999-2016, Broadcom Corporation |
| * All rights reserved, |
| * |
| * Redistribution and use in source and binary forms, with or without modification, |
| * are permitted provided that the following conditions are met: |
| * 1. Redistributions of source code must retain the above copyright notice, |
| * this list of conditions and the following disclaimer. |
| * 2. Redistributions in binary form must reproduce the above copyright notice, |
| * this list of conditions and the following disclaimer in the documentation |
| * and/or other materials provided with the distribution. |
| * |
| * This software is provided by the copyright holder "as is" and any express or |
| * implied warranties, including, but not limited to, the implied warranties of |
| * merchantability and fitness for a particular purpose are disclaimed. In no event |
| * shall copyright holder be liable for any direct, indirect, incidental, special, |
| * exemplary, or consequential damages (including, but not limited to, procurement |
| * of substitute goods or services; loss of use, data, or profits; or business |
| * interruption) however caused and on any theory of liability, whether in |
| * contract, strict liability, or tort (including negligence or otherwise) arising |
| * in any way out of the use of this software, even if advised of the possibility |
| * of such damage |
| * |
| * |
| * <<Broadcom-WL-IPTag/Open:>> |
| * |
| * $Id: rte_ioctl.h 514727 2014-11-12 03:02:48Z $ |
| */ |
| |
| #ifndef _rte_ioctl_h_ |
| #define _rte_ioctl_h_ |
| |
| /* RTE IOCTL definitions for generic ether devices */ |
| #define RTEGHWADDR 0x8901 |
| #define RTESHWADDR 0x8902 |
| #define RTEGMTU 0x8903 |
| #define RTEGSTATS 0x8904 |
| #define RTEGALLMULTI 0x8905 |
| #define RTESALLMULTI 0x8906 |
| #define RTEGPROMISC 0x8907 |
| #define RTESPROMISC 0x8908 |
| #define RTESMULTILIST 0x8909 |
| #define RTEGUP 0x890A |
| #define RTEGPERMADDR 0x890B |
| #define RTEDEVPWRSTCHG 0x890C /* Device pwr state change for PCIedev */ |
| #define RTEDEVPMETOGGLE 0x890D /* Toggle PME# to wake up the host */ |
| |
| #define RTE_IOCTL_QUERY 0x00 |
| #define RTE_IOCTL_SET 0x01 |
| #define RTE_IOCTL_OVL_IDX_MASK 0x1e |
| #define RTE_IOCTL_OVL_RSV 0x20 |
| #define RTE_IOCTL_OVL 0x40 |
| #define RTE_IOCTL_OVL_IDX_SHIFT 1 |
| |
| enum hnd_ioctl_cmd { |
| HND_RTE_DNGL_IS_SS = 1, /* true if device connected at super speed */ |
| |
| /* PCIEDEV specific wl <--> bus ioctls */ |
| BUS_GET_VAR = 2, |
| BUS_SET_VAR = 3, |
| BUS_FLUSH_RXREORDER_Q = 4, |
| BUS_SET_LTR_STATE = 5, |
| BUS_FLUSH_CHAINED_PKTS = 6, |
| BUS_SET_COPY_COUNT = 7 |
| }; |
| |
| #define SDPCMDEV_SET_MAXTXPKTGLOM 1 |
| |
| typedef struct memuse_info { |
| uint16 ver; /* version of this struct */ |
| uint16 len; /* length in bytes of this structure */ |
| uint32 tot; /* Total memory */ |
| uint32 text_len; /* Size of Text segment memory */ |
| uint32 data_len; /* Size of Data segment memory */ |
| uint32 bss_len; /* Size of BSS segment memory */ |
| |
| uint32 arena_size; /* Total Heap size */ |
| uint32 arena_free; /* Heap memory available or free */ |
| uint32 inuse_size; /* Heap memory currently in use */ |
| uint32 inuse_hwm; /* High watermark of memory - reclaimed memory */ |
| uint32 inuse_overhead; /* tally of allocated mem_t blocks */ |
| uint32 inuse_total; /* Heap in-use + Heap overhead memory */ |
| } memuse_info_t; |
| |
| #endif /* _rte_ioctl_h_ */ |
