| // Copyright 2022 The Fuchsia Authors. All rights reserved. |
| // Use of this source code is governed by a BSD-style license that can be |
| // found in the LICENSE file. |
| // |
| #ifndef SRC_QEMU_EDU_REGISTERS_H_ |
| #define SRC_QEMU_EDU_REGISTERS_H_ |
| |
| #include <hwreg/bitfields.h> |
| |
| namespace qemu_edu_regs { |
| |
| constexpr uint32_t kIdentificationOffset = 0x00; |
| constexpr uint32_t kLivenessCheckOffset = 0x04; |
| constexpr uint32_t kFactorialCompoutationOffset = 0x08; |
| constexpr uint32_t kStatusRegisterOffset = 0x20; |
| constexpr uint32_t kInterruptStatusRegisterOffset = 0x24; |
| constexpr uint32_t kInterruptRaiseRegisterOffset = 0x60; |
| constexpr uint32_t kInterruptAcknowledgeRegisterOffset = 0x64; |
| constexpr uint32_t kDmaSourceAddressOffset = 0x80; |
| constexpr uint32_t kDmaDestinationAddressOffset = 0x80; |
| constexpr uint32_t kDmaTransferCountOffset = 0x90; |
| constexpr uint32_t kDmaCommandRegisterOffset = 0x98; |
| |
| class Identification : public hwreg::RegisterBase<Identification, uint32_t> { |
| public: |
| DEF_FIELD(31, 24, major_version); |
| DEF_FIELD(23, 16, minor_version); |
| DEF_FIELD(15, 0, edu); |
| |
| static auto Get() { return hwreg::RegisterAddr<Identification>(kIdentificationOffset); } |
| }; |
| |
| class Status : public hwreg::RegisterBase<Status, uint32_t> { |
| public: |
| DEF_BIT(0, busy); |
| DEF_BIT(7, irq_enable); |
| |
| static auto Get() { return hwreg::RegisterAddr<Status>(kStatusRegisterOffset); } |
| }; |
| |
| } // namespace qemu_edu_regs |
| |
| #endif // SRC_QEMU_EDU_REGISTERS_H_ |