[roll] Roll fuchsia [roll] Roll llvm-project/libc [libc][ARM] Defend banked SP setup against register allocator (#206757) The startup code for bare-metal AArch32 A/R shifts the CPU through all the different modes which have their own copies of SP, updating all the stack pointers to the same value. But it does it using C intrinsics, leaving the register allocation to the compiler – so it's possible that the register allocator happens to use one of the _other_ banked registers, such as LR. For example, when I built this code today, it happened that LR was used to hold one of the constants written into CPSR_c to change mode. That constant was written into the SVC mode LR before any mode changes, but the MSR instruction that tried to use it was run in a different mode, so it copied from _that_ mode's LR, which contained uninitialised nonsense in place of the desired constant, triggering a boot-time crash. I think it's safer to use a single asm statement for the whole job, guaranteeing which registers it uses. GitOrigin-RevId: 73e1c53474a46a9686d7111c8566be2d90263aa4 Original-Original-Revision: 5b3c509f664e9c3bc3237f251c87b167b83e4f45 Original-Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/1692018 Original-Original-Revision: d521a8ae4cbcc1c9a0590650e0ca0828fb869ac6 GitOrigin-RevId: b86033c3831371bd5d452e5fb0d614851bf4a859 Change-Id: I831472473f66b4297ffb5b9ddfaeacfde950bcef Reviewed-on: https://fuchsia-review.googlesource.com/c/integration/+/1692315 Cr-Commit-Position: refs/heads/main@{#196114}
diff --git a/stem b/stem index 16d04b0..33e5eb3 100644 --- a/stem +++ b/stem
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