[roll] Roll fuchsia [kernel][arm64] explicitly insert an ISB when using the AT instruction

As documented in the ARM ARM under the section "Address translation
instructions", explicit synchronization must be done after using the AT
instruction and before reading the PAR_EL1 register that the instruction
modifies. This is consistent with the general requirement that you must
synchronize after modifying any control register that affects the output
of another, or to definitively see the result of the modification at
all.

Original-Bug: 477979595
Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/1483761
Original-Revision: b2fd0a80fba9c6c9f680b950544d0b249c3f034f
GitOrigin-RevId: 59e8b91b1425e0168bcd487950f45bed8e0f560b
Change-Id: I11591ae0271de0859ba2adef1ccc51bb5b5bddef
1 file changed
tree: 3c0552be1a71cb1a32257d667faf6f26bf1f403e
  1. ctf/
  2. git-hooks/
  3. infra/
  4. third_party/
  5. flower
  6. jiri.lock
  7. MILESTONE
  8. minimal
  9. prebuilts
  10. README.md
  11. stem
  12. test_durations
README.md

Integration

This repository contains Fuchsia's Global Integration manifest files.

Making changes

All changes should be made to the internal version of this repository. Our infrastructure automatically updates this version when the internal one changes.

Currently all changes must be made by a Google employee. Non-Google employees wishing to make a change can ask for assistance in one of the communication channels documented at get involved.

Obtaining the source

First install Jiri.

Next run:

$ jiri init
$ jiri import minimal https://fuchsia.googlesource.com/integration
$ jiri update

Third party

Third party projects should have their own subdirectory in ./third_party.