commit 70c158cbec19438c3bd8d0f230d8fee1c0ad6639
author Christopher Kohlhoff <chris@kohlhoff.com> Sun Jun 29 20:38:38 2014 +1000
committer Christopher Kohlhoff <chris@kohlhoff.com> Sun Jun 29 20:40:52 2014 +1000
tree 297bf0b9e53f764ae3e9331aeb677d82ad90f163
parent d5c93e25332f7cbec135a1fab82d2f3f21e32fb2

The intel compiler doesn't provide the SSE2 intrinsics.

asio/include/asio/detail/gcc_x86_fenced_block.hpp

diff --git a/asio/include/asio/detail/gcc_x86_fenced_block.hpp b/asio/include/asio/detail/gcc_x86_fenced_block.hpp
index 9a71a53..98075e3 100644
--- a/asio/include/asio/detail/gcc_x86_fenced_block.hpp
+++ b/asio/include/asio/detail/gcc_x86_fenced_block.hpp
@@ -63,11 +63,11 @@
   static void lbarrier()
   {
 #if defined(__SSE2__)
-# if (__GNUC__ >= 4)
+# if (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
     __builtin_ia32_lfence();
-# else // (__GNUC__ >= 4)
+# else // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
     __asm__ __volatile__ ("lfence" ::: "memory");
-# endif // (__GNUC__ >= 4)
+# endif // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
 #else // defined(__SSE2__)
     barrier();
 #endif // defined(__SSE2__)
@@ -76,11 +76,11 @@
   static void sbarrier()
   {
 #if defined(__SSE2__)
-# if (__GNUC__ >= 4)
+# if (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
     __builtin_ia32_sfence();
-# else // (__GNUC__ >= 4)
+# else // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
     __asm__ __volatile__ ("sfence" ::: "memory");
-# endif // (__GNUC__ >= 4)
+# endif // (__GNUC__ >= 4) && !defined(__INTEL_COMPILER) && !defined(__ICL)
 #else // defined(__SSE2__)
     barrier();
 #endif // defined(__SSE2__)