tree 73caeab384755a4fb71c7028615d7220451725bb
parent 75986c91372ac6e8ee4ca4df5bf55db5470ad291
author Todd Eisenberger <teisenbe@google.com> 1521245244 -0700
committer CQ bot account: commit-bot@chromium.org <commit-bot@chromium.org> 1521481361 +0000

[x86] Correct halting cores during panic

We were having CPUs issue INIT IPIs to themselves, which is invalid.
Instead have CPUs signal that they are safe to send an INIT IPI to, and
have the panic orchestrator send the INIT.

ZX-1828 #done

Change-Id: I80b6fcee63f705f6405bed62a6d428fbe8ebfcc2