tree 37dc822e588dd4e9566696126103b477c02f2cc2
parent c6d977a966ccdb9ea684d8650cc6f8cccfedf8d7
author Jean-Marc Valin <jmvalin@jmvalin.ca> 1536956823 -0400
committer Jean-Marc Valin <jmvalin@jmvalin.ca> 1536956823 -0400
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Fixes packet parsing for 16-bit CPUs

Without that change, a very long (> 682 ms) illegal packet could trigger
a wrap-around in the test and be accepted as valid.

Only 16-bit architectures (e.g. TI C5x) were affected.