Google Git
Sign in
fuchsia / third_party / vulkan-cts / 8501d2f862d888191fd7a19f188d55d99de8d592 / . / external / vulkancts / modules / vulkan / spirv_assembly / vktSpvAsmInstructionTests.cpp
blob: 06348d5189711d04a5ebb4d7a1849281dd391b6a [file] [log] [blame]
<
/*-------------------------------------------------------------------------
* Vulkan Conformance Tests
* ------------------------
*
* Copyright (c) 2015 Google Inc.
* Copyright (c) 2016 The Khronos Group Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*//*!
* \file
* \brief SPIR-V Assembly Tests for Instructions (special opcode/operand)
*//*--------------------------------------------------------------------*/
#include "vktSpvAsmInstructionTests.hpp"
#include "tcuCommandLine.hpp"
#include "tcuFormatUtil.hpp"
#include "tcuFloat.hpp"
#include "tcuRGBA.hpp"
#include "tcuStringTemplate.hpp"
#include "tcuTestLog.hpp"
#include "tcuVectorUtil.hpp"
#include "vkDefs.hpp"
#include "vkDeviceUtil.hpp"
#include "vkMemUtil.hpp"
#include "vkPlatform.hpp"
#include "vkPrograms.hpp"
#include "vkQueryUtil.hpp"
#include "vkRef.hpp"
#include "vkRefUtil.hpp"
#include "vkStrUtil.hpp"
#include "vkTypeUtil.hpp"
#include "deRandom.hpp"
#include "deStringUtil.hpp"
#include "deUniquePtr.hpp"
#include "tcuStringTemplate.hpp"
#include "vktSpvAsm16bitStorageTests.hpp"
#include "vktSpvAsmComputeShaderCase.hpp"
#include "vktSpvAsmComputeShaderTestUtil.hpp"
#include "vktSpvAsmGraphicsShaderTestUtil.hpp"
#include "vktSpvAsmVariablePointersTests.hpp"
#include "vktTestCaseUtil.hpp"
#include <cmath>
#include <limits>
#include <map>
#include <string>
#include <sstream>
#include <utility>
namespace vkt
{
namespace SpirVAssembly
{
namespace
{
using namespace vk;
using std::map;
using std::string;
using std::vector;
using tcu::IVec3;
using tcu::IVec4;
using tcu::RGBA;
using tcu::TestLog;
using tcu::TestStatus;
using tcu::Vec4;
using de::UniquePtr;
using tcu::StringTemplate;
using tcu::Vec4;
template<typename T>
static void fillRandomScalars (de::Random& rnd, T minValue, T maxValue, void* dst, int numValues, int offset = 0)
{
T* const typedPtr = (T*)dst;
for (int ndx = 0; ndx < numValues; ndx++)
typedPtr[offset + ndx] = randomScalar<T>(rnd, minValue, maxValue);
}
// Filter is a function that returns true if a value should pass, false otherwise.
template<typename T, typename FilterT>
static void fillRandomScalars (de::Random& rnd, T minValue, T maxValue, void* dst, int numValues, FilterT filter, int offset = 0)
{
T* const typedPtr = (T*)dst;
T value;
for (int ndx = 0; ndx < numValues; ndx++)
{
do
value = randomScalar<T>(rnd, minValue, maxValue);
while (!filter(value));
typedPtr[offset + ndx] = value;
}
}
static void floorAll (vector<float>& values)
{
for (size_t i = 0; i < values.size(); i++)
values[i] = deFloatFloor(values[i]);
}
static void floorAll (vector<Vec4>& values)
{
for (size_t i = 0; i < values.size(); i++)
values[i] = floor(values[i]);
}
struct CaseParameter
{
const char* name;
string param;
CaseParameter (const char* case_, const string& param_) : name(case_), param(param_) {}
};
// Assembly code used for testing OpNop, OpConstant{Null|Composite}, Op[No]Line, OpSource[Continued], OpSourceExtension, OpUndef is based on GLSL source code:
//
// #version 430
//
// layout(std140, set = 0, binding = 0) readonly buffer Input {
// float elements[];
// } input_data;
// layout(std140, set = 0, binding = 1) writeonly buffer Output {
// float elements[];
// } output_data;
//
// layout (local_size_x = 1, local_size_y = 1, local_size_z = 1) in;
//
// void main() {
// uint x = gl_GlobalInvocationID.x;
// output_data.elements[x] = -input_data.elements[x];
// }
tcu::TestCaseGroup* createOpNopGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opnop", "Test the OpNop instruction"));
ComputeShaderSpec spec;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> positiveFloats (numElements, 0);
vector<float> negativeFloats (numElements, 0);
fillRandomScalars(rnd, 1.f, 100.f, &positiveFloats[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
negativeFloats[ndx] = -positiveFloats[ndx];
spec.assembly =
string(getComputeAsmShaderPreamble()) +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes())
+ string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
" OpNop\n" // Inside a function body
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%neg = OpFNegate %f32 %inval\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %neg\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec.inputs.push_back(BufferSp(new Float32Buffer(positiveFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(negativeFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "all", "OpNop appearing at different places", spec));
return group.release();
}
bool compareFUnord (const std::vector<BufferSp>& inputs, const vector<AllocationSp>& outputAllocs, const std::vector<BufferSp>& expectedOutputs, TestLog& log)
{
if (outputAllocs.size() != 1)
return false;
const BufferSp& expectedOutput = expectedOutputs[0];
const deInt32* expectedOutputAsInt = static_cast<const deInt32*>(expectedOutputs[0]->data());
const deInt32* outputAsInt = static_cast<const deInt32*>(outputAllocs[0]->getHostPtr());
const float* input1AsFloat = static_cast<const float*>(inputs[0]->data());
const float* input2AsFloat = static_cast<const float*>(inputs[1]->data());
bool returnValue = true;
for (size_t idx = 0; idx < expectedOutput->getNumBytes() / sizeof(deInt32); ++idx)
{
if (outputAsInt[idx] != expectedOutputAsInt[idx])
{
log << TestLog::Message << "ERROR: Sub-case failed. inputs: " << input1AsFloat[idx] << "," << input2AsFloat[idx] << " output: " << outputAsInt[idx]<< " expected output: " << expectedOutputAsInt[idx] << TestLog::EndMessage;
returnValue = false;
}
}
return returnValue;
}
typedef VkBool32 (*compareFuncType) (float, float);
struct OpFUnordCase
{
const char* name;
const char* opCode;
compareFuncType compareFunc;
OpFUnordCase (const char* _name, const char* _opCode, compareFuncType _compareFunc)
: name (_name)
, opCode (_opCode)
, compareFunc (_compareFunc) {}
};
#define ADD_OPFUNORD_CASE(NAME, OPCODE, OPERATOR) \
do { \
struct compare_##NAME { static VkBool32 compare(float x, float y) { return (x OPERATOR y) ? VK_TRUE : VK_FALSE; } }; \
cases.push_back(OpFUnordCase(#NAME, OPCODE, compare_##NAME::compare)); \
} while (deGetFalse())
tcu::TestCaseGroup* createOpFUnordGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opfunord", "Test the OpFUnord* opcodes"));
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<OpFUnordCase> cases;
const StringTemplate shaderTemplate (
string(getComputeAsmShaderPreamble()) +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpDecorate %buf BufferBlock\n"
"OpDecorate %buf2 BufferBlock\n"
"OpDecorate %indata1 DescriptorSet 0\n"
"OpDecorate %indata1 Binding 0\n"
"OpDecorate %indata2 DescriptorSet 0\n"
"OpDecorate %indata2 Binding 1\n"
"OpDecorate %outdata DescriptorSet 0\n"
"OpDecorate %outdata Binding 2\n"
"OpDecorate %f32arr ArrayStride 4\n"
"OpDecorate %i32arr ArrayStride 4\n"
"OpMemberDecorate %buf 0 Offset 0\n"
"OpMemberDecorate %buf2 0 Offset 0\n"
+ string(getComputeAsmCommonTypes()) +
"%buf = OpTypeStruct %f32arr\n"
"%bufptr = OpTypePointer Uniform %buf\n"
"%indata1 = OpVariable %bufptr Uniform\n"
"%indata2 = OpVariable %bufptr Uniform\n"
"%buf2 = OpTypeStruct %i32arr\n"
"%buf2ptr = OpTypePointer Uniform %buf2\n"
"%outdata = OpVariable %buf2ptr Uniform\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%consti1 = OpConstant %i32 1\n"
"%constf1 = OpConstant %f32 1.0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc1 = OpAccessChain %f32ptr %indata1 %zero %x\n"
"%inval1 = OpLoad %f32 %inloc1\n"
"%inloc2 = OpAccessChain %f32ptr %indata2 %zero %x\n"
"%inval2 = OpLoad %f32 %inloc2\n"
"%outloc = OpAccessChain %i32ptr %outdata %zero %x\n"
"%result = ${OPCODE} %bool %inval1 %inval2\n"
"%int_res = OpSelect %i32 %result %consti1 %zero\n"
" OpStore %outloc %int_res\n"
" OpReturn\n"
" OpFunctionEnd\n");
ADD_OPFUNORD_CASE(equal, "OpFUnordEqual", ==);
ADD_OPFUNORD_CASE(less, "OpFUnordLessThan", <);
ADD_OPFUNORD_CASE(lessequal, "OpFUnordLessThanEqual", <=);
ADD_OPFUNORD_CASE(greater, "OpFUnordGreaterThan", >);
ADD_OPFUNORD_CASE(greaterequal, "OpFUnordGreaterThanEqual", >=);
ADD_OPFUNORD_CASE(notequal, "OpFUnordNotEqual", !=);
for (size_t caseNdx = 0; caseNdx < cases.size(); ++caseNdx)
{
map<string, string> specializations;
ComputeShaderSpec spec;
const float NaN = std::numeric_limits<float>::quiet_NaN();
vector<float> inputFloats1 (numElements, 0);
vector<float> inputFloats2 (numElements, 0);
vector<deInt32> expectedInts (numElements, 0);
specializations["OPCODE"] = cases[caseNdx].opCode;
spec.assembly = shaderTemplate.specialize(specializations);
fillRandomScalars(rnd, 1.f, 100.f, &inputFloats1[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
{
switch (ndx % 6)
{
case 0: inputFloats2[ndx] = inputFloats1[ndx] + 1.0f; break;
case 1: inputFloats2[ndx] = inputFloats1[ndx] - 1.0f; break;
case 2: inputFloats2[ndx] = inputFloats1[ndx]; break;
case 3: inputFloats2[ndx] = NaN; break;
case 4: inputFloats2[ndx] = inputFloats1[ndx]; inputFloats1[ndx] = NaN; break;
case 5: inputFloats2[ndx] = NaN; inputFloats1[ndx] = NaN; break;
}
expectedInts[ndx] = tcu::Float32(inputFloats1[ndx]).isNaN() || tcu::Float32(inputFloats2[ndx]).isNaN() || cases[caseNdx].compareFunc(inputFloats1[ndx], inputFloats2[ndx]);
}
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats1)));
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats2)));
spec.outputs.push_back(BufferSp(new Int32Buffer(expectedInts)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
spec.verifyIO = &compareFUnord;
group->addChild(new SpvAsmComputeShaderCase(testCtx, cases[caseNdx].name, cases[caseNdx].name, spec));
}
return group.release();
}
struct OpAtomicCase
{
const char* name;
const char* assembly;
void (*calculateExpected)(deInt32&, deInt32);
deInt32 numOutputElements;
OpAtomicCase (const char* _name, const char* _assembly, void (*_calculateExpected)(deInt32&, deInt32), deInt32 _numOutputElements)
: name (_name)
, assembly (_assembly)
, calculateExpected (_calculateExpected)
, numOutputElements (_numOutputElements) {}
};
tcu::TestCaseGroup* createOpAtomicGroup (tcu::TestContext& testCtx, bool useStorageBuffer)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx,
useStorageBuffer ? "opatomic_storage_buffer" : "opatomic",
"Test the OpAtomic* opcodes"));
de::Random rnd (deStringHash(group->getName()));
const int numElements = 1000000;
vector<OpAtomicCase> cases;
const StringTemplate shaderTemplate (
string("OpCapability Shader\n") +
(useStorageBuffer ? "OpExtension \"SPV_KHR_storage_buffer_storage_class\"\n" : "") +
"OpMemoryModel Logical GLSL450\n"
"OpEntryPoint GLCompute %main \"main\" %id\n"
"OpExecutionMode %main LocalSize 1 1 1\n" +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpDecorate %buf ${BLOCK_DECORATION}\n"
"OpDecorate %indata DescriptorSet 0\n"
"OpDecorate %indata Binding 0\n"
"OpDecorate %i32arr ArrayStride 4\n"
"OpMemberDecorate %buf 0 Offset 0\n"
"OpDecorate %sumbuf ${BLOCK_DECORATION}\n"
"OpDecorate %sum DescriptorSet 0\n"
"OpDecorate %sum Binding 1\n"
"OpMemberDecorate %sumbuf 0 Coherent\n"
"OpMemberDecorate %sumbuf 0 Offset 0\n"
"%void = OpTypeVoid\n"
"%voidf = OpTypeFunction %void\n"
"%u32 = OpTypeInt 32 0\n"
"%i32 = OpTypeInt 32 1\n"
"%uvec3 = OpTypeVector %u32 3\n"
"%uvec3ptr = OpTypePointer Input %uvec3\n"
"%i32ptr = OpTypePointer ${BLOCK_POINTER_TYPE} %i32\n"
"%i32arr = OpTypeRuntimeArray %i32\n"
"%buf = OpTypeStruct %i32arr\n"
"%bufptr = OpTypePointer ${BLOCK_POINTER_TYPE} %buf\n"
"%indata = OpVariable %bufptr ${BLOCK_POINTER_TYPE}\n"
"%sumbuf = OpTypeStruct %i32arr\n"
"%sumbufptr = OpTypePointer ${BLOCK_POINTER_TYPE} %sumbuf\n"
"%sum = OpVariable %sumbufptr ${BLOCK_POINTER_TYPE}\n"
"%id = OpVariable %uvec3ptr Input\n"
"%minusone = OpConstant %i32 -1\n"
"%zero = OpConstant %i32 0\n"
"%one = OpConstant %u32 1\n"
"%two = OpConstant %i32 2\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %i32ptr %indata %zero %x\n"
"%inval = OpLoad %i32 %inloc\n"
"%outloc = OpAccessChain %i32ptr %sum %zero ${INDEX}\n"
"${INSTRUCTION}"
" OpReturn\n"
" OpFunctionEnd\n");
#define ADD_OPATOMIC_CASE(NAME, ASSEMBLY, CALCULATE_EXPECTED, NUM_OUTPUT_ELEMENTS) \
do { \
DE_STATIC_ASSERT((NUM_OUTPUT_ELEMENTS) == 1 || (NUM_OUTPUT_ELEMENTS) == numElements); \
struct calculateExpected_##NAME { static void calculateExpected(deInt32& expected, deInt32 input) CALCULATE_EXPECTED }; /* NOLINT(CALCULATE_EXPECTED) */ \
cases.push_back(OpAtomicCase(#NAME, ASSEMBLY, calculateExpected_##NAME::calculateExpected, NUM_OUTPUT_ELEMENTS)); \
} while (deGetFalse())
#define ADD_OPATOMIC_CASE_1(NAME, ASSEMBLY, CALCULATE_EXPECTED) ADD_OPATOMIC_CASE(NAME, ASSEMBLY, CALCULATE_EXPECTED, 1)
#define ADD_OPATOMIC_CASE_N(NAME, ASSEMBLY, CALCULATE_EXPECTED) ADD_OPATOMIC_CASE(NAME, ASSEMBLY, CALCULATE_EXPECTED, numElements)
ADD_OPATOMIC_CASE_1(iadd, "%unused = OpAtomicIAdd %i32 %outloc %one %zero %inval\n", { expected += input; } );
ADD_OPATOMIC_CASE_1(isub, "%unused = OpAtomicISub %i32 %outloc %one %zero %inval\n", { expected -= input; } );
ADD_OPATOMIC_CASE_1(iinc, "%unused = OpAtomicIIncrement %i32 %outloc %one %zero\n", { ++expected; (void)input;} );
ADD_OPATOMIC_CASE_1(idec, "%unused = OpAtomicIDecrement %i32 %outloc %one %zero\n", { --expected; (void)input;} );
ADD_OPATOMIC_CASE_N(load, "%inval2 = OpAtomicLoad %i32 %inloc %zero %zero\n"
" OpStore %outloc %inval2\n", { expected = input;} );
ADD_OPATOMIC_CASE_N(store, " OpAtomicStore %outloc %zero %zero %inval\n", { expected = input;} );
ADD_OPATOMIC_CASE_N(compex, "%even = OpSMod %i32 %inval %two\n"
" OpStore %outloc %even\n"
"%unused = OpAtomicCompareExchange %i32 %outloc %one %zero %zero %minusone %zero\n", { expected = (input % 2) == 0 ? -1 : 1;} );
#undef ADD_OPATOMIC_CASE
#undef ADD_OPATOMIC_CASE_1
#undef ADD_OPATOMIC_CASE_N
for (size_t caseNdx = 0; caseNdx < cases.size(); ++caseNdx)
{
map<string, string> specializations;
ComputeShaderSpec spec;
vector<deInt32> inputInts (numElements, 0);
vector<deInt32> expected (cases[caseNdx].numOutputElements, -1);
specializations["INDEX"] = (cases[caseNdx].numOutputElements == 1) ? "%zero" : "%x";
specializations["INSTRUCTION"] = cases[caseNdx].assembly;
specializations["BLOCK_DECORATION"] = useStorageBuffer ? "Block" : "BufferBlock";
specializations["BLOCK_POINTER_TYPE"] = useStorageBuffer ? "StorageBuffer" : "Uniform";
spec.assembly = shaderTemplate.specialize(specializations);
if (useStorageBuffer)
spec.extensions.push_back("VK_KHR_storage_buffer_storage_class");
fillRandomScalars(rnd, 1, 100, &inputInts[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
{
cases[caseNdx].calculateExpected((cases[caseNdx].numOutputElements == 1) ? expected[0] : expected[ndx], inputInts[ndx]);
}
spec.inputs.push_back(BufferSp(new Int32Buffer(inputInts)));
spec.outputs.push_back(BufferSp(new Int32Buffer(expected)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, cases[caseNdx].name, cases[caseNdx].name, spec));
}
return group.release();
}
tcu::TestCaseGroup* createOpLineGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opline", "Test the OpLine instruction"));
ComputeShaderSpec spec;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> positiveFloats (numElements, 0);
vector<float> negativeFloats (numElements, 0);
fillRandomScalars(rnd, 1.f, 100.f, &positiveFloats[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
negativeFloats[ndx] = -positiveFloats[ndx];
spec.assembly =
string(getComputeAsmShaderPreamble()) +
"%fname1 = OpString \"negateInputs.comp\"\n"
"%fname2 = OpString \"negateInputs\"\n"
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) +
"OpLine %fname1 0 0\n" // At the earliest possible position
+ string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"OpLine %fname1 0 1\n" // Multiple OpLines in sequence
"OpLine %fname2 1 0\n" // Different filenames
"OpLine %fname1 1000 100000\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"OpLine %fname1 1 1\n" // Before a function
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"OpLine %fname1 1 1\n" // In a function
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%neg = OpFNegate %f32 %inval\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %neg\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec.inputs.push_back(BufferSp(new Float32Buffer(positiveFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(negativeFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "all", "OpLine appearing at different places", spec));
return group.release();
}
tcu::TestCaseGroup* createOpNoLineGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opnoline", "Test the OpNoLine instruction"));
ComputeShaderSpec spec;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> positiveFloats (numElements, 0);
vector<float> negativeFloats (numElements, 0);
fillRandomScalars(rnd, 1.f, 100.f, &positiveFloats[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
negativeFloats[ndx] = -positiveFloats[ndx];
spec.assembly =
string(getComputeAsmShaderPreamble()) +
"%fname = OpString \"negateInputs.comp\"\n"
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) +
"OpNoLine\n" // At the earliest possible position, without preceding OpLine
+ string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"OpLine %fname 0 1\n"
"OpNoLine\n" // Immediately following a preceding OpLine
"OpLine %fname 1000 1\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"OpNoLine\n" // Contents after the previous OpLine
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"OpNoLine\n" // Multiple OpNoLine
"OpNoLine\n"
"OpNoLine\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%neg = OpFNegate %f32 %inval\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %neg\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec.inputs.push_back(BufferSp(new Float32Buffer(positiveFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(negativeFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "all", "OpNoLine appearing at different places", spec));
return group.release();
}
// Compare instruction for the contraction compute case.
// Returns true if the output is what is expected from the test case.
bool compareNoContractCase(const std::vector<BufferSp>&, const vector<AllocationSp>& outputAllocs, const std::vector<BufferSp>& expectedOutputs, TestLog&)
{
if (outputAllocs.size() != 1)
return false;
// We really just need this for size because we are not comparing the exact values.
const BufferSp& expectedOutput = expectedOutputs[0];
const float* outputAsFloat = static_cast<const float*>(outputAllocs[0]->getHostPtr());;
for(size_t i = 0; i < expectedOutput->getNumBytes() / sizeof(float); ++i) {
if (outputAsFloat[i] != 0.f &&
outputAsFloat[i] != -ldexp(1, -24)) {
return false;
}
}
return true;
}
tcu::TestCaseGroup* createNoContractionGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "nocontraction", "Test the NoContraction decoration"));
vector<CaseParameter> cases;
const int numElements = 100;
vector<float> inputFloats1 (numElements, 0);
vector<float> inputFloats2 (numElements, 0);
vector<float> outputFloats (numElements, 0);
const StringTemplate shaderTemplate (
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"${DECORATION}\n"
"OpDecorate %buf BufferBlock\n"
"OpDecorate %indata1 DescriptorSet 0\n"
"OpDecorate %indata1 Binding 0\n"
"OpDecorate %indata2 DescriptorSet 0\n"
"OpDecorate %indata2 Binding 1\n"
"OpDecorate %outdata DescriptorSet 0\n"
"OpDecorate %outdata Binding 2\n"
"OpDecorate %f32arr ArrayStride 4\n"
"OpMemberDecorate %buf 0 Offset 0\n"
+ string(getComputeAsmCommonTypes()) +
"%buf = OpTypeStruct %f32arr\n"
"%bufptr = OpTypePointer Uniform %buf\n"
"%indata1 = OpVariable %bufptr Uniform\n"
"%indata2 = OpVariable %bufptr Uniform\n"
"%outdata = OpVariable %bufptr Uniform\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%c_f_m1 = OpConstant %f32 -1.\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc1 = OpAccessChain %f32ptr %indata1 %zero %x\n"
"%inval1 = OpLoad %f32 %inloc1\n"
"%inloc2 = OpAccessChain %f32ptr %indata2 %zero %x\n"
"%inval2 = OpLoad %f32 %inloc2\n"
"%mul = OpFMul %f32 %inval1 %inval2\n"
"%add = OpFAdd %f32 %mul %c_f_m1\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %add\n"
" OpReturn\n"
" OpFunctionEnd\n");
cases.push_back(CaseParameter("multiplication", "OpDecorate %mul NoContraction"));
cases.push_back(CaseParameter("addition", "OpDecorate %add NoContraction"));
cases.push_back(CaseParameter("both", "OpDecorate %mul NoContraction\nOpDecorate %add NoContraction"));
for (size_t ndx = 0; ndx < numElements; ++ndx)
{
inputFloats1[ndx] = 1.f + std::ldexp(1.f, -23); // 1 + 2^-23.
inputFloats2[ndx] = 1.f - std::ldexp(1.f, -23); // 1 - 2^-23.
// Result for (1 + 2^-23) * (1 - 2^-23) - 1. With NoContraction, the multiplication will be
// conducted separately and the result is rounded to 1, or 0x1.fffffcp-1
// So the final result will be 0.f or 0x1p-24.
// If the operation is combined into a precise fused multiply-add, then the result would be
// 2^-46 (0xa8800000).
outputFloats[ndx] = 0.f;
}
for (size_t caseNdx = 0; caseNdx < cases.size(); ++caseNdx)
{
map<string, string> specializations;
ComputeShaderSpec spec;
specializations["DECORATION"] = cases[caseNdx].param;
spec.assembly = shaderTemplate.specialize(specializations);
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats1)));
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats2)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
// Check against the two possible answers based on rounding mode.
spec.verifyIO = &compareNoContractCase;
group->addChild(new SpvAsmComputeShaderCase(testCtx, cases[caseNdx].name, cases[caseNdx].name, spec));
}
return group.release();
}
bool compareFRem(const std::vector<BufferSp>&, const vector<AllocationSp>& outputAllocs, const std::vector<BufferSp>& expectedOutputs, TestLog&)
{
if (outputAllocs.size() != 1)
return false;
const BufferSp& expectedOutput = expectedOutputs[0];
const float *expectedOutputAsFloat = static_cast<const float*>(expectedOutput->data());
const float* outputAsFloat = static_cast<const float*>(outputAllocs[0]->getHostPtr());;
for (size_t idx = 0; idx < expectedOutput->getNumBytes() / sizeof(float); ++idx)
{
const float f0 = expectedOutputAsFloat[idx];
const float f1 = outputAsFloat[idx];
// \todo relative error needs to be fairly high because FRem may be implemented as
// (roughly) frac(a/b)*b, so LSB errors can be magnified. But this should be fine for now.
if (deFloatAbs((f1 - f0) / f0) > 0.02)
return false;
}
return true;
}
tcu::TestCaseGroup* createOpFRemGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opfrem", "Test the OpFRem instruction"));
ComputeShaderSpec spec;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 200;
vector<float> inputFloats1 (numElements, 0);
vector<float> inputFloats2 (numElements, 0);
vector<float> outputFloats (numElements, 0);
fillRandomScalars(rnd, -10000.f, 10000.f, &inputFloats1[0], numElements);
fillRandomScalars(rnd, -100.f, 100.f, &inputFloats2[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
{
// Guard against divisors near zero.
if (std::fabs(inputFloats2[ndx]) < 1e-3)
inputFloats2[ndx] = 8.f;
// The return value of std::fmod() has the same sign as its first operand, which is how OpFRem spec'd.
outputFloats[ndx] = std::fmod(inputFloats1[ndx], inputFloats2[ndx]);
}
spec.assembly =
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpDecorate %buf BufferBlock\n"
"OpDecorate %indata1 DescriptorSet 0\n"
"OpDecorate %indata1 Binding 0\n"
"OpDecorate %indata2 DescriptorSet 0\n"
"OpDecorate %indata2 Binding 1\n"
"OpDecorate %outdata DescriptorSet 0\n"
"OpDecorate %outdata Binding 2\n"
"OpDecorate %f32arr ArrayStride 4\n"
"OpMemberDecorate %buf 0 Offset 0\n"
+ string(getComputeAsmCommonTypes()) +
"%buf = OpTypeStruct %f32arr\n"
"%bufptr = OpTypePointer Uniform %buf\n"
"%indata1 = OpVariable %bufptr Uniform\n"
"%indata2 = OpVariable %bufptr Uniform\n"
"%outdata = OpVariable %bufptr Uniform\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc1 = OpAccessChain %f32ptr %indata1 %zero %x\n"
"%inval1 = OpLoad %f32 %inloc1\n"
"%inloc2 = OpAccessChain %f32ptr %indata2 %zero %x\n"
"%inval2 = OpLoad %f32 %inloc2\n"
"%rem = OpFRem %f32 %inval1 %inval2\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %rem\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats1)));
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats2)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
spec.verifyIO = &compareFRem;
group->addChild(new SpvAsmComputeShaderCase(testCtx, "all", "", spec));
return group.release();
}
// Copy contents in the input buffer to the output buffer.
tcu::TestCaseGroup* createOpCopyMemoryGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opcopymemory", "Test the OpCopyMemory instruction"));
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
// The following case adds vec4(0., 0.5, 1.5, 2.5) to each of the elements in the input buffer and writes output to the output buffer.
ComputeShaderSpec spec1;
vector<Vec4> inputFloats1 (numElements);
vector<Vec4> outputFloats1 (numElements);
fillRandomScalars(rnd, -200.f, 200.f, &inputFloats1[0], numElements * 4);
// CPU might not use the same rounding mode as the GPU. Use whole numbers to avoid rounding differences.
floorAll(inputFloats1);
for (size_t ndx = 0; ndx < numElements; ++ndx)
outputFloats1[ndx] = inputFloats1[ndx] + Vec4(0.f, 0.5f, 1.5f, 2.5f);
spec1.assembly =
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpDecorate %vec4arr ArrayStride 16\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) +
"%vec4 = OpTypeVector %f32 4\n"
"%vec4ptr_u = OpTypePointer Uniform %vec4\n"
"%vec4ptr_f = OpTypePointer Function %vec4\n"
"%vec4arr = OpTypeRuntimeArray %vec4\n"
"%buf = OpTypeStruct %vec4arr\n"
"%bufptr = OpTypePointer Uniform %buf\n"
"%indata = OpVariable %bufptr Uniform\n"
"%outdata = OpVariable %bufptr Uniform\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%c_f_0 = OpConstant %f32 0.\n"
"%c_f_0_5 = OpConstant %f32 0.5\n"
"%c_f_1_5 = OpConstant %f32 1.5\n"
"%c_f_2_5 = OpConstant %f32 2.5\n"
"%c_vec4 = OpConstantComposite %vec4 %c_f_0 %c_f_0_5 %c_f_1_5 %c_f_2_5\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%v_vec4 = OpVariable %vec4ptr_f Function\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %vec4ptr_u %indata %zero %x\n"
"%outloc = OpAccessChain %vec4ptr_u %outdata %zero %x\n"
" OpCopyMemory %v_vec4 %inloc\n"
"%v_vec4_val = OpLoad %vec4 %v_vec4\n"
"%add = OpFAdd %vec4 %v_vec4_val %c_vec4\n"
" OpStore %outloc %add\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec1.inputs.push_back(BufferSp(new Vec4Buffer(inputFloats1)));
spec1.outputs.push_back(BufferSp(new Vec4Buffer(outputFloats1)));
spec1.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "vector", "OpCopyMemory elements of vector type", spec1));
// The following case copies a float[100] variable from the input buffer to the output buffer.
ComputeShaderSpec spec2;
vector<float> inputFloats2 (numElements);
vector<float> outputFloats2 (numElements);
fillRandomScalars(rnd, -200.f, 200.f, &inputFloats2[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
outputFloats2[ndx] = inputFloats2[ndx];
spec2.assembly =
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpDecorate %f32arr100 ArrayStride 4\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) +
"%hundred = OpConstant %u32 100\n"
"%f32arr100 = OpTypeArray %f32 %hundred\n"
"%f32arr100ptr_f = OpTypePointer Function %f32arr100\n"
"%f32arr100ptr_u = OpTypePointer Uniform %f32arr100\n"
"%buf = OpTypeStruct %f32arr100\n"
"%bufptr = OpTypePointer Uniform %buf\n"
"%indata = OpVariable %bufptr Uniform\n"
"%outdata = OpVariable %bufptr Uniform\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%var = OpVariable %f32arr100ptr_f Function\n"
"%inarr = OpAccessChain %f32arr100ptr_u %indata %zero\n"
"%outarr = OpAccessChain %f32arr100ptr_u %outdata %zero\n"
" OpCopyMemory %var %inarr\n"
" OpCopyMemory %outarr %var\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec2.inputs.push_back(BufferSp(new Float32Buffer(inputFloats2)));
spec2.outputs.push_back(BufferSp(new Float32Buffer(outputFloats2)));
spec2.numWorkGroups = IVec3(1, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "array", "OpCopyMemory elements of array type", spec2));
// The following case copies a struct{vec4, vec4, vec4, vec4} variable from the input buffer to the output buffer.
ComputeShaderSpec spec3;
vector<float> inputFloats3 (16);
vector<float> outputFloats3 (16);
fillRandomScalars(rnd, -200.f, 200.f, &inputFloats3[0], 16);
for (size_t ndx = 0; ndx < 16; ++ndx)
outputFloats3[ndx] = inputFloats3[ndx];
spec3.assembly =
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpMemberDecorate %buf 0 Offset 0\n"
"OpMemberDecorate %buf 1 Offset 16\n"
"OpMemberDecorate %buf 2 Offset 32\n"
"OpMemberDecorate %buf 3 Offset 48\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) +
"%vec4 = OpTypeVector %f32 4\n"
"%buf = OpTypeStruct %vec4 %vec4 %vec4 %vec4\n"
"%bufptr = OpTypePointer Uniform %buf\n"
"%indata = OpVariable %bufptr Uniform\n"
"%outdata = OpVariable %bufptr Uniform\n"
"%vec4stptr = OpTypePointer Function %buf\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%var = OpVariable %vec4stptr Function\n"
" OpCopyMemory %var %indata\n"
" OpCopyMemory %outdata %var\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec3.inputs.push_back(BufferSp(new Float32Buffer(inputFloats3)));
spec3.outputs.push_back(BufferSp(new Float32Buffer(outputFloats3)));
spec3.numWorkGroups = IVec3(1, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "struct", "OpCopyMemory elements of struct type", spec3));
// The following case negates multiple float variables from the input buffer and stores the results to the output buffer.
ComputeShaderSpec spec4;
vector<float> inputFloats4 (numElements);
vector<float> outputFloats4 (numElements);
fillRandomScalars(rnd, -200.f, 200.f, &inputFloats4[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
outputFloats4[ndx] = -inputFloats4[ndx];
spec4.assembly =
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%f32ptr_f = OpTypePointer Function %f32\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%var = OpVariable %f32ptr_f Function\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpCopyMemory %var %inloc\n"
"%val = OpLoad %f32 %var\n"
"%neg = OpFNegate %f32 %val\n"
" OpStore %outloc %neg\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec4.inputs.push_back(BufferSp(new Float32Buffer(inputFloats4)));
spec4.outputs.push_back(BufferSp(new Float32Buffer(outputFloats4)));
spec4.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "float", "OpCopyMemory elements of float type", spec4));
return group.release();
}
tcu::TestCaseGroup* createOpCopyObjectGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opcopyobject", "Test the OpCopyObject instruction"));
ComputeShaderSpec spec;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> inputFloats (numElements, 0);
vector<float> outputFloats (numElements, 0);
fillRandomScalars(rnd, -200.f, 200.f, &inputFloats[0], numElements);
// CPU might not use the same rounding mode as the GPU. Use whole numbers to avoid rounding differences.
floorAll(inputFloats);
for (size_t ndx = 0; ndx < numElements; ++ndx)
outputFloats[ndx] = inputFloats[ndx] + 7.5f;
spec.assembly =
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) +
"%fmat = OpTypeMatrix %fvec3 3\n"
"%three = OpConstant %u32 3\n"
"%farr = OpTypeArray %f32 %three\n"
"%fst = OpTypeStruct %f32 %f32\n"
+ string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%c_f = OpConstant %f32 1.5\n"
"%c_fvec3 = OpConstantComposite %fvec3 %c_f %c_f %c_f\n"
"%c_fmat = OpConstantComposite %fmat %c_fvec3 %c_fvec3 %c_fvec3\n"
"%c_farr = OpConstantComposite %farr %c_f %c_f %c_f\n"
"%c_fst = OpConstantComposite %fst %c_f %c_f\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%c_f_copy = OpCopyObject %f32 %c_f\n"
"%c_fvec3_copy = OpCopyObject %fvec3 %c_fvec3\n"
"%c_fmat_copy = OpCopyObject %fmat %c_fmat\n"
"%c_farr_copy = OpCopyObject %farr %c_farr\n"
"%c_fst_copy = OpCopyObject %fst %c_fst\n"
"%fvec3_elem = OpCompositeExtract %f32 %c_fvec3_copy 0\n"
"%fmat_elem = OpCompositeExtract %f32 %c_fmat_copy 1 2\n"
"%farr_elem = OpCompositeExtract %f32 %c_farr_copy 2\n"
"%fst_elem = OpCompositeExtract %f32 %c_fst_copy 1\n"
// Add up. 1.5 * 5 = 7.5.
"%add1 = OpFAdd %f32 %c_f_copy %fvec3_elem\n"
"%add2 = OpFAdd %f32 %add1 %fmat_elem\n"
"%add3 = OpFAdd %f32 %add2 %farr_elem\n"
"%add4 = OpFAdd %f32 %add3 %fst_elem\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%add = OpFAdd %f32 %add4 %inval\n"
" OpStore %outloc %add\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "spotcheck", "OpCopyObject on different types", spec));
return group.release();
}
// Assembly code used for testing OpUnreachable is based on GLSL source code:
//
// #version 430
//
// layout(std140, set = 0, binding = 0) readonly buffer Input {
// float elements[];
// } input_data;
// layout(std140, set = 0, binding = 1) writeonly buffer Output {
// float elements[];
// } output_data;
//
// void not_called_func() {
// // place OpUnreachable here
// }
//
// uint modulo4(uint val) {
// switch (val % uint(4)) {
// case 0: return 3;
// case 1: return 2;
// case 2: return 1;
// case 3: return 0;
// default: return 100; // place OpUnreachable here
// }
// }
//
// uint const5() {
// return 5;
// // place OpUnreachable here
// }
//
// void main() {
// uint x = gl_GlobalInvocationID.x;
// if (const5() > modulo4(1000)) {
// output_data.elements[x] = -input_data.elements[x];
// } else {
// // place OpUnreachable here
// output_data.elements[x] = input_data.elements[x];
// }
// }
tcu::TestCaseGroup* createOpUnreachableGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opunreachable", "Test the OpUnreachable instruction"));
ComputeShaderSpec spec;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> positiveFloats (numElements, 0);
vector<float> negativeFloats (numElements, 0);
fillRandomScalars(rnd, 1.f, 100.f, &positiveFloats[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
negativeFloats[ndx] = -positiveFloats[ndx];
spec.assembly =
string(getComputeAsmShaderPreamble()) +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %func_not_called_func \"not_called_func(\"\n"
"OpName %func_modulo4 \"modulo4(u1;\"\n"
"OpName %func_const5 \"const5(\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) +
"%u32ptr = OpTypePointer Function %u32\n"
"%uintfuint = OpTypeFunction %u32 %u32ptr\n"
"%unitf = OpTypeFunction %u32\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %u32 0\n"
"%one = OpConstant %u32 1\n"
"%two = OpConstant %u32 2\n"
"%three = OpConstant %u32 3\n"
"%four = OpConstant %u32 4\n"
"%five = OpConstant %u32 5\n"
"%hundred = OpConstant %u32 100\n"
"%thousand = OpConstant %u32 1000\n"
+ string(getComputeAsmInputOutputBuffer()) +
// Main()
"%main = OpFunction %void None %voidf\n"
"%main_entry = OpLabel\n"
"%v_thousand = OpVariable %u32ptr Function %thousand\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
"%ret_const5 = OpFunctionCall %u32 %func_const5\n"
"%ret_modulo4 = OpFunctionCall %u32 %func_modulo4 %v_thousand\n"
"%cmp_gt = OpUGreaterThan %bool %ret_const5 %ret_modulo4\n"
" OpSelectionMerge %if_end None\n"
" OpBranchConditional %cmp_gt %if_true %if_false\n"
"%if_true = OpLabel\n"
"%negate = OpFNegate %f32 %inval\n"
" OpStore %outloc %negate\n"
" OpBranch %if_end\n"
"%if_false = OpLabel\n"
" OpUnreachable\n" // Unreachable else branch for if statement
"%if_end = OpLabel\n"
" OpReturn\n"
" OpFunctionEnd\n"
// not_called_function()
"%func_not_called_func = OpFunction %void None %voidf\n"
"%not_called_func_entry = OpLabel\n"
" OpUnreachable\n" // Unreachable entry block in not called static function
" OpFunctionEnd\n"
// modulo4()
"%func_modulo4 = OpFunction %u32 None %uintfuint\n"
"%valptr = OpFunctionParameter %u32ptr\n"
"%modulo4_entry = OpLabel\n"
"%val = OpLoad %u32 %valptr\n"
"%modulo = OpUMod %u32 %val %four\n"
" OpSelectionMerge %switch_merge None\n"
" OpSwitch %modulo %default 0 %case0 1 %case1 2 %case2 3 %case3\n"
"%case0 = OpLabel\n"
" OpReturnValue %three\n"
"%case1 = OpLabel\n"
" OpReturnValue %two\n"
"%case2 = OpLabel\n"
" OpReturnValue %one\n"
"%case3 = OpLabel\n"
" OpReturnValue %zero\n"
"%default = OpLabel\n"
" OpUnreachable\n" // Unreachable default case for switch statement
"%switch_merge = OpLabel\n"
" OpUnreachable\n" // Unreachable merge block for switch statement
" OpFunctionEnd\n"
// const5()
"%func_const5 = OpFunction %u32 None %unitf\n"
"%const5_entry = OpLabel\n"
" OpReturnValue %five\n"
"%unreachable = OpLabel\n"
" OpUnreachable\n" // Unreachable block in function
" OpFunctionEnd\n";
spec.inputs.push_back(BufferSp(new Float32Buffer(positiveFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(negativeFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "all", "OpUnreachable appearing at different places", spec));
return group.release();
}
// Assembly code used for testing decoration group is based on GLSL source code:
//
// #version 430
//
// layout(std140, set = 0, binding = 0) readonly buffer Input0 {
// float elements[];
// } input_data0;
// layout(std140, set = 0, binding = 1) readonly buffer Input1 {
// float elements[];
// } input_data1;
// layout(std140, set = 0, binding = 2) readonly buffer Input2 {
// float elements[];
// } input_data2;
// layout(std140, set = 0, binding = 3) readonly buffer Input3 {
// float elements[];
// } input_data3;
// layout(std140, set = 0, binding = 4) readonly buffer Input4 {
// float elements[];
// } input_data4;
// layout(std140, set = 0, binding = 5) writeonly buffer Output {
// float elements[];
// } output_data;
//
// void main() {
// uint x = gl_GlobalInvocationID.x;
// output_data.elements[x] = input_data0.elements[x] + input_data1.elements[x] + input_data2.elements[x] + input_data3.elements[x] + input_data4.elements[x];
// }
tcu::TestCaseGroup* createDecorationGroupGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "decoration_group", "Test the OpDecorationGroup & OpGroupDecorate instruction"));
ComputeShaderSpec spec;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> inputFloats0 (numElements, 0);
vector<float> inputFloats1 (numElements, 0);
vector<float> inputFloats2 (numElements, 0);
vector<float> inputFloats3 (numElements, 0);
vector<float> inputFloats4 (numElements, 0);
vector<float> outputFloats (numElements, 0);
fillRandomScalars(rnd, -300.f, 300.f, &inputFloats0[0], numElements);
fillRandomScalars(rnd, -300.f, 300.f, &inputFloats1[0], numElements);
fillRandomScalars(rnd, -300.f, 300.f, &inputFloats2[0], numElements);
fillRandomScalars(rnd, -300.f, 300.f, &inputFloats3[0], numElements);
fillRandomScalars(rnd, -300.f, 300.f, &inputFloats4[0], numElements);
// CPU might not use the same rounding mode as the GPU. Use whole numbers to avoid rounding differences.
floorAll(inputFloats0);
floorAll(inputFloats1);
floorAll(inputFloats2);
floorAll(inputFloats3);
floorAll(inputFloats4);
for (size_t ndx = 0; ndx < numElements; ++ndx)
outputFloats[ndx] = inputFloats0[ndx] + inputFloats1[ndx] + inputFloats2[ndx] + inputFloats3[ndx] + inputFloats4[ndx];
spec.assembly =
string(getComputeAsmShaderPreamble()) +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
// Not using group decoration on variable.
"OpDecorate %id BuiltIn GlobalInvocationId\n"
// Not using group decoration on type.
"OpDecorate %f32arr ArrayStride 4\n"
"OpDecorate %groups BufferBlock\n"
"OpDecorate %groupm Offset 0\n"
"%groups = OpDecorationGroup\n"
"%groupm = OpDecorationGroup\n"
// Group decoration on multiple structs.
"OpGroupDecorate %groups %outbuf %inbuf0 %inbuf1 %inbuf2 %inbuf3 %inbuf4\n"
// Group decoration on multiple struct members.
"OpGroupMemberDecorate %groupm %outbuf 0 %inbuf0 0 %inbuf1 0 %inbuf2 0 %inbuf3 0 %inbuf4 0\n"
"OpDecorate %group1 DescriptorSet 0\n"
"OpDecorate %group3 DescriptorSet 0\n"
"OpDecorate %group3 NonWritable\n"
"OpDecorate %group3 Restrict\n"
"%group0 = OpDecorationGroup\n"
"%group1 = OpDecorationGroup\n"
"%group3 = OpDecorationGroup\n"
// Applying the same decoration group multiple times.
"OpGroupDecorate %group1 %outdata\n"
"OpGroupDecorate %group1 %outdata\n"
"OpGroupDecorate %group1 %outdata\n"
"OpDecorate %outdata DescriptorSet 0\n"
"OpDecorate %outdata Binding 5\n"
// Applying decoration group containing nothing.
"OpGroupDecorate %group0 %indata0\n"
"OpDecorate %indata0 DescriptorSet 0\n"
"OpDecorate %indata0 Binding 0\n"
// Applying decoration group containing one decoration.
"OpGroupDecorate %group1 %indata1\n"
"OpDecorate %indata1 Binding 1\n"
// Applying decoration group containing multiple decorations.
"OpGroupDecorate %group3 %indata2 %indata3\n"
"OpDecorate %indata2 Binding 2\n"
"OpDecorate %indata3 Binding 3\n"
// Applying multiple decoration groups (with overlapping).
"OpGroupDecorate %group0 %indata4\n"
"OpGroupDecorate %group1 %indata4\n"
"OpGroupDecorate %group3 %indata4\n"
"OpDecorate %indata4 Binding 4\n"
+ string(getComputeAsmCommonTypes()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%outbuf = OpTypeStruct %f32arr\n"
"%outbufptr = OpTypePointer Uniform %outbuf\n"
"%outdata = OpVariable %outbufptr Uniform\n"
"%inbuf0 = OpTypeStruct %f32arr\n"
"%inbuf0ptr = OpTypePointer Uniform %inbuf0\n"
"%indata0 = OpVariable %inbuf0ptr Uniform\n"
"%inbuf1 = OpTypeStruct %f32arr\n"
"%inbuf1ptr = OpTypePointer Uniform %inbuf1\n"
"%indata1 = OpVariable %inbuf1ptr Uniform\n"
"%inbuf2 = OpTypeStruct %f32arr\n"
"%inbuf2ptr = OpTypePointer Uniform %inbuf2\n"
"%indata2 = OpVariable %inbuf2ptr Uniform\n"
"%inbuf3 = OpTypeStruct %f32arr\n"
"%inbuf3ptr = OpTypePointer Uniform %inbuf3\n"
"%indata3 = OpVariable %inbuf3ptr Uniform\n"
"%inbuf4 = OpTypeStruct %f32arr\n"
"%inbufptr = OpTypePointer Uniform %inbuf4\n"
"%indata4 = OpVariable %inbufptr Uniform\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc0 = OpAccessChain %f32ptr %indata0 %zero %x\n"
"%inloc1 = OpAccessChain %f32ptr %indata1 %zero %x\n"
"%inloc2 = OpAccessChain %f32ptr %indata2 %zero %x\n"
"%inloc3 = OpAccessChain %f32ptr %indata3 %zero %x\n"
"%inloc4 = OpAccessChain %f32ptr %indata4 %zero %x\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
"%inval0 = OpLoad %f32 %inloc0\n"
"%inval1 = OpLoad %f32 %inloc1\n"
"%inval2 = OpLoad %f32 %inloc2\n"
"%inval3 = OpLoad %f32 %inloc3\n"
"%inval4 = OpLoad %f32 %inloc4\n"
"%add0 = OpFAdd %f32 %inval0 %inval1\n"
"%add1 = OpFAdd %f32 %add0 %inval2\n"
"%add2 = OpFAdd %f32 %add1 %inval3\n"
"%add = OpFAdd %f32 %add2 %inval4\n"
" OpStore %outloc %add\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats0)));
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats1)));
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats2)));
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats3)));
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats4)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "all", "decoration group cases", spec));
return group.release();
}
struct SpecConstantTwoIntCase
{
const char* caseName;
const char* scDefinition0;
const char* scDefinition1;
const char* scResultType;
const char* scOperation;
deInt32 scActualValue0;
deInt32 scActualValue1;
const char* resultOperation;
vector<deInt32> expectedOutput;
SpecConstantTwoIntCase (const char* name,
const char* definition0,
const char* definition1,
const char* resultType,
const char* operation,
deInt32 value0,
deInt32 value1,
const char* resultOp,
const vector<deInt32>& output)
: caseName (name)
, scDefinition0 (definition0)
, scDefinition1 (definition1)
, scResultType (resultType)
, scOperation (operation)
, scActualValue0 (value0)
, scActualValue1 (value1)
, resultOperation (resultOp)
, expectedOutput (output) {}
};
tcu::TestCaseGroup* createSpecConstantGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opspecconstantop", "Test the OpSpecConstantOp instruction"));
vector<SpecConstantTwoIntCase> cases;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<deInt32> inputInts (numElements, 0);
vector<deInt32> outputInts1 (numElements, 0);
vector<deInt32> outputInts2 (numElements, 0);
vector<deInt32> outputInts3 (numElements, 0);
vector<deInt32> outputInts4 (numElements, 0);
const StringTemplate shaderTemplate (
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpDecorate %sc_0 SpecId 0\n"
"OpDecorate %sc_1 SpecId 1\n"
"OpDecorate %i32arr ArrayStride 4\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) +
"%buf = OpTypeStruct %i32arr\n"
"%bufptr = OpTypePointer Uniform %buf\n"
"%indata = OpVariable %bufptr Uniform\n"
"%outdata = OpVariable %bufptr Uniform\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%sc_0 = OpSpecConstant${SC_DEF0}\n"
"%sc_1 = OpSpecConstant${SC_DEF1}\n"
"%sc_final = OpSpecConstantOp ${SC_RESULT_TYPE} ${SC_OP}\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %i32ptr %indata %zero %x\n"
"%inval = OpLoad %i32 %inloc\n"
"%final = ${GEN_RESULT}\n"
"%outloc = OpAccessChain %i32ptr %outdata %zero %x\n"
" OpStore %outloc %final\n"
" OpReturn\n"
" OpFunctionEnd\n");
fillRandomScalars(rnd, -65536, 65536, &inputInts[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
{
outputInts1[ndx] = inputInts[ndx] + 42;
outputInts2[ndx] = inputInts[ndx];
outputInts3[ndx] = inputInts[ndx] - 11200;
outputInts4[ndx] = inputInts[ndx] + 1;
}
const char addScToInput[] = "OpIAdd %i32 %inval %sc_final";
const char selectTrueUsingSc[] = "OpSelect %i32 %sc_final %inval %zero";
const char selectFalseUsingSc[] = "OpSelect %i32 %sc_final %zero %inval";
cases.push_back(SpecConstantTwoIntCase("iadd", " %i32 0", " %i32 0", "%i32", "IAdd %sc_0 %sc_1", 62, -20, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("isub", " %i32 0", " %i32 0", "%i32", "ISub %sc_0 %sc_1", 100, 58, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("imul", " %i32 0", " %i32 0", "%i32", "IMul %sc_0 %sc_1", -2, -21, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("sdiv", " %i32 0", " %i32 0", "%i32", "SDiv %sc_0 %sc_1", -126, -3, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("udiv", " %i32 0", " %i32 0", "%i32", "UDiv %sc_0 %sc_1", 126, 3, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("srem", " %i32 0", " %i32 0", "%i32", "SRem %sc_0 %sc_1", 7, 3, addScToInput, outputInts4));
cases.push_back(SpecConstantTwoIntCase("smod", " %i32 0", " %i32 0", "%i32", "SMod %sc_0 %sc_1", 7, 3, addScToInput, outputInts4));
cases.push_back(SpecConstantTwoIntCase("umod", " %i32 0", " %i32 0", "%i32", "UMod %sc_0 %sc_1", 342, 50, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("bitwiseand", " %i32 0", " %i32 0", "%i32", "BitwiseAnd %sc_0 %sc_1", 42, 63, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("bitwiseor", " %i32 0", " %i32 0", "%i32", "BitwiseOr %sc_0 %sc_1", 34, 8, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("bitwisexor", " %i32 0", " %i32 0", "%i32", "BitwiseXor %sc_0 %sc_1", 18, 56, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("shiftrightlogical", " %i32 0", " %i32 0", "%i32", "ShiftRightLogical %sc_0 %sc_1", 168, 2, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("shiftrightarithmetic", " %i32 0", " %i32 0", "%i32", "ShiftRightArithmetic %sc_0 %sc_1", 168, 2, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("shiftleftlogical", " %i32 0", " %i32 0", "%i32", "ShiftLeftLogical %sc_0 %sc_1", 21, 1, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("slessthan", " %i32 0", " %i32 0", "%bool", "SLessThan %sc_0 %sc_1", -20, -10, selectTrueUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("ulessthan", " %i32 0", " %i32 0", "%bool", "ULessThan %sc_0 %sc_1", 10, 20, selectTrueUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("sgreaterthan", " %i32 0", " %i32 0", "%bool", "SGreaterThan %sc_0 %sc_1", -1000, 50, selectFalseUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("ugreaterthan", " %i32 0", " %i32 0", "%bool", "UGreaterThan %sc_0 %sc_1", 10, 5, selectTrueUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("slessthanequal", " %i32 0", " %i32 0", "%bool", "SLessThanEqual %sc_0 %sc_1", -10, -10, selectTrueUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("ulessthanequal", " %i32 0", " %i32 0", "%bool", "ULessThanEqual %sc_0 %sc_1", 50, 100, selectTrueUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("sgreaterthanequal", " %i32 0", " %i32 0", "%bool", "SGreaterThanEqual %sc_0 %sc_1", -1000, 50, selectFalseUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("ugreaterthanequal", " %i32 0", " %i32 0", "%bool", "UGreaterThanEqual %sc_0 %sc_1", 10, 10, selectTrueUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("iequal", " %i32 0", " %i32 0", "%bool", "IEqual %sc_0 %sc_1", 42, 24, selectFalseUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("logicaland", "True %bool", "True %bool", "%bool", "LogicalAnd %sc_0 %sc_1", 0, 1, selectFalseUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("logicalor", "False %bool", "False %bool", "%bool", "LogicalOr %sc_0 %sc_1", 1, 0, selectTrueUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("logicalequal", "True %bool", "True %bool", "%bool", "LogicalEqual %sc_0 %sc_1", 0, 1, selectFalseUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("logicalnotequal", "False %bool", "False %bool", "%bool", "LogicalNotEqual %sc_0 %sc_1", 1, 0, selectTrueUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("snegate", " %i32 0", " %i32 0", "%i32", "SNegate %sc_0", -42, 0, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("not", " %i32 0", " %i32 0", "%i32", "Not %sc_0", -43, 0, addScToInput, outputInts1));
cases.push_back(SpecConstantTwoIntCase("logicalnot", "False %bool", "False %bool", "%bool", "LogicalNot %sc_0", 1, 0, selectFalseUsingSc, outputInts2));
cases.push_back(SpecConstantTwoIntCase("select", "False %bool", " %i32 0", "%i32", "Select %sc_0 %sc_1 %zero", 1, 42, addScToInput, outputInts1));
// OpSConvert, OpFConvert: these two instructions involve ints/floats of different bitwidths.
for (size_t caseNdx = 0; caseNdx < cases.size(); ++caseNdx)
{
map<string, string> specializations;
ComputeShaderSpec spec;
specializations["SC_DEF0"] = cases[caseNdx].scDefinition0;
specializations["SC_DEF1"] = cases[caseNdx].scDefinition1;
specializations["SC_RESULT_TYPE"] = cases[caseNdx].scResultType;
specializations["SC_OP"] = cases[caseNdx].scOperation;
specializations["GEN_RESULT"] = cases[caseNdx].resultOperation;
spec.assembly = shaderTemplate.specialize(specializations);
spec.inputs.push_back(BufferSp(new Int32Buffer(inputInts)));
spec.outputs.push_back(BufferSp(new Int32Buffer(cases[caseNdx].expectedOutput)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
spec.specConstants.push_back(cases[caseNdx].scActualValue0);
spec.specConstants.push_back(cases[caseNdx].scActualValue1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, cases[caseNdx].caseName, cases[caseNdx].caseName, spec));
}
ComputeShaderSpec spec;
spec.assembly =
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpDecorate %sc_0 SpecId 0\n"
"OpDecorate %sc_1 SpecId 1\n"
"OpDecorate %sc_2 SpecId 2\n"
"OpDecorate %i32arr ArrayStride 4\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) +
"%ivec3 = OpTypeVector %i32 3\n"
"%buf = OpTypeStruct %i32arr\n"
"%bufptr = OpTypePointer Uniform %buf\n"
"%indata = OpVariable %bufptr Uniform\n"
"%outdata = OpVariable %bufptr Uniform\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%ivec3_0 = OpConstantComposite %ivec3 %zero %zero %zero\n"
"%sc_0 = OpSpecConstant %i32 0\n"
"%sc_1 = OpSpecConstant %i32 0\n"
"%sc_2 = OpSpecConstant %i32 0\n"
"%sc_vec3_0 = OpSpecConstantOp %ivec3 CompositeInsert %sc_0 %ivec3_0 0\n" // (sc_0, 0, 0)
"%sc_vec3_1 = OpSpecConstantOp %ivec3 CompositeInsert %sc_1 %ivec3_0 1\n" // (0, sc_1, 0)
"%sc_vec3_2 = OpSpecConstantOp %ivec3 CompositeInsert %sc_2 %ivec3_0 2\n" // (0, 0, sc_2)
"%sc_vec3_01 = OpSpecConstantOp %ivec3 VectorShuffle %sc_vec3_0 %sc_vec3_1 1 0 4\n" // (0, sc_0, sc_1)
"%sc_vec3_012 = OpSpecConstantOp %ivec3 VectorShuffle %sc_vec3_01 %sc_vec3_2 5 1 2\n" // (sc_2, sc_0, sc_1)
"%sc_ext_0 = OpSpecConstantOp %i32 CompositeExtract %sc_vec3_012 0\n" // sc_2
"%sc_ext_1 = OpSpecConstantOp %i32 CompositeExtract %sc_vec3_012 1\n" // sc_0
"%sc_ext_2 = OpSpecConstantOp %i32 CompositeExtract %sc_vec3_012 2\n" // sc_1
"%sc_sub = OpSpecConstantOp %i32 ISub %sc_ext_0 %sc_ext_1\n" // (sc_2 - sc_0)
"%sc_final = OpSpecConstantOp %i32 IMul %sc_sub %sc_ext_2\n" // (sc_2 - sc_0) * sc_1
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %i32ptr %indata %zero %x\n"
"%inval = OpLoad %i32 %inloc\n"
"%final = OpIAdd %i32 %inval %sc_final\n"
"%outloc = OpAccessChain %i32ptr %outdata %zero %x\n"
" OpStore %outloc %final\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec.inputs.push_back(BufferSp(new Int32Buffer(inputInts)));
spec.outputs.push_back(BufferSp(new Int32Buffer(outputInts3)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
spec.specConstants.push_back(123);
spec.specConstants.push_back(56);
spec.specConstants.push_back(-77);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "vector_related", "VectorShuffle, CompositeExtract, & CompositeInsert", spec));
return group.release();
}
tcu::TestCaseGroup* createOpPhiGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opphi", "Test the OpPhi instruction"));
ComputeShaderSpec spec1;
ComputeShaderSpec spec2;
ComputeShaderSpec spec3;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> inputFloats (numElements, 0);
vector<float> outputFloats1 (numElements, 0);
vector<float> outputFloats2 (numElements, 0);
vector<float> outputFloats3 (numElements, 0);
fillRandomScalars(rnd, -300.f, 300.f, &inputFloats[0], numElements);
// CPU might not use the same rounding mode as the GPU. Use whole numbers to avoid rounding differences.
floorAll(inputFloats);
for (size_t ndx = 0; ndx < numElements; ++ndx)
{
switch (ndx % 3)
{
case 0: outputFloats1[ndx] = inputFloats[ndx] + 5.5f; break;
case 1: outputFloats1[ndx] = inputFloats[ndx] + 20.5f; break;
case 2: outputFloats1[ndx] = inputFloats[ndx] + 1.75f; break;
default: break;
}
outputFloats2[ndx] = inputFloats[ndx] + 6.5f * 3;
outputFloats3[ndx] = 8.5f - inputFloats[ndx];
}
spec1.assembly =
string(getComputeAsmShaderPreamble()) +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%three = OpConstant %u32 3\n"
"%constf5p5 = OpConstant %f32 5.5\n"
"%constf20p5 = OpConstant %f32 20.5\n"
"%constf1p75 = OpConstant %f32 1.75\n"
"%constf8p5 = OpConstant %f32 8.5\n"
"%constf6p5 = OpConstant %f32 6.5\n"
"%main = OpFunction %void None %voidf\n"
"%entry = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%selector = OpUMod %u32 %x %three\n"
" OpSelectionMerge %phi None\n"
" OpSwitch %selector %default 0 %case0 1 %case1 2 %case2\n"
// Case 1 before OpPhi.
"%case1 = OpLabel\n"
" OpBranch %phi\n"
"%default = OpLabel\n"
" OpUnreachable\n"
"%phi = OpLabel\n"
"%operand = OpPhi %f32 %constf1p75 %case2 %constf20p5 %case1 %constf5p5 %case0\n" // not in the order of blocks
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%add = OpFAdd %f32 %inval %operand\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %add\n"
" OpReturn\n"
// Case 0 after OpPhi.
"%case0 = OpLabel\n"
" OpBranch %phi\n"
// Case 2 after OpPhi.
"%case2 = OpLabel\n"
" OpBranch %phi\n"
" OpFunctionEnd\n";
spec1.inputs.push_back(BufferSp(new Float32Buffer(inputFloats)));
spec1.outputs.push_back(BufferSp(new Float32Buffer(outputFloats1)));
spec1.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "block", "out-of-order and unreachable blocks for OpPhi", spec1));
spec2.assembly =
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%one = OpConstant %i32 1\n"
"%three = OpConstant %i32 3\n"
"%constf6p5 = OpConstant %f32 6.5\n"
"%main = OpFunction %void None %voidf\n"
"%entry = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
" OpBranch %phi\n"
"%phi = OpLabel\n"
"%step = OpPhi %i32 %zero %entry %step_next %phi\n"
"%accum = OpPhi %f32 %inval %entry %accum_next %phi\n"
"%step_next = OpIAdd %i32 %step %one\n"
"%accum_next = OpFAdd %f32 %accum %constf6p5\n"
"%still_loop = OpSLessThan %bool %step %three\n"
" OpLoopMerge %exit %phi None\n"
" OpBranchConditional %still_loop %phi %exit\n"
"%exit = OpLabel\n"
" OpStore %outloc %accum\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec2.inputs.push_back(BufferSp(new Float32Buffer(inputFloats)));
spec2.outputs.push_back(BufferSp(new Float32Buffer(outputFloats2)));
spec2.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "induction", "The usual way induction variables are handled in LLVM IR", spec2));
spec3.assembly =
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%f32ptr_f = OpTypePointer Function %f32\n"
"%id = OpVariable %uvec3ptr Input\n"
"%true = OpConstantTrue %bool\n"
"%false = OpConstantFalse %bool\n"
"%zero = OpConstant %i32 0\n"
"%constf8p5 = OpConstant %f32 8.5\n"
"%main = OpFunction %void None %voidf\n"
"%entry = OpLabel\n"
"%b = OpVariable %f32ptr_f Function %constf8p5\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
"%a_init = OpLoad %f32 %inloc\n"
"%b_init = OpLoad %f32 %b\n"
" OpBranch %phi\n"
"%phi = OpLabel\n"
"%still_loop = OpPhi %bool %true %entry %false %phi\n"
"%a_next = OpPhi %f32 %a_init %entry %b_next %phi\n"
"%b_next = OpPhi %f32 %b_init %entry %a_next %phi\n"
" OpLoopMerge %exit %phi None\n"
" OpBranchConditional %still_loop %phi %exit\n"
"%exit = OpLabel\n"
"%sub = OpFSub %f32 %a_next %b_next\n"
" OpStore %outloc %sub\n"
" OpReturn\n"
" OpFunctionEnd\n";
spec3.inputs.push_back(BufferSp(new Float32Buffer(inputFloats)));
spec3.outputs.push_back(BufferSp(new Float32Buffer(outputFloats3)));
spec3.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "swap", "Swap the values of two variables using OpPhi", spec3));
return group.release();
}
// Assembly code used for testing block order is based on GLSL source code:
//
// #version 430
//
// layout(std140, set = 0, binding = 0) readonly buffer Input {
// float elements[];
// } input_data;
// layout(std140, set = 0, binding = 1) writeonly buffer Output {
// float elements[];
// } output_data;
//
// void main() {
// uint x = gl_GlobalInvocationID.x;
// output_data.elements[x] = input_data.elements[x];
// if (x > uint(50)) {
// switch (x % uint(3)) {
// case 0: output_data.elements[x] += 1.5f; break;
// case 1: output_data.elements[x] += 42.f; break;
// case 2: output_data.elements[x] -= 27.f; break;
// default: break;
// }
// } else {
// output_data.elements[x] = -input_data.elements[x];
// }
// }
tcu::TestCaseGroup* createBlockOrderGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "block_order", "Test block orders"));
ComputeShaderSpec spec;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> inputFloats (numElements, 0);
vector<float> outputFloats (numElements, 0);
fillRandomScalars(rnd, -100.f, 100.f, &inputFloats[0], numElements);
// CPU might not use the same rounding mode as the GPU. Use whole numbers to avoid rounding differences.
floorAll(inputFloats);
for (size_t ndx = 0; ndx <= 50; ++ndx)
outputFloats[ndx] = -inputFloats[ndx];
for (size_t ndx = 51; ndx < numElements; ++ndx)
{
switch (ndx % 3)
{
case 0: outputFloats[ndx] = inputFloats[ndx] + 1.5f; break;
case 1: outputFloats[ndx] = inputFloats[ndx] + 42.f; break;
case 2: outputFloats[ndx] = inputFloats[ndx] - 27.f; break;
default: break;
}
}
spec.assembly =
string(getComputeAsmShaderPreamble()) +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) +
"%u32ptr = OpTypePointer Function %u32\n"
"%u32ptr_input = OpTypePointer Input %u32\n"
+ string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%const3 = OpConstant %u32 3\n"
"%const50 = OpConstant %u32 50\n"
"%constf1p5 = OpConstant %f32 1.5\n"
"%constf27 = OpConstant %f32 27.0\n"
"%constf42 = OpConstant %f32 42.0\n"
"%main = OpFunction %void None %voidf\n"
// entry block.
"%entry = OpLabel\n"
// Create a temporary variable to hold the value of gl_GlobalInvocationID.x.
"%xvar = OpVariable %u32ptr Function\n"
"%xptr = OpAccessChain %u32ptr_input %id %zero\n"
"%x = OpLoad %u32 %xptr\n"
" OpStore %xvar %x\n"
"%cmp = OpUGreaterThan %bool %x %const50\n"
" OpSelectionMerge %if_merge None\n"
" OpBranchConditional %cmp %if_true %if_false\n"
// False branch for if-statement: placed in the middle of switch cases and before true branch.
"%if_false = OpLabel\n"
"%x_f = OpLoad %u32 %xvar\n"
"%inloc_f = OpAccessChain %f32ptr %indata %zero %x_f\n"
"%inval_f = OpLoad %f32 %inloc_f\n"
"%negate = OpFNegate %f32 %inval_f\n"
"%outloc_f = OpAccessChain %f32ptr %outdata %zero %x_f\n"
" OpStore %outloc_f %negate\n"
" OpBranch %if_merge\n"
// Merge block for if-statement: placed in the middle of true and false branch.
"%if_merge = OpLabel\n"
" OpReturn\n"
// True branch for if-statement: placed in the middle of swtich cases and after the false branch.
"%if_true = OpLabel\n"
"%xval_t = OpLoad %u32 %xvar\n"
"%mod = OpUMod %u32 %xval_t %const3\n"
" OpSelectionMerge %switch_merge None\n"
" OpSwitch %mod %default 0 %case0 1 %case1 2 %case2\n"
// Merge block for switch-statement: placed before the case
// bodies. But it must follow OpSwitch which dominates it.
"%switch_merge = OpLabel\n"
" OpBranch %if_merge\n"
// Case 1 for switch-statement: placed before case 0.
// It must follow the OpSwitch that dominates it.
"%case1 = OpLabel\n"
"%x_1 = OpLoad %u32 %xvar\n"
"%inloc_1 = OpAccessChain %f32ptr %indata %zero %x_1\n"
"%inval_1 = OpLoad %f32 %inloc_1\n"
"%addf42 = OpFAdd %f32 %inval_1 %constf42\n"
"%outloc_1 = OpAccessChain %f32ptr %outdata %zero %x_1\n"
" OpStore %outloc_1 %addf42\n"
" OpBranch %switch_merge\n"
// Case 2 for switch-statement.
"%case2 = OpLabel\n"
"%x_2 = OpLoad %u32 %xvar\n"
"%inloc_2 = OpAccessChain %f32ptr %indata %zero %x_2\n"
"%inval_2 = OpLoad %f32 %inloc_2\n"
"%subf27 = OpFSub %f32 %inval_2 %constf27\n"
"%outloc_2 = OpAccessChain %f32ptr %outdata %zero %x_2\n"
" OpStore %outloc_2 %subf27\n"
" OpBranch %switch_merge\n"
// Default case for switch-statement: placed in the middle of normal cases.
"%default = OpLabel\n"
" OpBranch %switch_merge\n"
// Case 0 for switch-statement: out of order.
"%case0 = OpLabel\n"
"%x_0 = OpLoad %u32 %xvar\n"
"%inloc_0 = OpAccessChain %f32ptr %indata %zero %x_0\n"
"%inval_0 = OpLoad %f32 %inloc_0\n"
"%addf1p5 = OpFAdd %f32 %inval_0 %constf1p5\n"
"%outloc_0 = OpAccessChain %f32ptr %outdata %zero %x_0\n"
" OpStore %outloc_0 %addf1p5\n"
" OpBranch %switch_merge\n"
" OpFunctionEnd\n";
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, "all", "various out-of-order blocks", spec));
return group.release();
}
tcu::TestCaseGroup* createMultipleShaderGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "multiple_shaders", "Test multiple shaders in the same module"));
ComputeShaderSpec spec1;
ComputeShaderSpec spec2;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> inputFloats (numElements, 0);
vector<float> outputFloats1 (numElements, 0);
vector<float> outputFloats2 (numElements, 0);
fillRandomScalars(rnd, -500.f, 500.f, &inputFloats[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
{
outputFloats1[ndx] = inputFloats[ndx] + inputFloats[ndx];
outputFloats2[ndx] = -inputFloats[ndx];
}
const string assembly(
"OpCapability Shader\n"
"OpCapability ClipDistance\n"
"OpMemoryModel Logical GLSL450\n"
"OpEntryPoint GLCompute %comp_main1 \"entrypoint1\" %id\n"
"OpEntryPoint GLCompute %comp_main2 \"entrypoint2\" %id\n"
// A module cannot have two OpEntryPoint instructions with the same Execution Model and the same Name string.
"OpEntryPoint Vertex %vert_main \"entrypoint2\" %vert_builtins %vertexIndex %instanceIndex\n"
"OpExecutionMode %comp_main1 LocalSize 1 1 1\n"
"OpExecutionMode %comp_main2 LocalSize 1 1 1\n"
"OpName %comp_main1 \"entrypoint1\"\n"
"OpName %comp_main2 \"entrypoint2\"\n"
"OpName %vert_main \"entrypoint2\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpName %vert_builtin_st \"gl_PerVertex\"\n"
"OpName %vertexIndex \"gl_VertexIndex\"\n"
"OpName %instanceIndex \"gl_InstanceIndex\"\n"
"OpMemberName %vert_builtin_st 0 \"gl_Position\"\n"
"OpMemberName %vert_builtin_st 1 \"gl_PointSize\"\n"
"OpMemberName %vert_builtin_st 2 \"gl_ClipDistance\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpDecorate %vertexIndex BuiltIn VertexIndex\n"
"OpDecorate %instanceIndex BuiltIn InstanceIndex\n"
"OpDecorate %vert_builtin_st Block\n"
"OpMemberDecorate %vert_builtin_st 0 BuiltIn Position\n"
"OpMemberDecorate %vert_builtin_st 1 BuiltIn PointSize\n"
"OpMemberDecorate %vert_builtin_st 2 BuiltIn ClipDistance\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%zero = OpConstant %i32 0\n"
"%one = OpConstant %u32 1\n"
"%c_f32_1 = OpConstant %f32 1\n"
"%i32inputptr = OpTypePointer Input %i32\n"
"%vec4 = OpTypeVector %f32 4\n"
"%vec4ptr = OpTypePointer Output %vec4\n"
"%f32arr1 = OpTypeArray %f32 %one\n"
"%vert_builtin_st = OpTypeStruct %vec4 %f32 %f32arr1\n"
"%vert_builtin_st_ptr = OpTypePointer Output %vert_builtin_st\n"
"%vert_builtins = OpVariable %vert_builtin_st_ptr Output\n"
"%id = OpVariable %uvec3ptr Input\n"
"%vertexIndex = OpVariable %i32inputptr Input\n"
"%instanceIndex = OpVariable %i32inputptr Input\n"
"%c_vec4_1 = OpConstantComposite %vec4 %c_f32_1 %c_f32_1 %c_f32_1 %c_f32_1\n"
// gl_Position = vec4(1.);
"%vert_main = OpFunction %void None %voidf\n"
"%vert_entry = OpLabel\n"
"%position = OpAccessChain %vec4ptr %vert_builtins %zero\n"
" OpStore %position %c_vec4_1\n"
" OpReturn\n"
" OpFunctionEnd\n"
// Double inputs.
"%comp_main1 = OpFunction %void None %voidf\n"
"%comp1_entry = OpLabel\n"
"%idval1 = OpLoad %uvec3 %id\n"
"%x1 = OpCompositeExtract %u32 %idval1 0\n"
"%inloc1 = OpAccessChain %f32ptr %indata %zero %x1\n"
"%inval1 = OpLoad %f32 %inloc1\n"
"%add = OpFAdd %f32 %inval1 %inval1\n"
"%outloc1 = OpAccessChain %f32ptr %outdata %zero %x1\n"
" OpStore %outloc1 %add\n"
" OpReturn\n"
" OpFunctionEnd\n"
// Negate inputs.
"%comp_main2 = OpFunction %void None %voidf\n"
"%comp2_entry = OpLabel\n"
"%idval2 = OpLoad %uvec3 %id\n"
"%x2 = OpCompositeExtract %u32 %idval2 0\n"
"%inloc2 = OpAccessChain %f32ptr %indata %zero %x2\n"
"%inval2 = OpLoad %f32 %inloc2\n"
"%neg = OpFNegate %f32 %inval2\n"
"%outloc2 = OpAccessChain %f32ptr %outdata %zero %x2\n"
" OpStore %outloc2 %neg\n"
" OpReturn\n"
" OpFunctionEnd\n");
spec1.assembly = assembly;
spec1.inputs.push_back(BufferSp(new Float32Buffer(inputFloats)));
spec1.outputs.push_back(BufferSp(new Float32Buffer(outputFloats1)));
spec1.numWorkGroups = IVec3(numElements, 1, 1);
spec1.entryPoint = "entrypoint1";
spec2.assembly = assembly;
spec2.inputs.push_back(BufferSp(new Float32Buffer(inputFloats)));
spec2.outputs.push_back(BufferSp(new Float32Buffer(outputFloats2)));
spec2.numWorkGroups = IVec3(numElements, 1, 1);
spec2.entryPoint = "entrypoint2";
group->addChild(new SpvAsmComputeShaderCase(testCtx, "shader1", "multiple shaders in the same module", spec1));
group->addChild(new SpvAsmComputeShaderCase(testCtx, "shader2", "multiple shaders in the same module", spec2));
return group.release();
}
inline std::string makeLongUTF8String (size_t num4ByteChars)
{
// An example of a longest valid UTF-8 character. Be explicit about the
// character type because Microsoft compilers can otherwise interpret the
// character string as being over wide (16-bit) characters. Ideally, we
// would just use a C++11 UTF-8 string literal, but we want to support older
// Microsoft compilers.
const std::basic_string<char> earthAfrica("\xF0\x9F\x8C\x8D");
std::string longString;
longString.reserve(num4ByteChars * 4);
for (size_t count = 0; count < num4ByteChars; count++)
{
longString += earthAfrica;
}
return longString;
}
tcu::TestCaseGroup* createOpSourceGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opsource", "Tests the OpSource & OpSourceContinued instruction"));
vector<CaseParameter> cases;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> positiveFloats (numElements, 0);
vector<float> negativeFloats (numElements, 0);
const StringTemplate shaderTemplate (
"OpCapability Shader\n"
"OpMemoryModel Logical GLSL450\n"
"OpEntryPoint GLCompute %main \"main\" %id\n"
"OpExecutionMode %main LocalSize 1 1 1\n"
"${SOURCE}\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%neg = OpFNegate %f32 %inval\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %neg\n"
" OpReturn\n"
" OpFunctionEnd\n");
cases.push_back(CaseParameter("unknown_source", "OpSource Unknown 0"));
cases.push_back(CaseParameter("wrong_source", "OpSource OpenCL_C 210"));
cases.push_back(CaseParameter("normal_filename", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname"));
cases.push_back(CaseParameter("empty_filename", "%fname = OpString \"\"\n"
"OpSource GLSL 430 %fname"));
cases.push_back(CaseParameter("normal_source_code", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"#version 430\nvoid main() {}\""));
cases.push_back(CaseParameter("empty_source_code", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"\""));
cases.push_back(CaseParameter("long_source_code", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"" + makeLongUTF8String(65530) + "ccc\"")); // word count: 65535
cases.push_back(CaseParameter("utf8_source_code", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"\xE2\x98\x82\xE2\x98\x85\"")); // umbrella & black star symbol
cases.push_back(CaseParameter("normal_sourcecontinued", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"#version 430\nvo\"\n"
"OpSourceContinued \"id main() {}\""));
cases.push_back(CaseParameter("empty_sourcecontinued", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"#version 430\nvoid main() {}\"\n"
"OpSourceContinued \"\""));
cases.push_back(CaseParameter("long_sourcecontinued", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"#version 430\nvoid main() {}\"\n"
"OpSourceContinued \"" + makeLongUTF8String(65533) + "ccc\"")); // word count: 65535
cases.push_back(CaseParameter("utf8_sourcecontinued", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"#version 430\nvoid main() {}\"\n"
"OpSourceContinued \"\xE2\x98\x8E\xE2\x9A\x91\"")); // white telephone & black flag symbol
cases.push_back(CaseParameter("multi_sourcecontinued", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"#version 430\n\"\n"
"OpSourceContinued \"void\"\n"
"OpSourceContinued \"main()\"\n"
"OpSourceContinued \"{}\""));
cases.push_back(CaseParameter("empty_source_before_sourcecontinued", "%fname = OpString \"filename\"\n"
"OpSource GLSL 430 %fname \"\"\n"
"OpSourceContinued \"#version 430\nvoid main() {}\""));
fillRandomScalars(rnd, 1.f, 100.f, &positiveFloats[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
negativeFloats[ndx] = -positiveFloats[ndx];
for (size_t caseNdx = 0; caseNdx < cases.size(); ++caseNdx)
{
map<string, string> specializations;
ComputeShaderSpec spec;
specializations["SOURCE"] = cases[caseNdx].param;
spec.assembly = shaderTemplate.specialize(specializations);
spec.inputs.push_back(BufferSp(new Float32Buffer(positiveFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(negativeFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, cases[caseNdx].name, cases[caseNdx].name, spec));
}
return group.release();
}
tcu::TestCaseGroup* createOpSourceExtensionGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opsourceextension", "Tests the OpSource instruction"));
vector<CaseParameter> cases;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> inputFloats (numElements, 0);
vector<float> outputFloats (numElements, 0);
const StringTemplate shaderTemplate (
string(getComputeAsmShaderPreamble()) +
"OpSourceExtension \"${EXTENSION}\"\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%neg = OpFNegate %f32 %inval\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %neg\n"
" OpReturn\n"
" OpFunctionEnd\n");
cases.push_back(CaseParameter("empty_extension", ""));
cases.push_back(CaseParameter("real_extension", "GL_ARB_texture_rectangle"));
cases.push_back(CaseParameter("fake_extension", "GL_ARB_im_the_ultimate_extension"));
cases.push_back(CaseParameter("utf8_extension", "GL_ARB_\xE2\x98\x82\xE2\x98\x85"));
cases.push_back(CaseParameter("long_extension", makeLongUTF8String(65533) + "ccc")); // word count: 65535
fillRandomScalars(rnd, -200.f, 200.f, &inputFloats[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
outputFloats[ndx] = -inputFloats[ndx];
for (size_t caseNdx = 0; caseNdx < cases.size(); ++caseNdx)
{
map<string, string> specializations;
ComputeShaderSpec spec;
specializations["EXTENSION"] = cases[caseNdx].param;
spec.assembly = shaderTemplate.specialize(specializations);
spec.inputs.push_back(BufferSp(new Float32Buffer(inputFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, cases[caseNdx].name, cases[caseNdx].name, spec));
}
return group.release();
}
// Checks that a compute shader can generate a constant null value of various types, without exercising a computation on it.
tcu::TestCaseGroup* createOpConstantNullGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opconstantnull", "Tests the OpConstantNull instruction"));
vector<CaseParameter> cases;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> positiveFloats (numElements, 0);
vector<float> negativeFloats (numElements, 0);
const StringTemplate shaderTemplate (
string(getComputeAsmShaderPreamble()) +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) +
"%uvec2 = OpTypeVector %u32 2\n"
"%bvec3 = OpTypeVector %bool 3\n"
"%fvec4 = OpTypeVector %f32 4\n"
"%fmat33 = OpTypeMatrix %fvec3 3\n"
"%const100 = OpConstant %u32 100\n"
"%uarr100 = OpTypeArray %i32 %const100\n"
"%struct = OpTypeStruct %f32 %i32 %u32\n"
"%pointer = OpTypePointer Function %i32\n"
+ string(getComputeAsmInputOutputBuffer()) +
"%null = OpConstantNull ${TYPE}\n"
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%neg = OpFNegate %f32 %inval\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %neg\n"
" OpReturn\n"
" OpFunctionEnd\n");
cases.push_back(CaseParameter("bool", "%bool"));
cases.push_back(CaseParameter("sint32", "%i32"));
cases.push_back(CaseParameter("uint32", "%u32"));
cases.push_back(CaseParameter("float32", "%f32"));
cases.push_back(CaseParameter("vec4float32", "%fvec4"));
cases.push_back(CaseParameter("vec3bool", "%bvec3"));
cases.push_back(CaseParameter("vec2uint32", "%uvec2"));
cases.push_back(CaseParameter("matrix", "%fmat33"));
cases.push_back(CaseParameter("array", "%uarr100"));
cases.push_back(CaseParameter("struct", "%struct"));
cases.push_back(CaseParameter("pointer", "%pointer"));
fillRandomScalars(rnd, 1.f, 100.f, &positiveFloats[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
negativeFloats[ndx] = -positiveFloats[ndx];
for (size_t caseNdx = 0; caseNdx < cases.size(); ++caseNdx)
{
map<string, string> specializations;
ComputeShaderSpec spec;
specializations["TYPE"] = cases[caseNdx].param;
spec.assembly = shaderTemplate.specialize(specializations);
spec.inputs.push_back(BufferSp(new Float32Buffer(positiveFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(negativeFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, cases[caseNdx].name, cases[caseNdx].name, spec));
}
return group.release();
}
// Checks that a compute shader can generate a constant composite value of various types, without exercising a computation on it.
tcu::TestCaseGroup* createOpConstantCompositeGroup (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opconstantcomposite", "Tests the OpConstantComposite instruction"));
vector<CaseParameter> cases;
de::Random rnd (deStringHash(group->getName()));
const int numElements = 100;
vector<float> positiveFloats (numElements, 0);
vector<float> negativeFloats (numElements, 0);
const StringTemplate shaderTemplate (
string(getComputeAsmShaderPreamble()) +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"${CONSTANT}\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%neg = OpFNegate %f32 %inval\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %neg\n"
" OpReturn\n"
" OpFunctionEnd\n");
cases.push_back(CaseParameter("vector", "%five = OpConstant %u32 5\n"
"%const = OpConstantComposite %uvec3 %five %zero %five"));
cases.push_back(CaseParameter("matrix", "%m3fvec3 = OpTypeMatrix %fvec3 3\n"
"%ten = OpConstant %f32 10.\n"
"%fzero = OpConstant %f32 0.\n"
"%vec = OpConstantComposite %fvec3 %ten %fzero %ten\n"
"%mat = OpConstantComposite %m3fvec3 %vec %vec %vec"));
cases.push_back(CaseParameter("struct", "%m2vec3 = OpTypeMatrix %fvec3 2\n"
"%struct = OpTypeStruct %i32 %f32 %fvec3 %m2vec3\n"
"%fzero = OpConstant %f32 0.\n"
"%one = OpConstant %f32 1.\n"
"%point5 = OpConstant %f32 0.5\n"
"%vec = OpConstantComposite %fvec3 %one %one %fzero\n"
"%mat = OpConstantComposite %m2vec3 %vec %vec\n"
"%const = OpConstantComposite %struct %zero %point5 %vec %mat"));
cases.push_back(CaseParameter("nested_struct", "%st1 = OpTypeStruct %u32 %f32\n"
"%st2 = OpTypeStruct %i32 %i32\n"
"%struct = OpTypeStruct %st1 %st2\n"
"%point5 = OpConstant %f32 0.5\n"
"%one = OpConstant %u32 1\n"
"%ten = OpConstant %i32 10\n"
"%st1val = OpConstantComposite %st1 %one %point5\n"
"%st2val = OpConstantComposite %st2 %ten %ten\n"
"%const = OpConstantComposite %struct %st1val %st2val"));
fillRandomScalars(rnd, 1.f, 100.f, &positiveFloats[0], numElements);
for (size_t ndx = 0; ndx < numElements; ++ndx)
negativeFloats[ndx] = -positiveFloats[ndx];
for (size_t caseNdx = 0; caseNdx < cases.size(); ++caseNdx)
{
map<string, string> specializations;
ComputeShaderSpec spec;
specializations["CONSTANT"] = cases[caseNdx].param;
spec.assembly = shaderTemplate.specialize(specializations);
spec.inputs.push_back(BufferSp(new Float32Buffer(positiveFloats)));
spec.outputs.push_back(BufferSp(new Float32Buffer(negativeFloats)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(testCtx, cases[caseNdx].name, cases[caseNdx].name, spec));
}
return group.release();
}
// Creates a floating point number with the given exponent, and significand
// bits set. It can only create normalized numbers. Only the least significant
// 24 bits of the significand will be examined. The final bit of the
// significand will also be ignored. This allows alignment to be written
// similarly to C99 hex-floats.
// For example if you wanted to write 0x1.7f34p-12 you would call
// constructNormalizedFloat(-12, 0x7f3400)
float constructNormalizedFloat (deInt32 exponent, deUint32 significand)
{
float f = 1.0f;
for (deInt32 idx = 0; idx < 23; ++idx)
{
f += ((significand & 0x800000) == 0) ? 0.f : std::ldexp(1.0f, -(idx + 1));
significand <<= 1;
}
return std::ldexp(f, exponent);
}
// Compare instruction for the OpQuantizeF16 compute exact case.
// Returns true if the output is what is expected from the test case.
bool compareOpQuantizeF16ComputeExactCase (const std::vector<BufferSp>&, const vector<AllocationSp>& outputAllocs, const std::vector<BufferSp>& expectedOutputs, TestLog&)
{
if (outputAllocs.size() != 1)
return false;
// We really just need this for size because we cannot compare Nans.
const BufferSp& expectedOutput = expectedOutputs[0];
const float* outputAsFloat = static_cast<const float*>(outputAllocs[0]->getHostPtr());;
if (expectedOutput->getNumBytes() != 4*sizeof(float)) {
return false;
}
if (*outputAsFloat != constructNormalizedFloat(8, 0x304000) &&
*outputAsFloat != constructNormalizedFloat(8, 0x300000)) {
return false;
}
outputAsFloat++;
if (*outputAsFloat != -constructNormalizedFloat(-7, 0x600000) &&
*outputAsFloat != -constructNormalizedFloat(-7, 0x604000)) {
return false;
}
outputAsFloat++;
if (*outputAsFloat != constructNormalizedFloat(2, 0x01C000) &&
*outputAsFloat != constructNormalizedFloat(2, 0x020000)) {
return false;
}
outputAsFloat++;
if (*outputAsFloat != constructNormalizedFloat(1, 0xFFC000) &&
*outputAsFloat != constructNormalizedFloat(2, 0x000000)) {
return false;
}
return true;
}
// Checks that every output from a test-case is a float NaN.
bool compareNan (const std::vector<BufferSp>&, const vector<AllocationSp>& outputAllocs, const std::vector<BufferSp>& expectedOutputs, TestLog&)
{
if (outputAllocs.size() != 1)
return false;
// We really just need this for size because we cannot compare Nans.
const BufferSp& expectedOutput = expectedOutputs[0];
const float* output_as_float = static_cast<const float*>(outputAllocs[0]->getHostPtr());;
for (size_t idx = 0; idx < expectedOutput->getNumBytes() / sizeof(float); ++idx)
{
if (!deFloatIsNaN(output_as_float[idx]))
{
return false;
}
}
return true;
}
// Checks that a compute shader can generate a constant composite value of various types, without exercising a computation on it.
tcu::TestCaseGroup* createOpQuantizeToF16Group (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opquantize", "Tests the OpQuantizeToF16 instruction"));
const std::string shader (
string(getComputeAsmShaderPreamble()) +
"OpSource GLSL 430\n"
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%inloc = OpAccessChain %f32ptr %indata %zero %x\n"
"%inval = OpLoad %f32 %inloc\n"
"%quant = OpQuantizeToF16 %f32 %inval\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
" OpStore %outloc %quant\n"
" OpReturn\n"
" OpFunctionEnd\n");
{
ComputeShaderSpec spec;
const deUint32 numElements = 100;
vector<float> infinities;
vector<float> results;
infinities.reserve(numElements);
results.reserve(numElements);
for (size_t idx = 0; idx < numElements; ++idx)
{
switch(idx % 4)
{
case 0:
infinities.push_back(std::numeric_limits<float>::infinity());
results.push_back(std::numeric_limits<float>::infinity());
break;
case 1:
infinities.push_back(-std::numeric_limits<float>::infinity());
results.push_back(-std::numeric_limits<float>::infinity());
break;
case 2:
infinities.push_back(std::ldexp(1.0f, 16));
results.push_back(std::numeric_limits<float>::infinity());
break;
case 3:
infinities.push_back(std::ldexp(-1.0f, 32));
results.push_back(-std::numeric_limits<float>::infinity());
break;
}
}
spec.assembly = shader;
spec.inputs.push_back(BufferSp(new Float32Buffer(infinities)));
spec.outputs.push_back(BufferSp(new Float32Buffer(results)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(
testCtx, "infinities", "Check that infinities propagated and created", spec));
}
{
ComputeShaderSpec spec;
vector<float> nans;
const deUint32 numElements = 100;
nans.reserve(numElements);
for (size_t idx = 0; idx < numElements; ++idx)
{
if (idx % 2 == 0)
{
nans.push_back(std::numeric_limits<float>::quiet_NaN());
}
else
{
nans.push_back(-std::numeric_limits<float>::quiet_NaN());
}
}
spec.assembly = shader;
spec.inputs.push_back(BufferSp(new Float32Buffer(nans)));
spec.outputs.push_back(BufferSp(new Float32Buffer(nans)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
spec.verifyIO = &compareNan;
group->addChild(new SpvAsmComputeShaderCase(
testCtx, "propagated_nans", "Check that nans are propagated", spec));
}
{
ComputeShaderSpec spec;
vector<float> small;
vector<float> zeros;
const deUint32 numElements = 100;
small.reserve(numElements);
zeros.reserve(numElements);
for (size_t idx = 0; idx < numElements; ++idx)
{
switch(idx % 6)
{
case 0:
small.push_back(0.f);
zeros.push_back(0.f);
break;
case 1:
small.push_back(-0.f);
zeros.push_back(-0.f);
break;
case 2:
small.push_back(std::ldexp(1.0f, -16));
zeros.push_back(0.f);
break;
case 3:
small.push_back(std::ldexp(-1.0f, -32));
zeros.push_back(-0.f);
break;
case 4:
small.push_back(std::ldexp(1.0f, -127));
zeros.push_back(0.f);
break;
case 5:
small.push_back(-std::ldexp(1.0f, -128));
zeros.push_back(-0.f);
break;
}
}
spec.assembly = shader;
spec.inputs.push_back(BufferSp(new Float32Buffer(small)));
spec.outputs.push_back(BufferSp(new Float32Buffer(zeros)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(
testCtx, "flush_to_zero", "Check that values are zeroed correctly", spec));
}
{
ComputeShaderSpec spec;
vector<float> exact;
const deUint32 numElements = 200;
exact.reserve(numElements);
for (size_t idx = 0; idx < numElements; ++idx)
exact.push_back(static_cast<float>(static_cast<int>(idx) - 100));
spec.assembly = shader;
spec.inputs.push_back(BufferSp(new Float32Buffer(exact)));
spec.outputs.push_back(BufferSp(new Float32Buffer(exact)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(
testCtx, "exact", "Check that values exactly preserved where appropriate", spec));
}
{
ComputeShaderSpec spec;
vector<float> inputs;
const deUint32 numElements = 4;
inputs.push_back(constructNormalizedFloat(8, 0x300300));
inputs.push_back(-constructNormalizedFloat(-7, 0x600800));
inputs.push_back(constructNormalizedFloat(2, 0x01E000));
inputs.push_back(constructNormalizedFloat(1, 0xFFE000));
spec.assembly = shader;
spec.verifyIO = &compareOpQuantizeF16ComputeExactCase;
spec.inputs.push_back(BufferSp(new Float32Buffer(inputs)));
spec.outputs.push_back(BufferSp(new Float32Buffer(inputs)));
spec.numWorkGroups = IVec3(numElements, 1, 1);
group->addChild(new SpvAsmComputeShaderCase(
testCtx, "rounded", "Check that are rounded when needed", spec));
}
return group.release();
}
tcu::TestCaseGroup* createSpecConstantOpQuantizeToF16Group (tcu::TestContext& testCtx)
{
de::MovePtr<tcu::TestCaseGroup> group (new tcu::TestCaseGroup(testCtx, "opspecconstantop_opquantize", "Tests the OpQuantizeToF16 opcode for the OpSpecConstantOp instruction"));
const std::string shader (
string(getComputeAsmShaderPreamble()) +
"OpName %main \"main\"\n"
"OpName %id \"gl_GlobalInvocationID\"\n"
"OpDecorate %id BuiltIn GlobalInvocationId\n"
"OpDecorate %sc_0 SpecId 0\n"
"OpDecorate %sc_1 SpecId 1\n"
"OpDecorate %sc_2 SpecId 2\n"
"OpDecorate %sc_3 SpecId 3\n"
"OpDecorate %sc_4 SpecId 4\n"
"OpDecorate %sc_5 SpecId 5\n"
+ string(getComputeAsmInputOutputBufferTraits()) + string(getComputeAsmCommonTypes()) + string(getComputeAsmInputOutputBuffer()) +
"%id = OpVariable %uvec3ptr Input\n"
"%zero = OpConstant %i32 0\n"
"%c_u32_6 = OpConstant %u32 6\n"
"%sc_0 = OpSpecConstant %f32 0.\n"
"%sc_1 = OpSpecConstant %f32 0.\n"
"%sc_2 = OpSpecConstant %f32 0.\n"
"%sc_3 = OpSpecConstant %f32 0.\n"
"%sc_4 = OpSpecConstant %f32 0.\n"
"%sc_5 = OpSpecConstant %f32 0.\n"
"%sc_0_quant = OpSpecConstantOp %f32 QuantizeToF16 %sc_0\n"
"%sc_1_quant = OpSpecConstantOp %f32 QuantizeToF16 %sc_1\n"
"%sc_2_quant = OpSpecConstantOp %f32 QuantizeToF16 %sc_2\n"
"%sc_3_quant = OpSpecConstantOp %f32 QuantizeToF16 %sc_3\n"
"%sc_4_quant = OpSpecConstantOp %f32 QuantizeToF16 %sc_4\n"
"%sc_5_quant = OpSpecConstantOp %f32 QuantizeToF16 %sc_5\n"
"%main = OpFunction %void None %voidf\n"
"%label = OpLabel\n"
"%idval = OpLoad %uvec3 %id\n"
"%x = OpCompositeExtract %u32 %idval 0\n"
"%outloc = OpAccessChain %f32ptr %outdata %zero %x\n"
"%selector = OpUMod %u32 %x %c_u32_6\n"
" OpSelectionMerge %exit None\n"
" OpSwitch %selector %exit 0 %case0 1 %case1 2 %case2 3 %case3 4 %case4 5 %case5\n"
"%case0 = OpLabel\n"
" OpStore %outloc %sc_0_quant\n"
" OpBranch %exit\n"
"%case1 = OpLabel\n"
" OpStore %outloc %sc_1_quant\n"
" OpBranch %exit\n"
"%case2 = OpLabel\n"
" OpStore %outloc %sc_2_quant\n"
" OpBranch %exit\n"
"%case3 = OpLabel\n"
" OpStore %outloc %sc_3_quant\n"
" OpBranch %exit\n"
"%case4 = OpLabel\n"
" OpStore %outloc %sc_4_quant\n"
" OpBranch %exit\n"
"%case5 = OpLabel\n"
" OpStore %outloc %sc_5_quant\n"
" OpBranch %exit\n"
"%exit = OpLabel\n"
" OpReturn\n"
" OpFunctionEnd\n");
{
ComputeShaderSpec spec;
const deUint8 numCases = 4;
vector<float> inputs (numCases, 0.f);
vector<float> outputs;
spec.assembly = shader;
spec.numWorkGroups = IVec3(numCases, 1, 1);
spec.specConstants.push_back(bitwiseCast<deUint32>(std::numeric_limits<float>::infinity()));
spec.specConstants.push_back(bitwiseCast<deUint32>(-std::numeric_limits<float>::infinity()));
spec.specConstants.push_back(bitwiseCast<deUint32>(std::ldexp(1.0f, 16)));
spec.specConstants.push_back(bitwiseCast<deUint32>(std::ldexp(-1.0f, 32)));
outputs.push_back(std::numeric_limits<float>::infinity());
outputs.push_back(-std::numeric_limits<float>::infinity());
outputs.push_back(std::numeric_limits<float>::infinity());
outputs.push_back(-std::numeric_limits<float>::infinity());
spec.inputs.push_back(BufferSp(new Float32Buffer(inputs)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputs)));
group->addChild(new SpvAsmComputeShaderCase(
testCtx, "infinities", "Check that infinities propagated and created", spec));
}
{
ComputeShaderSpec spec;
const deUint8 numCases = 2;
vector<float> inputs (numCases, 0.f);
vector<float> outputs;
spec.assembly = shader;
spec.numWorkGroups = IVec3(numCases, 1, 1);
spec.verifyIO = &compareNan;
outputs.push_back(std::numeric_limits<float>::quiet_NaN());
outputs.push_back(-std::numeric_limits<float>::quiet_NaN());
for (deUint8 idx = 0; idx < numCases; ++idx)
spec.specConstants.push_back(bitwiseCast<deUint32>(outputs[idx]));
spec.inputs.push_back(BufferSp(new Float32Buffer(inputs)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputs)));
group->addChild(new SpvAsmComputeShaderCase(
testCtx, "propagated_nans", "Check that nans are propagated", spec));
}
{
ComputeShaderSpec spec;
const deUint8 numCases = 6;
vector<float> inputs (numCases, 0.f);
vector<float> outputs;
spec.assembly = shader;
spec.numWorkGroups = IVec3(numCases, 1, 1);
spec.specConstants.push_back(bitwiseCast<deUint32>(0.f));
spec.specConstants.push_back(bitwiseCast<deUint32>(-0.f));
spec.specConstants.push_back(bitwiseCast<deUint32>(std::ldexp(1.0f, -16)));
spec.specConstants.push_back(bitwiseCast<deUint32>(std::ldexp(-1.0f, -32)));
spec.specConstants.push_back(bitwiseCast<deUint32>(std::ldexp(1.0f, -127)));
spec.specConstants.push_back(bitwiseCast<deUint32>(-std::ldexp(1.0f, -128)));
outputs.push_back(0.f);
outputs.push_back(-0.f);
outputs.push_back(0.f);
outputs.push_back(-0.f);
outputs.push_back(0.f);
outputs.push_back(-0.f);
spec.inputs.push_back(BufferSp(new Float32Buffer(inputs)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputs)));
group->addChild(new SpvAsmComputeShaderCase(
testCtx, "flush_to_zero", "Check that values are zeroed correctly", spec));
}
{
ComputeShaderSpec spec;
const deUint8 numCases = 6;
vector<float> inputs (numCases, 0.f);
vector<float> outputs;
spec.assembly = shader;
spec.numWorkGroups = IVec3(numCases, 1, 1);
for (deUint8 idx = 0; idx < 6; ++idx)
{
const float f = static_cast<float>(idx * 10 - 30) / 4.f;
spec.specConstants.push_back(bitwiseCast<deUint32>(f));
outputs.push_back(f);
}
spec.inputs.push_back(BufferSp(new Float32Buffer(inputs)));
spec.outputs.push_back(BufferSp(new Float32Buffer(outputs)));
group->addChild(new SpvAsmComputeShaderCase(
testCtx, "exact", "Check that values exactly preserved where appropriate", spec));
}
{