| /* Xtensa configuration-specific ISA information. |
| |
| Copyright (c) 2003-2015 Tensilica Inc. |
| |
| Permission is hereby granted, free of charge, to any person obtaining |
| a copy of this software and associated documentation files (the |
| "Software"), to deal in the Software without restriction, including |
| without limitation the rights to use, copy, modify, merge, publish, |
| distribute, sublicense, and/or sell copies of the Software, and to |
| permit persons to whom the Software is furnished to do so, subject to |
| the following conditions: |
| |
| The above copyright notice and this permission notice shall be included |
| in all copies or substantial portions of the Software. |
| |
| THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY |
| CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ |
| |
| #include "xtensa-isa.h" |
| #include "xtensa-isa-internal.h" |
| |
| |
| /* Sysregs. */ |
| |
| static xtensa_sysreg_internal sysregs[] = { |
| { "LBEG", 0, 0 }, |
| { "LEND", 1, 0 }, |
| { "LCOUNT", 2, 0 }, |
| { "BR", 4, 0 }, |
| { "ACCLO", 16, 0 }, |
| { "ACCHI", 17, 0 }, |
| { "M0", 32, 0 }, |
| { "M1", 33, 0 }, |
| { "M2", 34, 0 }, |
| { "M3", 35, 0 }, |
| { "PTEVADDR", 83, 0 }, |
| { "MMID", 89, 0 }, |
| { "DDR", 104, 0 }, |
| { "CONFIGID0", 176, 0 }, |
| { "CONFIGID1", 208, 0 }, |
| { "INTERRUPT", 226, 0 }, |
| { "INTCLEAR", 227, 0 }, |
| { "CCOUNT", 234, 0 }, |
| { "PRID", 235, 0 }, |
| { "ICOUNT", 236, 0 }, |
| { "CCOMPARE0", 240, 0 }, |
| { "CCOMPARE1", 241, 0 }, |
| { "CCOMPARE2", 242, 0 }, |
| { "VECBASE", 231, 0 }, |
| { "EPC1", 177, 0 }, |
| { "EPC2", 178, 0 }, |
| { "EPC3", 179, 0 }, |
| { "EPC4", 180, 0 }, |
| { "EPC5", 181, 0 }, |
| { "EPC6", 182, 0 }, |
| { "EPC7", 183, 0 }, |
| { "EXCSAVE1", 209, 0 }, |
| { "EXCSAVE2", 210, 0 }, |
| { "EXCSAVE3", 211, 0 }, |
| { "EXCSAVE4", 212, 0 }, |
| { "EXCSAVE5", 213, 0 }, |
| { "EXCSAVE6", 214, 0 }, |
| { "EXCSAVE7", 215, 0 }, |
| { "EPS2", 194, 0 }, |
| { "EPS3", 195, 0 }, |
| { "EPS4", 196, 0 }, |
| { "EPS5", 197, 0 }, |
| { "EPS6", 198, 0 }, |
| { "EPS7", 199, 0 }, |
| { "EXCCAUSE", 232, 0 }, |
| { "DEPC", 192, 0 }, |
| { "EXCVADDR", 238, 0 }, |
| { "WINDOWBASE", 72, 0 }, |
| { "WINDOWSTART", 73, 0 }, |
| { "SAR", 3, 0 }, |
| { "PS", 230, 0 }, |
| { "MISC0", 244, 0 }, |
| { "MISC1", 245, 0 }, |
| { "INTENABLE", 228, 0 }, |
| { "DBREAKA0", 144, 0 }, |
| { "DBREAKC0", 160, 0 }, |
| { "DBREAKA1", 145, 0 }, |
| { "DBREAKC1", 161, 0 }, |
| { "IBREAKA0", 128, 0 }, |
| { "IBREAKA1", 129, 0 }, |
| { "IBREAKENABLE", 96, 0 }, |
| { "ICOUNTLEVEL", 237, 0 }, |
| { "DEBUGCAUSE", 233, 0 }, |
| { "PREFCTL", 40, 0 }, |
| { "RASID", 90, 0 }, |
| { "ITLBCFG", 91, 0 }, |
| { "DTLBCFG", 92, 0 }, |
| { "CPENABLE", 224, 0 }, |
| { "SCOMPARE1", 12, 0 }, |
| { "ATOMCTL", 99, 0 }, |
| { "THREADPTR", 231, 1 }, |
| { "AE_OVF_SAR", 240, 1 }, |
| { "AE_BITHEAD", 241, 1 }, |
| { "AE_TS_FTS_BU_BP", 242, 1 }, |
| { "AE_SD_NO", 243, 1 }, |
| { "AE_CBEGIN0", 246, 1 }, |
| { "AE_CEND0", 247, 1 }, |
| { "EXPSTATE", 230, 1 } |
| }; |
| |
| #define NUM_SYSREGS 78 |
| #define MAX_SPECIAL_REG 245 |
| #define MAX_USER_REG 247 |
| |
| |
| /* Processor states. */ |
| |
| static xtensa_state_internal states[] = { |
| { "LCOUNT", 32, 0 }, |
| { "PC", 32, 0 }, |
| { "ICOUNT", 32, 0 }, |
| { "DDR", 32, 0 }, |
| { "INTERRUPT", 22, 0 }, |
| { "CCOUNT", 32, 0 }, |
| { "XTSYNC", 1, 0 }, |
| { "VECBASE", 22, 0 }, |
| { "EPC1", 32, 0 }, |
| { "EPC2", 32, 0 }, |
| { "EPC3", 32, 0 }, |
| { "EPC4", 32, 0 }, |
| { "EPC5", 32, 0 }, |
| { "EPC6", 32, 0 }, |
| { "EPC7", 32, 0 }, |
| { "EXCSAVE1", 32, 0 }, |
| { "EXCSAVE2", 32, 0 }, |
| { "EXCSAVE3", 32, 0 }, |
| { "EXCSAVE4", 32, 0 }, |
| { "EXCSAVE5", 32, 0 }, |
| { "EXCSAVE6", 32, 0 }, |
| { "EXCSAVE7", 32, 0 }, |
| { "EPS2", 15, 0 }, |
| { "EPS3", 15, 0 }, |
| { "EPS4", 15, 0 }, |
| { "EPS5", 15, 0 }, |
| { "EPS6", 15, 0 }, |
| { "EPS7", 15, 0 }, |
| { "EXCCAUSE", 6, 0 }, |
| { "PSINTLEVEL", 4, 0 }, |
| { "PSUM", 1, 0 }, |
| { "PSWOE", 1, 0 }, |
| { "PSRING", 2, 0 }, |
| { "PSEXCM", 1, 0 }, |
| { "DEPC", 32, 0 }, |
| { "EXCVADDR", 32, 0 }, |
| { "WindowBase", 3, 0 }, |
| { "WindowStart", 8, 0 }, |
| { "PSCALLINC", 2, 0 }, |
| { "PSOWB", 4, 0 }, |
| { "LBEG", 32, 0 }, |
| { "LEND", 32, 0 }, |
| { "SAR", 6, 0 }, |
| { "THREADPTR", 32, 0 }, |
| { "MISC0", 32, 0 }, |
| { "MISC1", 32, 0 }, |
| { "ACC", 40, 0 }, |
| { "InOCDMode", 1, 0 }, |
| { "INTENABLE", 22, 0 }, |
| { "DBREAKA0", 32, 0 }, |
| { "DBREAKC0", 8, 0 }, |
| { "DBREAKA1", 32, 0 }, |
| { "DBREAKC1", 8, 0 }, |
| { "IBREAKA0", 32, 0 }, |
| { "IBREAKA1", 32, 0 }, |
| { "IBREAKENABLE", 2, 0 }, |
| { "ICOUNTLEVEL", 4, 0 }, |
| { "DEBUGCAUSE", 6, 0 }, |
| { "DBNUM", 4, 0 }, |
| { "CCOMPARE0", 32, 0 }, |
| { "CCOMPARE1", 32, 0 }, |
| { "CCOMPARE2", 32, 0 }, |
| { "PREFCTL", 9, 0 }, |
| { "ASID3", 8, 0 }, |
| { "ASID2", 8, 0 }, |
| { "ASID1", 8, 0 }, |
| { "INSTPGSZID6", 1, 0 }, |
| { "INSTPGSZID5", 1, 0 }, |
| { "INSTPGSZID4", 2, 0 }, |
| { "DATAPGSZID6", 1, 0 }, |
| { "DATAPGSZID5", 1, 0 }, |
| { "DATAPGSZID4", 2, 0 }, |
| { "PTBASE", 10, 0 }, |
| { "CPENABLE", 8, 0 }, |
| { "SCOMPARE1", 32, 0 }, |
| { "ATOMCTL", 6, 0 }, |
| { "ERI_RAW_INTERLOCK", 1, 0 }, |
| { "AE_OVERFLOW", 1, XTENSA_STATE_IS_SHARED_OR }, |
| { "AE_SAR", 6, 0 }, |
| { "AE_BITHEAD", 32, 0 }, |
| { "AE_BITPTR", 4, 0 }, |
| { "AE_BITSUSED", 4, 0 }, |
| { "AE_TABLESIZE", 4, 0 }, |
| { "AE_FIRST_TS", 4, 0 }, |
| { "AE_NEXTOFFSET", 27, 0 }, |
| { "AE_SEARCHDONE", 1, 0 }, |
| { "AE_CBEGIN0", 32, 0 }, |
| { "AE_CEND0", 32, 0 }, |
| { "EXPSTATE", 32, XTENSA_STATE_IS_EXPORTED } |
| }; |
| |
| #define NUM_STATES 89 |
| |
| enum xtensa_state_id { |
| STATE_LCOUNT, |
| STATE_PC, |
| STATE_ICOUNT, |
| STATE_DDR, |
| STATE_INTERRUPT, |
| STATE_CCOUNT, |
| STATE_XTSYNC, |
| STATE_VECBASE, |
| STATE_EPC1, |
| STATE_EPC2, |
| STATE_EPC3, |
| STATE_EPC4, |
| STATE_EPC5, |
| STATE_EPC6, |
| STATE_EPC7, |
| STATE_EXCSAVE1, |
| STATE_EXCSAVE2, |
| STATE_EXCSAVE3, |
| STATE_EXCSAVE4, |
| STATE_EXCSAVE5, |
| STATE_EXCSAVE6, |
| STATE_EXCSAVE7, |
| STATE_EPS2, |
| STATE_EPS3, |
| STATE_EPS4, |
| STATE_EPS5, |
| STATE_EPS6, |
| STATE_EPS7, |
| STATE_EXCCAUSE, |
| STATE_PSINTLEVEL, |
| STATE_PSUM, |
| STATE_PSWOE, |
| STATE_PSRING, |
| STATE_PSEXCM, |
| STATE_DEPC, |
| STATE_EXCVADDR, |
| STATE_WindowBase, |
| STATE_WindowStart, |
| STATE_PSCALLINC, |
| STATE_PSOWB, |
| STATE_LBEG, |
| STATE_LEND, |
| STATE_SAR, |
| STATE_THREADPTR, |
| STATE_MISC0, |
| STATE_MISC1, |
| STATE_ACC, |
| STATE_InOCDMode, |
| STATE_INTENABLE, |
| STATE_DBREAKA0, |
| STATE_DBREAKC0, |
| STATE_DBREAKA1, |
| STATE_DBREAKC1, |
| STATE_IBREAKA0, |
| STATE_IBREAKA1, |
| STATE_IBREAKENABLE, |
| STATE_ICOUNTLEVEL, |
| STATE_DEBUGCAUSE, |
| STATE_DBNUM, |
| STATE_CCOMPARE0, |
| STATE_CCOMPARE1, |
| STATE_CCOMPARE2, |
| STATE_PREFCTL, |
| STATE_ASID3, |
| STATE_ASID2, |
| STATE_ASID1, |
| STATE_INSTPGSZID6, |
| STATE_INSTPGSZID5, |
| STATE_INSTPGSZID4, |
| STATE_DATAPGSZID6, |
| STATE_DATAPGSZID5, |
| STATE_DATAPGSZID4, |
| STATE_PTBASE, |
| STATE_CPENABLE, |
| STATE_SCOMPARE1, |
| STATE_ATOMCTL, |
| STATE_ERI_RAW_INTERLOCK, |
| STATE_AE_OVERFLOW, |
| STATE_AE_SAR, |
| STATE_AE_BITHEAD, |
| STATE_AE_BITPTR, |
| STATE_AE_BITSUSED, |
| STATE_AE_TABLESIZE, |
| STATE_AE_FIRST_TS, |
| STATE_AE_NEXTOFFSET, |
| STATE_AE_SEARCHDONE, |
| STATE_AE_CBEGIN0, |
| STATE_AE_CEND0, |
| STATE_EXPSTATE |
| }; |
| |
| |
| /* Field definitions. */ |
| |
| static unsigned |
| Field_t_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_s_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_r_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_op2_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_op1_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_op0_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 8) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_op0_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_n_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 12) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_n_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc0000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_m_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 14) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_m_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x30000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_sr_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_sr_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_st_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_st_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_thi3_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 12) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_thi3_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe0000) | (tie_t << 17); |
| } |
| |
| static unsigned |
| Field_t3_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_t3_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_tlo_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 14) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_tlo_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x30000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_w_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_w_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x300) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_r3_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_r3_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_rhi_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_rhi_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc00) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_ae_r3_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r3_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_ae_r10_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r10_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x300) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_ae_r32_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r32_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc00) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_ae_s3_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_s3_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x8000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_ae_s_non_samt_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_s_non_samt_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_s3to1_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_s3to1_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe000) | (tie_t << 13); |
| } |
| |
| static unsigned |
| Field_op0_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_op0_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_t_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_t_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_r_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_r_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_op0_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_op0_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_z_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 21) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_z_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_i_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_i_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_s_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_s_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_ftsf42ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 8) | ((insn[0] << 12) >> 24); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf42ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 22) >> 24; |
| insn[0] = (insn[0] & ~0xff000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_op0_s3_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 25) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_op0_s3_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_ftsf333ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 9) >> 29); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf333ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 26) >> 29; |
| insn[0] = (insn[0] & ~0x700000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ftsf43ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 12) >> 30); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf43ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 24) >> 30; |
| insn[0] = (insn[0] & ~0xc0000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_ftsf359ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 14) >> 30); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf359ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 27) >> 30; |
| insn[0] = (insn[0] & ~0x30000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf45ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 9) | ((insn[0] << 16) >> 23); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf45ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 23) >> 23; |
| insn[0] = (insn[0] & ~0xff80) | (tie_t << 7); |
| tie_t = (val << 22) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf32ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf32ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf33ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf33ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf31ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf31ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf30ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf30ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf60ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 9) >> 31); |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf60ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x400000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_ftsf355ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 10) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf355ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x300000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ftsf58ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 9) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf58ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| tie_t = (val << 26) >> 30; |
| insn[0] = (insn[0] & ~0x600000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf354ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 11) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf354ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x100000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ftsf37ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf37ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ftsf22ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf22ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ftsf126ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 13) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf126ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x60000) | (tie_t << 17); |
| } |
| |
| static unsigned |
| Field_ftsf357ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31); |
| tie_t = (tie_t << 5) | ((insn[0] << 18) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf357ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0x3e00) | (tie_t << 9); |
| tie_t = (val << 26) >> 31; |
| insn[0] = (insn[0] & ~0x10000) | (tie_t << 16); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf53ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 9) | ((insn[0] << 16) >> 23); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf53ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 23) >> 23; |
| insn[0] = (insn[0] & ~0xff80) | (tie_t << 7); |
| tie_t = (val << 22) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf66ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 18) >> 29); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf66ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 27) >> 29; |
| insn[0] = (insn[0] & ~0x3800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_ftsf347ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 21) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf347ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x600) | (tie_t << 9); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf64ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 18) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf64ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0x3c00) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_ftsf345ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 22) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf345ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x200) | (tie_t << 9); |
| tie_t = (val << 27) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf63ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 18) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf63ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x3f80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf344ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf344ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf48ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 9) | ((insn[0] << 16) >> 23); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf48ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 23) >> 23; |
| insn[0] = (insn[0] & ~0xff80) | (tie_t << 7); |
| tie_t = (val << 22) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf47ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 9) | ((insn[0] << 16) >> 23); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf47ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 23) >> 23; |
| insn[0] = (insn[0] & ~0xff80) | (tie_t << 7); |
| tie_t = (val << 22) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf92ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf92ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 26) >> 31; |
| insn[0] = (insn[0] & ~0x4000) | (tie_t << 14); |
| tie_t = (val << 22) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf358ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 13) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf358ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0x78000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_ftsf94ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf94ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 20) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf93ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf93ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ae_r10_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r10_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_ftsf90ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf90ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 26) >> 31; |
| insn[0] = (insn[0] & ~0x4000) | (tie_t << 14); |
| tie_t = (val << 22) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf55_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf55_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x8000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_ftsf121ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 8) | ((insn[0] << 9) >> 24); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf121ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 21) >> 24; |
| insn[0] = (insn[0] & ~0x7f8000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_ftsf91_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf91_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x4000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_ftsf99ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 9) >> 27); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf99ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 22) >> 27; |
| insn[0] = (insn[0] & ~0x7c0000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_ftsf351_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 14) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf351_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x30000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf97ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 6) | ((insn[0] << 9) >> 26); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf97ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 21) >> 26; |
| insn[0] = (insn[0] & ~0x7e0000) | (tie_t << 17); |
| } |
| |
| static unsigned |
| Field_ftsf348ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf348ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x10000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf96ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf96ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 20) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf23ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf23ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf34ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf34ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf40ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 8) | ((insn[0] << 12) >> 24); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf40ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 22) >> 24; |
| insn[0] = (insn[0] & ~0xff000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ftsf38ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 8) | ((insn[0] << 12) >> 24); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf38ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 22) >> 24; |
| insn[0] = (insn[0] & ~0xff000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ftsf24ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf24ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf26ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf26ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf20ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf20ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ftsf21ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf21ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ftsf25ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf25ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf35ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf35ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf41ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 8) | ((insn[0] << 12) >> 24); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf41ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 22) >> 24; |
| insn[0] = (insn[0] & ~0xff000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ftsf54ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31); |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf54ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x8000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_ftsf356ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf356ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x4000) | (tie_t << 14); |
| tie_t = (val << 27) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf29ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf29ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf27ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf27ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf28ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf28ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf36ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf36ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 25) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf57ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 9) >> 29); |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf57ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| tie_t = (val << 25) >> 29; |
| insn[0] = (insn[0] & ~0x700000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ftsf62ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf62ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ae_s20_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 9) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_s20_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x700000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ftsf56ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 9) >> 29); |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf56ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| tie_t = (val << 25) >> 29; |
| insn[0] = (insn[0] & ~0x700000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ftsf127ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 13) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf127ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x40000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_ftsf350ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 14) >> 30); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf350ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 27) >> 30; |
| insn[0] = (insn[0] & ~0x30000) | (tie_t << 16); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf114ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf114ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 22) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf124ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 9) >> 30); |
| tie_t = (tie_t << 3) | ((insn[0] << 13) >> 29); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf124ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 26) >> 29; |
| insn[0] = (insn[0] & ~0x70000) | (tie_t << 16); |
| tie_t = (val << 24) >> 30; |
| insn[0] = (insn[0] & ~0x600000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf352ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf352ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf118ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 9) | ((insn[0] << 9) >> 23); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf118ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 20) >> 23; |
| insn[0] = (insn[0] & ~0x7fc000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_ftsf111ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf111ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 22) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf113ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf113ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 22) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf106ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 13) >> 29); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf106ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 26) >> 29; |
| insn[0] = (insn[0] & ~0x70000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf107ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 13) >> 29); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf107ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 26) >> 29; |
| insn[0] = (insn[0] & ~0x70000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf109ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf109ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 22) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf115ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf115ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 22) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf120ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 9) | ((insn[0] << 9) >> 23); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf120ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 20) >> 23; |
| insn[0] = (insn[0] & ~0x7fc000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_ftsf123ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 9) >> 29); |
| tie_t = (tie_t << 3) | ((insn[0] << 13) >> 29); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf123ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 26) >> 29; |
| insn[0] = (insn[0] & ~0x70000) | (tie_t << 16); |
| tie_t = (val << 23) >> 29; |
| insn[0] = (insn[0] & ~0x700000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ftsf349ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf349ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 29) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf110ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf110ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 22) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf117ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf117ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 22) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf112ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf112ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 22) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf116ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 9) >> 25); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf116ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 22) >> 25; |
| insn[0] = (insn[0] & ~0x7f0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf68ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf68ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf50ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 9) | ((insn[0] << 16) >> 23); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf50ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 23) >> 23; |
| insn[0] = (insn[0] & ~0xff80) | (tie_t << 7); |
| tie_t = (val << 22) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf52ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 9) | ((insn[0] << 16) >> 23); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf52ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 23) >> 23; |
| insn[0] = (insn[0] & ~0xff80) | (tie_t << 7); |
| tie_t = (val << 22) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf51ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 9) | ((insn[0] << 16) >> 23); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf51ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 23) >> 23; |
| insn[0] = (insn[0] & ~0xff80) | (tie_t << 7); |
| tie_t = (val << 22) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf49ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 9) | ((insn[0] << 16) >> 23); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf49ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 23) >> 23; |
| insn[0] = (insn[0] & ~0xff80) | (tie_t << 7); |
| tie_t = (val << 22) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ae_r20_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 13) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r20_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x70000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf343ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 18) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf343ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0x3e00) | (tie_t << 9); |
| } |
| |
| static unsigned |
| Field_ftsf125ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 13) >> 29); |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf125ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| tie_t = (val << 28) >> 29; |
| insn[0] = (insn[0] & ~0x70000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf342ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 21) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf342ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x600) | (tie_t << 9); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ftsf108ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 13) >> 29); |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf108ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| tie_t = (val << 26) >> 29; |
| insn[0] = (insn[0] & ~0x70000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ae_r32_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r32_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ae_mul32x24fld_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_mul32x24fld_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf161ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf161ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf155ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf155ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf176ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf176ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf159ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf159ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf156ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf156ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf168ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf168ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf158ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf158ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf154ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf154ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf164ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf164ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf157ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf157ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf153ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf153ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf162ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf162ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf134ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf134ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf192ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf192ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf143ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf143ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf133ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf133ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf160ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf160ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf142ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf142ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf131ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf131ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf144ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf144ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf141ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf141ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf61_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 9) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf61_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_ftsf334ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 10) >> 29); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf334ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 25) >> 29; |
| insn[0] = (insn[0] & ~0x380000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf136ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf136ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf139ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf139ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf177ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf177ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf171ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf171ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf185ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf185ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf175ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf175ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf172ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf172ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf183ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf183ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf174ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf174ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf170ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf170ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf182ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf182ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf173ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf173ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf169ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf169ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf181ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf181ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf140ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf140ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf152ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf152ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf138ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf138ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf148ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf148ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf137ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf137ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf146ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf146ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf135ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf135ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf145ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf145ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf179ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf179ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf189ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf189ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf184ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf184ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf187ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf187ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf180ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf180ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf188ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf188ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf178ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf178ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf186ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf186ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf76ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf76ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf75ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf75ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf79ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf79ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf78ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf78ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf80ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf80ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf81ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf81ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf83ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf83ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf82ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf82ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf69ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf69ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf103ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf103ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x100) | (tie_t << 8); |
| tie_t = (val << 30) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_ftsf337ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 21) >> 30); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf337ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 29) >> 30; |
| insn[0] = (insn[0] & ~0x600) | (tie_t << 9); |
| tie_t = (val << 25) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf71ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf71ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf70ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf70ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf77ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf77ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf73ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf73ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf74ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf74ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf72ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf72ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf85ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf85ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf84ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf84ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf86ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf86ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf102ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf102ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_ftsf336ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf336ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 27) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf89ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf89ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf87ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf87ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf88ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf88ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 23) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf101ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 9) >> 31); |
| tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf101ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80) | (tie_t << 7); |
| tie_t = (val << 26) >> 31; |
| insn[0] = (insn[0] & ~0x400000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_ftsf335_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 10) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf335_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x380000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_t_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_t_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf196ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf196ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf208ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf208ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 27) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf341ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf341ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x100) | (tie_t << 8); |
| tie_t = (val << 29) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_ftsf200ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf200ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf340ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf340ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf195ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf195ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf198ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf198ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf197ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf197ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf199ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf199ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf201ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf201ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf204ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf204ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf202ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf202ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf203ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf203ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf205ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf205ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf207ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf207ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf206ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf206ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf210ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf210ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 27) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf339ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf339ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x100) | (tie_t << 8); |
| tie_t = (val << 29) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_ftsf128ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf128ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf130ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf130ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf129ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf129ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf132ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf132ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf147ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf147ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf150ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf150ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf149ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf149ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf151ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf151ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf163ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf163ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf166ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf166ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf165ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf165ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf167ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf167ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf190ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf190ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf193ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf193ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf191ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf191ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf194ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf194ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld132ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld132ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld69_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld69_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x8000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld68_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld68_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld19_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld19_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x100) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld22_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld22_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_op0_s3_s3_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 25) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_op0_s3_s3_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld131ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld131ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld74_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 10) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld74_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x200000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld66_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld66_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld91_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 14) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld91_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x20000) | (tie_t << 17); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld90_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld90_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x10000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld88_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld88_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld65_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 21) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld65_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld24_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 22) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld24_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x200) | (tie_t << 9); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld147ae_slot1_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 9) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld147ae_slot1_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld79_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 9) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld79_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_r_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 9) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_r_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0x780000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_op0_s4_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 25) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_op0_s4_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_imm8_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm8_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_t_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_t_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf280_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 10) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf280_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x380000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf288_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf288_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26); |
| } |
| |
| static unsigned |
| Field_ftsf360ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 6) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf360ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x3800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf213ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 21) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf213ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0x780) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf212ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 22) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf212ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x380) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf211ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf211ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf279ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 3) | ((insn[0] << 10) >> 29); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf279ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 21) >> 29; |
| insn[0] = (insn[0] & ~0x380000) | (tie_t << 19); |
| tie_t = (val << 17) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_s8_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 9) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_s8_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_ftsf313ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 12) | ((insn[0] << 13) >> 20); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf313ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 20) >> 20; |
| insn[0] = (insn[0] & ~0x7ff80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf282ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 3) | ((insn[0] << 10) >> 29); |
| tie_t = (tie_t << 7) | ((insn[0] << 17) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf282ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f00) | (tie_t << 8); |
| tie_t = (val << 22) >> 29; |
| insn[0] = (insn[0] & ~0x380000) | (tie_t << 19); |
| tie_t = (val << 18) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf361ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 9) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 13) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf361ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 27) >> 28; |
| insn[0] = (insn[0] & ~0x78000) | (tie_t << 15); |
| tie_t = (val << 26) >> 31; |
| insn[0] = (insn[0] & ~0x400000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_ftsf281ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 3) | ((insn[0] << 10) >> 29); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf281ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 21) >> 29; |
| insn[0] = (insn[0] & ~0x380000) | (tie_t << 19); |
| tie_t = (val << 17) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf287ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31); |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 7) | ((insn[0] << 17) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf287ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f00) | (tie_t << 8); |
| tie_t = (val << 23) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| tie_t = (val << 22) >> 31; |
| insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26); |
| } |
| |
| static unsigned |
| Field_ftsf368ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 6) >> 27); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf368ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 26) >> 27; |
| insn[0] = (insn[0] & ~0x3e00000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf285ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 5) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 7) | ((insn[0] << 17) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf285ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f00) | (tie_t << 8); |
| tie_t = (val << 23) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| tie_t = (val << 21) >> 30; |
| insn[0] = (insn[0] & ~0x6000000) | (tie_t << 25); |
| } |
| |
| static unsigned |
| Field_ftsf366ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 7) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf366ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 27) >> 28; |
| insn[0] = (insn[0] & ~0x1e00000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf284ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 5) >> 29); |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 7) | ((insn[0] << 17) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf284ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f00) | (tie_t << 8); |
| tie_t = (val << 23) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| tie_t = (val << 20) >> 29; |
| insn[0] = (insn[0] & ~0x7000000) | (tie_t << 24); |
| } |
| |
| static unsigned |
| Field_ftsf364ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 8) >> 29); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf364ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 28) >> 29; |
| insn[0] = (insn[0] & ~0xe00000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf297ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 14) | ((insn[0] << 11) >> 18); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf297ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 18) >> 18; |
| insn[0] = (insn[0] & ~0x1fff80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf309_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 10) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf309_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x200000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf327ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 5) >> 30); |
| tie_t = (tie_t << 1) | ((insn[0] << 8) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf327ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x800000) | (tie_t << 23); |
| tie_t = (val << 21) >> 30; |
| insn[0] = (insn[0] & ~0x6000000) | (tie_t << 25); |
| } |
| |
| static unsigned |
| Field_ftsf363ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 7) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf363ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x1000000) | (tie_t << 24); |
| } |
| |
| static unsigned |
| Field_ftsf214ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 18) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf214ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x3f80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf298ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf298ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 20) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf373ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 11) >> 31); |
| tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf373ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x8000) | (tie_t << 15); |
| tie_t = (val << 30) >> 31; |
| insn[0] = (insn[0] & ~0x100000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ftsf302ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 12) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf302ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0xc0000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_ftsf376ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 10) >> 30); |
| tie_t = (tie_t << 3) | ((insn[0] << 14) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf376ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x38000) | (tie_t << 15); |
| tie_t = (val << 27) >> 30; |
| insn[0] = (insn[0] & ~0x300000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ftsf300ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 12) >> 29); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf300ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 21) >> 29; |
| insn[0] = (insn[0] & ~0xe0000) | (tie_t << 17); |
| } |
| |
| static unsigned |
| Field_ftsf370ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 10) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 15) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf370ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x18000) | (tie_t << 15); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0x300000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ae_s20_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 5) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_s20_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x7000000) | (tie_t << 24); |
| } |
| |
| static unsigned |
| Field_ftsf378ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 8) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf378ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0xf80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf217ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf217ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf219ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf219ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf220ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf220ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf221ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf221ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf227ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf227ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf228ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf228ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf229ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf229ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf231ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf231ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf232ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf232ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf234ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf234ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf238ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf238ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf233ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf233ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf223ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf223ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf224ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf224ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf226ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf226ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf225ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf225ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf240ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf240ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf242ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf242ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf241ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf241ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf243ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf243ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf235ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf235ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf236ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf236ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf237ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf237ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf239ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf239ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf260ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf260ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf295ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf295ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf247ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf247ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf249ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf249ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf268ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf268ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf263ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf263ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf265ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf265ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf266ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf266ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf259ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf259ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf261ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf261ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf262ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf262ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf264ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf264ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf245ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf245ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf246ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf246ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf248ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf248ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf252ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf252ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf256ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf256ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf255ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf255ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf257ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf257ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf258ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf258ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf250ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf250ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf251ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf251ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf253ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf253ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf254ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf254ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf305ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 9) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf305ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x600000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf306ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 9) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf306ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x600000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf307ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 9) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf307ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x600000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf310ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 10) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf310ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x200000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf304ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 9) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf304ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x600000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf308ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 10) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf308ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x200000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ae_r10_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 9) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r10_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x600000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf329ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 17) >> 29); |
| tie_t = (tie_t << 1) | ((insn[0] << 21) >> 31); |
| tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf329ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x100) | (tie_t << 8); |
| tie_t = (val << 30) >> 31; |
| insn[0] = (insn[0] & ~0x400) | (tie_t << 10); |
| tie_t = (val << 27) >> 29; |
| insn[0] = (insn[0] & ~0x7000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ftsf379ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 9) >> 30); |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| tie_t = (tie_t << 1) | ((insn[0] << 22) >> 31); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf379ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 30) >> 31; |
| insn[0] = (insn[0] & ~0x200) | (tie_t << 9); |
| tie_t = (val << 29) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| tie_t = (val << 27) >> 30; |
| insn[0] = (insn[0] & ~0x600000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf272ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf272ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf273ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf273ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf274ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf274ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf276ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf276ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf269ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf269ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf271ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf271ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf275ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf275ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf270ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf270ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf296ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 13) | ((insn[0] << 12) >> 19); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf296ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 19) >> 19; |
| insn[0] = (insn[0] & ~0xfff80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf315_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 8) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf315_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld52_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 14) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld52_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x20000) | (tie_t << 17); |
| } |
| |
| static unsigned |
| Field_combined1e9fefee_fld96_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined1e9fefee_fld96_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x4000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_combined1e9fefee_fld98_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined1e9fefee_fld98_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld49_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld49_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld39_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 21) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld39_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld50_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 22) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld50_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x200) | (tie_t << 9); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld40_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld40_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x100) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_ftsf362_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf362_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_op0_s4_s4_s4_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 25) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_op0_s4_s4_s4_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_combined1e9fefee_fld109ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 15) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined1e9fefee_fld109ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x18000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_combined1e9fefee_fld108ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 14) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined1e9fefee_fld108ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x30000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld47_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld47_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x8000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_combined1e9fefee_fld107ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 14) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined1e9fefee_fld107ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x38000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_combined1e9fefee_fld106ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 14) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined1e9fefee_fld106ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x38000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_ftsf244ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf244ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf267ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf267ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf290ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf290ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| tie_t = (val << 19) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf289ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf289ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| tie_t = (val << 19) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf230ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf230ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf222ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf222ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf218ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf218ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf215ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf215ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ftsf314ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 8) >> 31); |
| tie_t = (tie_t << 12) | ((insn[0] << 13) >> 20); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf314ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 20) >> 20; |
| insn[0] = (insn[0] & ~0x7ff80) | (tie_t << 7); |
| tie_t = (val << 19) >> 31; |
| insn[0] = (insn[0] & ~0x800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf323ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf323ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 20) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf322ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf322ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 20) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf311ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 10) >> 31); |
| tie_t = (tie_t << 7) | ((insn[0] << 17) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf311ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f00) | (tie_t << 8); |
| tie_t = (val << 24) >> 31; |
| insn[0] = (insn[0] & ~0x200000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_ftsf386ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 5) >> 27); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf386ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 26) >> 27; |
| insn[0] = (insn[0] & ~0x7c00000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_ftsf278ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf278ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| tie_t = (val << 18) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf292ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 5) >> 29); |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 7) | ((insn[0] << 17) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf292ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f00) | (tie_t << 8); |
| tie_t = (val << 24) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| tie_t = (val << 21) >> 29; |
| insn[0] = (insn[0] & ~0x7000000) | (tie_t << 24); |
| } |
| |
| static unsigned |
| Field_ftsf382ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 8) >> 31); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf382ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 30) >> 31; |
| insn[0] = (insn[0] & ~0x800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf291ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 7) | ((insn[0] << 17) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf291ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f00) | (tie_t << 8); |
| tie_t = (val << 24) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| tie_t = (val << 20) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf294ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31); |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 7) | ((insn[0] << 17) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf294ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f00) | (tie_t << 8); |
| tie_t = (val << 24) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26); |
| } |
| |
| static unsigned |
| Field_ftsf383ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 6) >> 29); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf383ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 28) >> 29; |
| insn[0] = (insn[0] & ~0x3800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf293ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 5) >> 30); |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 7) | ((insn[0] << 17) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf293ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f00) | (tie_t << 8); |
| tie_t = (val << 24) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x6000000) | (tie_t << 25); |
| } |
| |
| static unsigned |
| Field_ftsf384ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 7) >> 30); |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf384ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| tie_t = (val << 29) >> 30; |
| insn[0] = (insn[0] & ~0x1800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf312ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 10) | ((insn[0] << 15) >> 22); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf312ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 22) >> 22; |
| insn[0] = (insn[0] & ~0x1ff80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf320ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf320ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x10000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_ftsf387ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 13) >> 30); |
| tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf387ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x8000) | (tie_t << 15); |
| tie_t = (val << 29) >> 30; |
| insn[0] = (insn[0] & ~0x60000) | (tie_t << 17); |
| tie_t = (val << 25) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf319ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 8) >> 31); |
| tie_t = (tie_t << 10) | ((insn[0] << 15) >> 22); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf319ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 22) >> 22; |
| insn[0] = (insn[0] & ~0x1ff80) | (tie_t << 7); |
| tie_t = (val << 21) >> 31; |
| insn[0] = (insn[0] & ~0x800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf388ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 5) >> 29); |
| tie_t = (tie_t << 2) | ((insn[0] << 13) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf388ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x60000) | (tie_t << 17); |
| tie_t = (val << 27) >> 29; |
| insn[0] = (insn[0] & ~0x7000000) | (tie_t << 24); |
| } |
| |
| static unsigned |
| Field_ftsf317ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 8) >> 31); |
| tie_t = (tie_t << 1) | ((insn[0] << 13) >> 31); |
| tie_t = (tie_t << 10) | ((insn[0] << 15) >> 22); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf317ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 22) >> 22; |
| insn[0] = (insn[0] & ~0x1ff80) | (tie_t << 7); |
| tie_t = (val << 21) >> 31; |
| insn[0] = (insn[0] & ~0x40000) | (tie_t << 18); |
| tie_t = (val << 20) >> 31; |
| insn[0] = (insn[0] & ~0x800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf389ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 5) >> 29); |
| tie_t = (tie_t << 1) | ((insn[0] << 14) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf389ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x20000) | (tie_t << 17); |
| tie_t = (val << 28) >> 29; |
| insn[0] = (insn[0] & ~0x7000000) | (tie_t << 24); |
| } |
| |
| static unsigned |
| Field_ftsf324ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf324ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 20) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf325ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf325ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 20) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf328ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf328ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26); |
| } |
| |
| static unsigned |
| Field_ftsf316ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 8) >> 31); |
| tie_t = (tie_t << 12) | ((insn[0] << 13) >> 20); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf316ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 20) >> 20; |
| insn[0] = (insn[0] & ~0x7ff80) | (tie_t << 7); |
| tie_t = (val << 19) >> 31; |
| insn[0] = (insn[0] & ~0x800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf326ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 5) >> 30); |
| tie_t = (tie_t << 1) | ((insn[0] << 8) >> 31); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf326ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 23) >> 31; |
| insn[0] = (insn[0] & ~0x800000) | (tie_t << 23); |
| tie_t = (val << 21) >> 30; |
| insn[0] = (insn[0] & ~0x6000000) | (tie_t << 25); |
| } |
| |
| static unsigned |
| Field_ftsf277ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf277ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| tie_t = (val << 22) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| tie_t = (val << 18) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld123_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 6) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld123_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x2000000) | (tie_t << 25); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld121_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld121_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld28_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld28_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x4000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld127_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld127_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x3000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_op0_s4_s4_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 7) | ((insn[0] << 25) >> 25); |
| return tie_t; |
| } |
| |
| static void |
| Field_op0_s4_s4_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 25) >> 25; |
| insn[0] = (insn[0] & ~0x7f) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld149ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 8) | ((insn[0] << 17) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld149ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0x7f80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld137ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld137ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld144ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld144ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld138ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld138ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld143ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld143ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld134ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld134ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld140ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld140ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld135ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld135ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld142ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld142ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld136ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld136ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld141ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld141ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld133ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld133ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld139ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld139ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld146ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld146ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld46_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 11) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld46_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x100000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld145ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld145ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_t_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_t_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_bbi4_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_bbi4_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x100) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_bbi_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_bbi_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x100) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_bbi_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 5) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_bbi_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0x7c00000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_imm12_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 12) | ((insn[0] << 20) >> 20); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm12_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 20) >> 20; |
| insn[0] = (insn[0] & ~0xfff) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_imm12_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 8) | ((insn[0] << 5) >> 24); |
| tie_t = (tie_t << 4) | ((insn[0] << 17) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm12_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0x7800) | (tie_t << 11); |
| tie_t = (val << 20) >> 24; |
| insn[0] = (insn[0] & ~0x7f80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_imm8_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 8) | ((insn[0] << 24) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm8_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0xff) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_s_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_s_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_s_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 13) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_s_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0x78000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_imm12b_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| tie_t = (tie_t << 8) | ((insn[0] << 24) >> 24); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm12b_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 24) >> 24; |
| insn[0] = (insn[0] & ~0xff) | (tie_t << 0); |
| tie_t = (val << 20) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_imm12b_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 12) | ((insn[0] << 9) >> 20); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm12b_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 20) >> 20; |
| insn[0] = (insn[0] & ~0x7ff800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_imm16_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 16) | ((insn[0] << 16) >> 16); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm16_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 16) >> 16; |
| insn[0] = (insn[0] & ~0xffff) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_imm16_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 16) | ((insn[0] << 9) >> 16); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm16_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 16) >> 16; |
| insn[0] = (insn[0] & ~0x7fff80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_offset_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 18) | ((insn[0] << 14) >> 14); |
| return tie_t; |
| } |
| |
| static void |
| Field_offset_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 14) >> 14; |
| insn[0] = (insn[0] & ~0x3ffff) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_offset_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 18) | ((insn[0] << 5) >> 14); |
| return tie_t; |
| } |
| |
| static void |
| Field_offset_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 14) >> 14; |
| insn[0] = (insn[0] & ~0x7fffe00) | (tie_t << 9); |
| } |
| |
| static unsigned |
| Field_op2_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 13) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_op2_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0x78000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_r_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_r_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_sa4_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 31) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_sa4_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x1) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_sae4_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_sae4_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x10) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_sae_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_sae_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x10) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_sae_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 17) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_sae_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0x7c00) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_sal_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 31) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_sal_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x1) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_sal_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_sal_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x4000) | (tie_t << 14); |
| tie_t = (val << 27) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_sargt_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 31) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_sargt_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x1) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_sargt_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 13) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_sargt_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0x7c000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_sas4_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_sas4_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x10000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_sas_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_sas_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x10000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_sas_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 5) | ((insn[0] << 5) >> 27); |
| return tie_t; |
| } |
| |
| static void |
| Field_sas_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 27) >> 27; |
| insn[0] = (insn[0] & ~0x7c00000) | (tie_t << 22); |
| } |
| |
| static unsigned |
| Field_sr_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28); |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_sr_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0xf0) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_sr_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28); |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_sr_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0xf0) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_st_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28); |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_st_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0xf0) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_st_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28); |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_st_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| tie_t = (val << 24) >> 28; |
| insn[0] = (insn[0] & ~0xf0) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_imm4_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm4_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_imm4_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_imm4_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_mn_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 12) >> 30); |
| tie_t = (tie_t << 2) | ((insn[0] << 14) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_mn_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x30000) | (tie_t << 16); |
| tie_t = (val << 28) >> 30; |
| insn[0] = (insn[0] & ~0xc0000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_i_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_i_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_imm6lo_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm6lo_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_imm6lo_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm6lo_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_imm6hi_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm6hi_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x300) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_imm6hi_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm6hi_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x300) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_imm7lo_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm7lo_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_imm7lo_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm7lo_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| } |
| |
| static unsigned |
| Field_imm7hi_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 21) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm7hi_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x700) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_imm7hi_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 21) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm7hi_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x700) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_z_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 21) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_z_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_imm6_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30); |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm6_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| tie_t = (val << 26) >> 30; |
| insn[0] = (insn[0] & ~0x300) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_imm6_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30); |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm6_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| tie_t = (val << 26) >> 30; |
| insn[0] = (insn[0] & ~0x300) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_imm7_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 21) >> 29); |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm7_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| tie_t = (val << 25) >> 29; |
| insn[0] = (insn[0] & ~0x700) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_imm7_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 21) >> 29); |
| tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_imm7_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf) | (tie_t << 0); |
| tie_t = (val << 25) >> 29; |
| insn[0] = (insn[0] & ~0x700) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_rbit2_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 21) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_rbit2_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_tbit2_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 13) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_tbit2_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x40000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_y_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 13) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_y_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x40000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_x_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 21) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_x_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x400) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_t2_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 12) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_t2_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe0000) | (tie_t << 17); |
| } |
| |
| static unsigned |
| Field_t2_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_t2_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| } |
| |
| static unsigned |
| Field_t2_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_t2_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| } |
| |
| static unsigned |
| Field_t2_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_t2_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| tie_t = (val << 29) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_s2_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_s2_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe000) | (tie_t << 13); |
| } |
| |
| static unsigned |
| Field_s2_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_s2_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe0) | (tie_t << 5); |
| } |
| |
| static unsigned |
| Field_s2_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_s2_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe0) | (tie_t << 5); |
| } |
| |
| static unsigned |
| Field_r2_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_r2_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| } |
| |
| static unsigned |
| Field_r2_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 28) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_r2_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe) | (tie_t << 1); |
| } |
| |
| static unsigned |
| Field_r2_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 28) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_r2_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe) | (tie_t << 1); |
| } |
| |
| static unsigned |
| Field_t4_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 12) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_t4_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc0000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_t4_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_t4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc00) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_t4_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_t4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc00) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_s4_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_s4_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_s4_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_s4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc0) | (tie_t << 6); |
| } |
| |
| static unsigned |
| Field_s4_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_s4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc0) | (tie_t << 6); |
| } |
| |
| static unsigned |
| Field_s4_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 9) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_s4_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x600000) | (tie_t << 21); |
| } |
| |
| static unsigned |
| Field_r4_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_r4_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc00) | (tie_t << 10); |
| } |
| |
| static unsigned |
| Field_r4_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 28) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_r4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc) | (tie_t << 2); |
| } |
| |
| static unsigned |
| Field_r4_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 28) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_r4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc) | (tie_t << 2); |
| } |
| |
| static unsigned |
| Field_t8_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_t8_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_t8_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_t8_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_t8_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_t8_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_s8_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_s8_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x8000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_s8_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_s8_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_s8_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_s8_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_r8_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_r8_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x800) | (tie_t << 11); |
| } |
| |
| static unsigned |
| Field_r8_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 28) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_r8_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x8) | (tie_t << 3); |
| } |
| |
| static unsigned |
| Field_r8_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 28) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_r8_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x8) | (tie_t << 3); |
| } |
| |
| static unsigned |
| Field_xt_wbr15_imm_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 15) | ((insn[0] << 8) >> 17); |
| return tie_t; |
| } |
| |
| static void |
| Field_xt_wbr15_imm_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 17) >> 17; |
| insn[0] = (insn[0] & ~0xfffe00) | (tie_t << 9); |
| } |
| |
| static unsigned |
| Field_xt_wbr18_imm_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 18) | ((insn[0] << 8) >> 14); |
| return tie_t; |
| } |
| |
| static void |
| Field_xt_wbr18_imm_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 14) >> 14; |
| insn[0] = (insn[0] & ~0xffffc0) | (tie_t << 6); |
| } |
| |
| static unsigned |
| Field_ae_r32_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 11) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r32_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_ae_samt_s_t_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 6) | ((insn[0] << 12) >> 26); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_samt_s_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 26) >> 26; |
| insn[0] = (insn[0] & ~0xfc000) | (tie_t << 14); |
| } |
| |
| static unsigned |
| Field_ae_samt_s_t_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| tie_t = (tie_t << 2) | ((insn[0] << 13) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_samt_s_t_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x60000) | (tie_t << 17); |
| tie_t = (val << 26) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ae_r20_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 21) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r20_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x700) | (tie_t << 8); |
| } |
| |
| static unsigned |
| Field_ae_r20_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 9) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_r20_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x700000) | (tie_t << 20); |
| } |
| |
| static unsigned |
| Field_ae_s20_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 17) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_s20_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x7000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_ae_fld_ohba_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_fld_ohba_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_ae_fld_ohba2_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_ae_fld_ohba2_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_ftsf11_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 12) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf11_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe0000) | (tie_t << 17); |
| } |
| |
| static unsigned |
| Field_ftsf11_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf11_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe00) | (tie_t << 9); |
| } |
| |
| static unsigned |
| Field_ftsf11_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 8) >> 31); |
| tie_t = (tie_t << 2) | ((insn[0] << 12) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf11_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc0000) | (tie_t << 18); |
| tie_t = (val << 29) >> 31; |
| insn[0] = (insn[0] & ~0x800000) | (tie_t << 23); |
| } |
| |
| static unsigned |
| Field_ftsf12_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 12) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf12_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0xc0000) | (tie_t << 18); |
| } |
| |
| static unsigned |
| Field_ftsf12_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 2) | ((insn[0] << 23) >> 30); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf12_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 30) >> 30; |
| insn[0] = (insn[0] & ~0x180) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_ftsf13_Slot_ae_slot1_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 12) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_ftsf13_Slot_ae_slot1_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf000) | (tie_t << 12); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x80000) | (tie_t << 19); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld37_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld37_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 31) >> 31; |
| insn[0] = (insn[0] & ~0x10000) | (tie_t << 16); |
| } |
| |
| static unsigned |
| Field_combined2c0b5f72_fld148ae_slot0_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 11) | ((insn[0] << 14) >> 21); |
| return tie_t; |
| } |
| |
| static void |
| Field_combined2c0b5f72_fld148ae_slot0_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 21) >> 21; |
| insn[0] = (insn[0] & ~0x3ff80) | (tie_t << 7); |
| } |
| |
| static unsigned |
| Field_bitindex_Slot_inst_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_bitindex_Slot_inst_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x1000) | (tie_t << 12); |
| } |
| |
| static unsigned |
| Field_bitindex_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_bitindex_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x10) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_bitindex_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_bitindex_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0xf00) | (tie_t << 8); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x10) | (tie_t << 4); |
| } |
| |
| static unsigned |
| Field_bitindex_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31); |
| tie_t = (tie_t << 4) | ((insn[0] << 5) >> 28); |
| return tie_t; |
| } |
| |
| static void |
| Field_bitindex_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 28) >> 28; |
| insn[0] = (insn[0] & ~0x7800000) | (tie_t << 23); |
| tie_t = (val << 27) >> 31; |
| insn[0] = (insn[0] & ~0x8000) | (tie_t << 15); |
| } |
| |
| static unsigned |
| Field_s3to1_Slot_inst16a_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_s3to1_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe0) | (tie_t << 5); |
| } |
| |
| static unsigned |
| Field_s3to1_Slot_inst16b_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_s3to1_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0xe0) | (tie_t << 5); |
| } |
| |
| static unsigned |
| Field_s3to1_Slot_ae_slot0_get (const xtensa_insnbuf insn) |
| { |
| unsigned tie_t = 0; |
| tie_t = (tie_t << 3) | ((insn[0] << 13) >> 29); |
| return tie_t; |
| } |
| |
| static void |
| Field_s3to1_Slot_ae_slot0_set (xtensa_insnbuf insn, uint32 val) |
| { |
| uint32 tie_t; |
| tie_t = (val << 29) >> 29; |
| insn[0] = (insn[0] & ~0x70000) | (tie_t << 16); |
| } |
| |
| static void |
| Implicit_Field_set (xtensa_insnbuf insn ATTRIBUTE_UNUSED, |
| uint32 val ATTRIBUTE_UNUSED) |
| { |
| /* Do nothing. */ |
| } |
| |
| static unsigned |
| Implicit_Field_ar0_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static unsigned |
| Implicit_Field_ar4_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 4; |
| } |
| |
| static unsigned |
| Implicit_Field_ar8_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 8; |
| } |
| |
| static unsigned |
| Implicit_Field_ar12_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 12; |
| } |
| |
| static unsigned |
| Implicit_Field_mr0_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static unsigned |
| Implicit_Field_mr1_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 1; |
| } |
| |
| static unsigned |
| Implicit_Field_mr2_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 2; |
| } |
| |
| static unsigned |
| Implicit_Field_mr3_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 3; |
| } |
| |
| static unsigned |
| Implicit_Field_bt16_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static unsigned |
| Implicit_Field_bs16_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static unsigned |
| Implicit_Field_br16_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static unsigned |
| Implicit_Field_brall_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| enum xtensa_field_id { |
| FIELD_t, |
| FIELD_bbi4, |
| FIELD_bbi, |
| FIELD_imm12, |
| FIELD_imm8, |
| FIELD_s, |
| FIELD_imm12b, |
| FIELD_imm16, |
| FIELD_m, |
| FIELD_n, |
| FIELD_offset, |
| FIELD_op0, |
| FIELD_op1, |
| FIELD_op2, |
| FIELD_r, |
| FIELD_sa4, |
| FIELD_sae4, |
| FIELD_sae, |
| FIELD_sal, |
| FIELD_sargt, |
| FIELD_sas4, |
| FIELD_sas, |
| FIELD_sr, |
| FIELD_st, |
| FIELD_thi3, |
| FIELD_imm4, |
| FIELD_mn, |
| FIELD_i, |
| FIELD_imm6lo, |
| FIELD_imm6hi, |
| FIELD_imm7lo, |
| FIELD_imm7hi, |
| FIELD_z, |
| FIELD_imm6, |
| FIELD_imm7, |
| FIELD_r3, |
| FIELD_rbit2, |
| FIELD_rhi, |
| FIELD_t3, |
| FIELD_tbit2, |
| FIELD_tlo, |
| FIELD_w, |
| FIELD_y, |
| FIELD_x, |
| FIELD_t2, |
| FIELD_s2, |
| FIELD_r2, |
| FIELD_t4, |
| FIELD_s4, |
| FIELD_r4, |
| FIELD_t8, |
| FIELD_s8, |
| FIELD_r8, |
| FIELD_xt_wbr15_imm, |
| FIELD_xt_wbr18_imm, |
| FIELD_ae_r3, |
| FIELD_ae_s_non_samt, |
| FIELD_ae_s3, |
| FIELD_ae_r32, |
| FIELD_ae_samt_s_t, |
| FIELD_ae_r20, |
| FIELD_ae_r10, |
| FIELD_ae_s20, |
| FIELD_ae_fld_ohba, |
| FIELD_ae_fld_ohba2, |
| FIELD_op0_s3, |
| FIELD_ftsf11, |
| FIELD_ftsf12, |
| FIELD_ftsf13, |
| FIELD_ftsf20ae_slot1, |
| FIELD_ftsf21ae_slot1, |
| FIELD_ftsf22ae_slot1, |
| FIELD_ftsf23ae_slot1, |
| FIELD_ftsf24ae_slot1, |
| FIELD_ftsf25ae_slot1, |
| FIELD_ftsf26ae_slot1, |
| FIELD_ftsf27ae_slot1, |
| FIELD_ftsf28ae_slot1, |
| FIELD_ftsf29ae_slot1, |
| FIELD_ftsf30ae_slot1, |
| FIELD_ftsf31ae_slot1, |
| FIELD_ftsf32ae_slot1, |
| FIELD_ftsf33ae_slot1, |
| FIELD_ftsf34ae_slot1, |
| FIELD_ftsf35ae_slot1, |
| FIELD_ftsf36ae_slot1, |
| FIELD_ftsf37ae_slot1, |
| FIELD_ftsf38ae_slot1, |
| FIELD_ftsf40ae_slot1, |
| FIELD_ftsf41ae_slot1, |
| FIELD_ftsf42ae_slot1, |
| FIELD_ftsf43ae_slot1, |
| FIELD_ftsf45ae_slot1, |
| FIELD_ftsf47ae_slot1, |
| FIELD_ftsf48ae_slot1, |
| FIELD_ftsf49ae_slot1, |
| FIELD_ftsf50ae_slot1, |
| FIELD_ftsf51ae_slot1, |
| FIELD_ftsf52ae_slot1, |
| FIELD_ftsf53ae_slot1, |
| FIELD_ftsf54ae_slot1, |
| FIELD_ftsf55, |
| FIELD_ftsf56ae_slot1, |
| FIELD_ftsf57ae_slot1, |
| FIELD_ftsf58ae_slot1, |
| FIELD_ftsf60ae_slot1, |
| FIELD_ftsf61, |
| FIELD_ftsf62ae_slot1, |
| FIELD_ftsf63ae_slot1, |
| FIELD_ftsf64ae_slot1, |
| FIELD_ftsf66ae_slot1, |
| FIELD_ftsf68ae_slot1, |
| FIELD_ftsf69ae_slot1, |
| FIELD_ftsf70ae_slot1, |
| FIELD_ftsf71ae_slot1, |
| FIELD_ftsf72ae_slot1, |
| FIELD_ftsf73ae_slot1, |
| FIELD_ftsf74ae_slot1, |
| FIELD_ftsf75ae_slot1, |
| FIELD_ftsf76ae_slot1, |
| FIELD_ftsf77ae_slot1, |
| FIELD_ftsf78ae_slot1, |
| FIELD_ftsf79ae_slot1, |
| FIELD_ftsf80ae_slot1, |
| FIELD_ftsf81ae_slot1, |
| FIELD_ftsf82ae_slot1, |
| FIELD_ftsf83ae_slot1, |
| FIELD_ftsf84ae_slot1, |
| FIELD_ftsf85ae_slot1, |
| FIELD_ftsf86ae_slot1, |
| FIELD_ftsf87ae_slot1, |
| FIELD_ftsf88ae_slot1, |
| FIELD_ftsf89ae_slot1, |
| FIELD_ftsf90ae_slot1, |
| FIELD_ftsf91, |
| FIELD_ftsf92ae_slot1, |
| FIELD_ftsf93ae_slot1, |
| FIELD_ftsf94ae_slot1, |
| FIELD_ftsf96ae_slot1, |
| FIELD_ftsf97ae_slot1, |
| FIELD_ftsf99ae_slot1, |
| FIELD_ftsf101ae_slot1, |
| FIELD_ftsf102ae_slot1, |
| FIELD_ftsf103ae_slot1, |
| FIELD_ftsf106ae_slot1, |
| FIELD_ftsf107ae_slot1, |
| FIELD_ftsf108ae_slot1, |
| FIELD_ftsf109ae_slot1, |
| FIELD_ftsf110ae_slot1, |
| FIELD_ftsf111ae_slot1, |
| FIELD_ftsf112ae_slot1, |
| FIELD_ftsf113ae_slot1, |
| FIELD_ftsf114ae_slot1, |
| FIELD_ftsf115ae_slot1, |
| FIELD_ftsf116ae_slot1, |
| FIELD_ftsf117ae_slot1, |
| FIELD_ftsf118ae_slot1, |
| FIELD_ftsf120ae_slot1, |
| FIELD_ftsf121ae_slot1, |
| FIELD_ftsf123ae_slot1, |
| FIELD_ftsf124ae_slot1, |
| FIELD_ftsf125ae_slot1, |
| FIELD_ftsf126ae_slot1, |
| FIELD_ftsf127ae_slot1, |
| FIELD_ftsf128ae_slot1, |
| FIELD_ftsf129ae_slot1, |
| FIELD_ftsf130ae_slot1, |
| FIELD_ftsf131ae_slot1, |
| FIELD_ftsf132ae_slot1, |
| FIELD_ftsf133ae_slot1, |
| FIELD_ftsf134ae_slot1, |
| FIELD_ftsf135ae_slot1, |
| FIELD_ftsf136ae_slot1, |
| FIELD_ftsf137ae_slot1, |
| FIELD_ftsf138ae_slot1, |
| FIELD_ftsf139ae_slot1, |
| FIELD_ftsf140ae_slot1, |
| FIELD_ftsf141ae_slot1, |
| FIELD_ftsf142ae_slot1, |
| FIELD_ftsf143ae_slot1, |
| FIELD_ftsf144ae_slot1, |
| FIELD_ftsf145ae_slot1, |
| FIELD_ftsf146ae_slot1, |
| FIELD_ftsf147ae_slot1, |
| FIELD_ftsf148ae_slot1, |
| FIELD_ftsf149ae_slot1, |
| FIELD_ftsf150ae_slot1, |
| FIELD_ftsf151ae_slot1, |
| FIELD_ftsf152ae_slot1, |
| FIELD_ftsf153ae_slot1, |
| FIELD_ftsf154ae_slot1, |
| FIELD_ftsf155ae_slot1, |
| FIELD_ftsf156ae_slot1, |
| FIELD_ftsf157ae_slot1, |
| FIELD_ftsf158ae_slot1, |
| FIELD_ftsf159ae_slot1, |
| FIELD_ftsf160ae_slot1, |
| FIELD_ftsf161ae_slot1, |
| FIELD_ftsf162ae_slot1, |
| FIELD_ftsf163ae_slot1, |
| FIELD_ftsf164ae_slot1, |
| FIELD_ftsf165ae_slot1, |
| FIELD_ftsf166ae_slot1, |
| FIELD_ftsf167ae_slot1, |
| FIELD_ftsf168ae_slot1, |
| FIELD_ftsf169ae_slot1, |
| FIELD_ftsf170ae_slot1, |
| FIELD_ftsf171ae_slot1, |
| FIELD_ftsf172ae_slot1, |
| FIELD_ftsf173ae_slot1, |
| FIELD_ftsf174ae_slot1, |
| FIELD_ftsf175ae_slot1, |
| FIELD_ftsf176ae_slot1, |
| FIELD_ftsf177ae_slot1, |
| FIELD_ftsf178ae_slot1, |
| FIELD_ftsf179ae_slot1, |
| FIELD_ftsf180ae_slot1, |
| FIELD_ftsf181ae_slot1, |
| FIELD_ftsf182ae_slot1, |
| FIELD_ftsf183ae_slot1, |
| FIELD_ftsf184ae_slot1, |
| FIELD_ftsf185ae_slot1, |
| FIELD_ftsf186ae_slot1, |
| FIELD_ftsf187ae_slot1, |
| FIELD_ftsf188ae_slot1, |
| FIELD_ftsf189ae_slot1, |
| FIELD_ftsf190ae_slot1, |
| FIELD_ftsf191ae_slot1, |
| FIELD_ftsf192ae_slot1, |
| FIELD_ftsf193ae_slot1, |
| FIELD_ftsf194ae_slot1, |
| FIELD_ftsf195ae_slot1, |
| FIELD_ftsf196ae_slot1, |
| FIELD_ftsf197ae_slot1, |
| FIELD_ftsf198ae_slot1, |
| FIELD_ftsf199ae_slot1, |
| FIELD_ftsf200ae_slot1, |
| FIELD_ftsf201ae_slot1, |
| FIELD_ftsf202ae_slot1, |
| FIELD_ftsf203ae_slot1, |
| FIELD_ftsf204ae_slot1, |
| FIELD_ftsf205ae_slot1, |
| FIELD_ftsf206ae_slot1, |
| FIELD_ftsf207ae_slot1, |
| FIELD_ftsf208ae_slot1, |
| FIELD_ftsf210ae_slot1, |
| FIELD_ftsf333ae_slot1, |
| FIELD_ftsf334ae_slot1, |
| FIELD_ftsf335, |
| FIELD_ftsf336ae_slot1, |
| FIELD_ftsf337ae_slot1, |
| FIELD_ftsf339ae_slot1, |
| FIELD_ftsf340ae_slot1, |
| FIELD_ftsf341ae_slot1, |
| FIELD_ftsf342ae_slot1, |
| FIELD_ftsf343ae_slot1, |
| FIELD_ftsf344ae_slot1, |
| FIELD_ftsf345ae_slot1, |
| FIELD_ftsf347ae_slot1, |
| FIELD_ftsf348ae_slot1, |
| FIELD_ftsf349ae_slot1, |
| FIELD_ftsf350ae_slot1, |
| FIELD_ftsf351, |
| FIELD_ftsf352ae_slot1, |
| FIELD_ftsf354ae_slot1, |
| FIELD_ftsf355ae_slot1, |
| FIELD_ftsf356ae_slot1, |
| FIELD_ftsf357ae_slot1, |
| FIELD_ftsf358ae_slot1, |
| FIELD_ftsf359ae_slot1, |
| FIELD_op0_s4, |
| FIELD_ftsf211ae_slot0, |
| FIELD_ftsf212ae_slot0, |
| FIELD_ftsf213ae_slot0, |
| FIELD_ftsf214ae_slot0, |
| FIELD_ftsf215ae_slot0, |
| FIELD_ftsf217ae_slot0, |
| FIELD_ftsf218ae_slot0, |
| FIELD_ftsf219ae_slot0, |
| FIELD_ftsf220ae_slot0, |
| FIELD_ftsf221ae_slot0, |
| FIELD_ftsf222ae_slot0, |
| FIELD_ftsf223ae_slot0, |
| FIELD_ftsf224ae_slot0, |
| FIELD_ftsf225ae_slot0, |
| FIELD_ftsf226ae_slot0, |
| FIELD_ftsf227ae_slot0, |
| FIELD_ftsf228ae_slot0, |
| FIELD_ftsf229ae_slot0, |
| FIELD_ftsf230ae_slot0, |
| FIELD_ftsf231ae_slot0, |
| FIELD_ftsf232ae_slot0, |
| FIELD_ftsf233ae_slot0, |
| FIELD_ftsf234ae_slot0, |
| FIELD_ftsf235ae_slot0, |
| FIELD_ftsf236ae_slot0, |
| FIELD_ftsf237ae_slot0, |
| FIELD_ftsf238ae_slot0, |
| FIELD_ftsf239ae_slot0, |
| FIELD_ftsf240ae_slot0, |
| FIELD_ftsf241ae_slot0, |
| FIELD_ftsf242ae_slot0, |
| FIELD_ftsf243ae_slot0, |
| FIELD_ftsf244ae_slot0, |
| FIELD_ftsf245ae_slot0, |
| FIELD_ftsf246ae_slot0, |
| FIELD_ftsf247ae_slot0, |
| FIELD_ftsf248ae_slot0, |
| FIELD_ftsf249ae_slot0, |
| FIELD_ftsf250ae_slot0, |
| FIELD_ftsf251ae_slot0, |
| FIELD_ftsf252ae_slot0, |
| FIELD_ftsf253ae_slot0, |
| FIELD_ftsf254ae_slot0, |
| FIELD_ftsf255ae_slot0, |
| FIELD_ftsf256ae_slot0, |
| FIELD_ftsf257ae_slot0, |
| FIELD_ftsf258ae_slot0, |
| FIELD_ftsf259ae_slot0, |
| FIELD_ftsf260ae_slot0, |
| FIELD_ftsf261ae_slot0, |
| FIELD_ftsf262ae_slot0, |
| FIELD_ftsf263ae_slot0, |
| FIELD_ftsf264ae_slot0, |
| FIELD_ftsf265ae_slot0, |
| FIELD_ftsf266ae_slot0, |
| FIELD_ftsf267ae_slot0, |
| FIELD_ftsf268ae_slot0, |
| FIELD_ftsf269ae_slot0, |
| FIELD_ftsf270ae_slot0, |
| FIELD_ftsf271ae_slot0, |
| FIELD_ftsf272ae_slot0, |
| FIELD_ftsf273ae_slot0, |
| FIELD_ftsf274ae_slot0, |
| FIELD_ftsf275ae_slot0, |
| FIELD_ftsf276ae_slot0, |
| FIELD_ftsf277ae_slot0, |
| FIELD_ftsf278ae_slot0, |
| FIELD_ftsf279ae_slot0, |
| FIELD_ftsf280, |
| FIELD_ftsf281ae_slot0, |
| FIELD_ftsf282ae_slot0, |
| FIELD_ftsf284ae_slot0, |
| FIELD_ftsf285ae_slot0, |
| FIELD_ftsf287ae_slot0, |
| FIELD_ftsf288, |
| FIELD_ftsf289ae_slot0, |
| FIELD_ftsf290ae_slot0, |
| FIELD_ftsf291ae_slot0, |
| FIELD_ftsf292ae_slot0, |
| FIELD_ftsf293ae_slot0, |
| FIELD_ftsf294ae_slot0, |
| FIELD_ftsf295ae_slot0, |
| FIELD_ftsf296ae_slot0, |
| FIELD_ftsf297ae_slot0, |
| FIELD_ftsf298ae_slot0, |
| FIELD_ftsf300ae_slot0, |
| FIELD_ftsf302ae_slot0, |
| FIELD_ftsf304ae_slot0, |
| FIELD_ftsf305ae_slot0, |
| FIELD_ftsf306ae_slot0, |
| FIELD_ftsf307ae_slot0, |
| FIELD_ftsf308ae_slot0, |
| FIELD_ftsf309, |
| FIELD_ftsf310ae_slot0, |
| FIELD_ftsf311ae_slot0, |
| FIELD_ftsf312ae_slot0, |
| FIELD_ftsf313ae_slot0, |
| FIELD_ftsf314ae_slot0, |
| FIELD_ftsf315, |
| FIELD_ftsf316ae_slot0, |
| FIELD_ftsf317ae_slot0, |
| FIELD_ftsf319ae_slot0, |
| FIELD_ftsf320ae_slot0, |
| FIELD_ftsf322ae_slot0, |
| FIELD_ftsf323ae_slot0, |
| FIELD_ftsf324ae_slot0, |
| FIELD_ftsf325ae_slot0, |
| FIELD_ftsf326ae_slot0, |
| FIELD_ftsf327ae_slot0, |
| FIELD_ftsf328ae_slot0, |
| FIELD_ftsf329ae_slot0, |
| FIELD_ftsf360ae_slot0, |
| FIELD_ftsf361ae_slot0, |
| FIELD_ftsf362, |
| FIELD_ftsf363ae_slot0, |
| FIELD_ftsf364ae_slot0, |
| FIELD_ftsf366ae_slot0, |
| FIELD_ftsf368ae_slot0, |
| FIELD_ftsf370ae_slot0, |
| FIELD_ftsf373ae_slot0, |
| FIELD_ftsf376ae_slot0, |
| FIELD_ftsf378ae_slot0, |
| FIELD_ftsf379ae_slot0, |
| FIELD_ftsf382ae_slot0, |
| FIELD_ftsf383ae_slot0, |
| FIELD_ftsf384ae_slot0, |
| FIELD_ftsf386ae_slot0, |
| FIELD_ftsf387ae_slot0, |
| FIELD_ftsf388ae_slot0, |
| FIELD_ftsf389ae_slot0, |
| FIELD_ae_mul32x24fld, |
| FIELD_op0_s4_s4, |
| FIELD_combined2c0b5f72_fld28, |
| FIELD_combined2c0b5f72_fld37, |
| FIELD_combined2c0b5f72_fld39, |
| FIELD_combined2c0b5f72_fld40, |
| FIELD_combined2c0b5f72_fld46, |
| FIELD_combined2c0b5f72_fld47, |
| FIELD_combined2c0b5f72_fld49, |
| FIELD_combined2c0b5f72_fld50, |
| FIELD_combined2c0b5f72_fld52, |
| FIELD_combined2c0b5f72_fld121, |
| FIELD_combined2c0b5f72_fld123, |
| FIELD_combined2c0b5f72_fld127, |
| FIELD_combined2c0b5f72_fld133ae_slot0, |
| FIELD_combined2c0b5f72_fld134ae_slot0, |
| FIELD_combined2c0b5f72_fld135ae_slot0, |
| FIELD_combined2c0b5f72_fld136ae_slot0, |
| FIELD_combined2c0b5f72_fld137ae_slot0, |
| FIELD_combined2c0b5f72_fld138ae_slot0, |
| FIELD_combined2c0b5f72_fld139ae_slot0, |
| FIELD_combined2c0b5f72_fld140ae_slot0, |
| FIELD_combined2c0b5f72_fld141ae_slot0, |
| FIELD_combined2c0b5f72_fld142ae_slot0, |
| FIELD_combined2c0b5f72_fld143ae_slot0, |
| FIELD_combined2c0b5f72_fld144ae_slot0, |
| FIELD_combined2c0b5f72_fld145ae_slot0, |
| FIELD_combined2c0b5f72_fld146ae_slot0, |
| FIELD_combined2c0b5f72_fld148ae_slot0, |
| FIELD_combined2c0b5f72_fld149ae_slot0, |
| FIELD_op0_s4_s4_s4, |
| FIELD_combined1e9fefee_fld96, |
| FIELD_combined1e9fefee_fld98, |
| FIELD_combined1e9fefee_fld106ae_slot0, |
| FIELD_combined1e9fefee_fld107ae_slot0, |
| FIELD_combined1e9fefee_fld108ae_slot0, |
| FIELD_combined1e9fefee_fld109ae_slot0, |
| FIELD_op0_s3_s3, |
| FIELD_combined2c0b5f72_fld19, |
| FIELD_combined2c0b5f72_fld22, |
| FIELD_combined2c0b5f72_fld24, |
| FIELD_combined2c0b5f72_fld65, |
| FIELD_combined2c0b5f72_fld66, |
| FIELD_combined2c0b5f72_fld68, |
| FIELD_combined2c0b5f72_fld69, |
| FIELD_combined2c0b5f72_fld74, |
| FIELD_combined2c0b5f72_fld79, |
| FIELD_combined2c0b5f72_fld88, |
| FIELD_combined2c0b5f72_fld90, |
| FIELD_combined2c0b5f72_fld91, |
| FIELD_combined2c0b5f72_fld131ae_slot1, |
| FIELD_combined2c0b5f72_fld132ae_slot1, |
| FIELD_combined2c0b5f72_fld147ae_slot1, |
| FIELD_bitindex, |
| FIELD_s3to1, |
| FIELD__ar0, |
| FIELD__ar4, |
| FIELD__ar8, |
| FIELD__ar12, |
| FIELD__mr0, |
| FIELD__mr1, |
| FIELD__mr2, |
| FIELD__mr3, |
| FIELD__bt16, |
| FIELD__bs16, |
| FIELD__br16, |
| FIELD__brall |
| }; |
| |
| |
| /* Functional units. */ |
| |
| static xtensa_funcUnit_internal funcUnits[] = { |
| { "ae_add32", 1 }, |
| { "ae_shift32x4", 1 }, |
| { "ae_shift32x5", 1 }, |
| { "ae_subshift", 1 } |
| }; |
| |
| enum xtensa_funcUnit_id { |
| FUNCUNIT_ae_add32, |
| FUNCUNIT_ae_shift32x4, |
| FUNCUNIT_ae_shift32x5, |
| FUNCUNIT_ae_subshift |
| }; |
| |
| |
| /* Register files. */ |
| |
| enum xtensa_regfile_id { |
| REGFILE_AR, |
| REGFILE_MR, |
| REGFILE_BR, |
| REGFILE_AE_PR, |
| REGFILE_AE_QR, |
| REGFILE_BR2, |
| REGFILE_BR4, |
| REGFILE_BR8, |
| REGFILE_BR16 |
| }; |
| |
| static xtensa_regfile_internal regfiles[] = { |
| { "AR", "a", REGFILE_AR, 32, 32 }, |
| { "MR", "m", REGFILE_MR, 32, 4 }, |
| { "BR", "b", REGFILE_BR, 1, 16 }, |
| { "AE_PR", "aep", REGFILE_AE_PR, 48, 8 }, |
| { "AE_QR", "aeq", REGFILE_AE_QR, 56, 4 }, |
| { "BR2", "b", REGFILE_BR, 2, 8 }, |
| { "BR4", "b", REGFILE_BR, 4, 4 }, |
| { "BR8", "b", REGFILE_BR, 8, 2 }, |
| { "BR16", "b", REGFILE_BR, 16, 1 } |
| }; |
| |
| |
| /* Interfaces. */ |
| |
| static xtensa_interface_internal interfaces[] = { |
| { "ERI_RD_Out", 14, 0, 0, 'o' }, |
| { "ERI_RD_In", 32, 0, 1, 'i' }, |
| { "ERI_RD_Rdy", 1, 0, 0, 'i' }, |
| { "ERI_WR_Out", 46, 0, 2, 'o' }, |
| { "ERI_WR_In", 1, 0, 3, 'i' }, |
| { "IMPWIRE", 32, 0, 4, 'i' } |
| }; |
| |
| enum xtensa_interface_id { |
| INTERFACE_ERI_RD_Out, |
| INTERFACE_ERI_RD_In, |
| INTERFACE_ERI_RD_Rdy, |
| INTERFACE_ERI_WR_Out, |
| INTERFACE_ERI_WR_In, |
| INTERFACE_IMPWIRE |
| }; |
| |
| |
| /* Constant tables. */ |
| |
| /* constant table ai4c */ |
| static const unsigned CONST_TBL_ai4c_0[] = { |
| 0xffffffff, |
| 0x1, |
| 0x2, |
| 0x3, |
| 0x4, |
| 0x5, |
| 0x6, |
| 0x7, |
| 0x8, |
| 0x9, |
| 0xa, |
| 0xb, |
| 0xc, |
| 0xd, |
| 0xe, |
| 0xf, |
| 0 |
| }; |
| |
| /* constant table b4c */ |
| static const unsigned CONST_TBL_b4c_0[] = { |
| 0xffffffff, |
| 0x1, |
| 0x2, |
| 0x3, |
| 0x4, |
| 0x5, |
| 0x6, |
| 0x7, |
| 0x8, |
| 0xa, |
| 0xc, |
| 0x10, |
| 0x20, |
| 0x40, |
| 0x80, |
| 0x100, |
| 0 |
| }; |
| |
| /* constant table b4cu */ |
| static const unsigned CONST_TBL_b4cu_0[] = { |
| 0x8000, |
| 0x10000, |
| 0x2, |
| 0x3, |
| 0x4, |
| 0x5, |
| 0x6, |
| 0x7, |
| 0x8, |
| 0xa, |
| 0xc, |
| 0x10, |
| 0x20, |
| 0x40, |
| 0x80, |
| 0x100, |
| 0 |
| }; |
| |
| |
| /* Instruction operands. */ |
| |
| static int |
| OperandSem_opnd_sem_MR_0_decode (uint32 *valp) |
| { |
| *valp += 2; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_0_encode (uint32 *valp) |
| { |
| int error; |
| error = ((*valp & ~0x3) != 0) || ((*valp & 0x2) == 0); |
| *valp = *valp & 1; |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_soffsetx4_decode (uint32 *valp) |
| { |
| unsigned soffsetx4_out_0; |
| unsigned soffsetx4_in_0; |
| soffsetx4_in_0 = *valp & 0x3ffff; |
| soffsetx4_out_0 = 0x4 + ((((int) soffsetx4_in_0 << 14) >> 14) << 2); |
| *valp = soffsetx4_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_soffsetx4_encode (uint32 *valp) |
| { |
| unsigned soffsetx4_in_0; |
| unsigned soffsetx4_out_0; |
| soffsetx4_out_0 = *valp; |
| soffsetx4_in_0 = ((soffsetx4_out_0 - 0x4) >> 2) & 0x3ffff; |
| *valp = soffsetx4_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm12x8_decode (uint32 *valp) |
| { |
| unsigned uimm12x8_out_0; |
| unsigned uimm12x8_in_0; |
| uimm12x8_in_0 = *valp & 0xfff; |
| uimm12x8_out_0 = uimm12x8_in_0 << 3; |
| *valp = uimm12x8_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm12x8_encode (uint32 *valp) |
| { |
| unsigned uimm12x8_in_0; |
| unsigned uimm12x8_out_0; |
| uimm12x8_out_0 = *valp; |
| uimm12x8_in_0 = ((uimm12x8_out_0 >> 3) & 0xfff); |
| *valp = uimm12x8_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm4_decode (uint32 *valp) |
| { |
| unsigned simm4_out_0; |
| unsigned simm4_in_0; |
| simm4_in_0 = *valp & 0xf; |
| simm4_out_0 = ((int) simm4_in_0 << 28) >> 28; |
| *valp = simm4_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm4_encode (uint32 *valp) |
| { |
| unsigned simm4_in_0; |
| unsigned simm4_out_0; |
| simm4_out_0 = *valp; |
| simm4_in_0 = (simm4_out_0 & 0xf); |
| *valp = simm4_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 32); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_0_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_0_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 32); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_1_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_1_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 32); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_2_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_2_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 32); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_3_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_3_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 32); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_4_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AR_4_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 32); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_immrx4_decode (uint32 *valp) |
| { |
| unsigned immrx4_out_0; |
| unsigned immrx4_in_0; |
| immrx4_in_0 = *valp & 0xf; |
| immrx4_out_0 = (((0xfffffff) << 4) | immrx4_in_0) << 2; |
| *valp = immrx4_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_immrx4_encode (uint32 *valp) |
| { |
| unsigned immrx4_in_0; |
| unsigned immrx4_out_0; |
| immrx4_out_0 = *valp; |
| immrx4_in_0 = ((immrx4_out_0 >> 2) & 0xf); |
| *valp = immrx4_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_lsi4x4_decode (uint32 *valp) |
| { |
| unsigned lsi4x4_out_0; |
| unsigned lsi4x4_in_0; |
| lsi4x4_in_0 = *valp & 0xf; |
| lsi4x4_out_0 = lsi4x4_in_0 << 2; |
| *valp = lsi4x4_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_lsi4x4_encode (uint32 *valp) |
| { |
| unsigned lsi4x4_in_0; |
| unsigned lsi4x4_out_0; |
| lsi4x4_out_0 = *valp; |
| lsi4x4_in_0 = ((lsi4x4_out_0 >> 2) & 0xf); |
| *valp = lsi4x4_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm7_decode (uint32 *valp) |
| { |
| unsigned simm7_out_0; |
| unsigned simm7_in_0; |
| simm7_in_0 = *valp & 0x7f; |
| simm7_out_0 = ((((-((((simm7_in_0 >> 6) & 1)) & (((simm7_in_0 >> 5) & 1)))) & 0x1ffffff)) << 7) | simm7_in_0; |
| *valp = simm7_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm7_encode (uint32 *valp) |
| { |
| unsigned simm7_in_0; |
| unsigned simm7_out_0; |
| simm7_out_0 = *valp; |
| simm7_in_0 = (simm7_out_0 & 0x7f); |
| *valp = simm7_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm6_decode (uint32 *valp) |
| { |
| unsigned uimm6_out_0; |
| unsigned uimm6_in_0; |
| uimm6_in_0 = *valp & 0x3f; |
| uimm6_out_0 = 0x4 + (((0) << 6) | uimm6_in_0); |
| *valp = uimm6_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm6_encode (uint32 *valp) |
| { |
| unsigned uimm6_in_0; |
| unsigned uimm6_out_0; |
| uimm6_out_0 = *valp; |
| uimm6_in_0 = (uimm6_out_0 - 0x4) & 0x3f; |
| *valp = uimm6_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ai4const_decode (uint32 *valp) |
| { |
| unsigned ai4const_out_0; |
| unsigned ai4const_in_0; |
| ai4const_in_0 = *valp & 0xf; |
| ai4const_out_0 = CONST_TBL_ai4c_0[ai4const_in_0 & 0xf]; |
| *valp = ai4const_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ai4const_encode (uint32 *valp) |
| { |
| unsigned ai4const_in_0; |
| unsigned ai4const_out_0; |
| ai4const_out_0 = *valp; |
| switch (ai4const_out_0) |
| { |
| case 0xffffffff: ai4const_in_0 = 0; break; |
| case 0x1: ai4const_in_0 = 0x1; break; |
| case 0x2: ai4const_in_0 = 0x2; break; |
| case 0x3: ai4const_in_0 = 0x3; break; |
| case 0x4: ai4const_in_0 = 0x4; break; |
| case 0x5: ai4const_in_0 = 0x5; break; |
| case 0x6: ai4const_in_0 = 0x6; break; |
| case 0x7: ai4const_in_0 = 0x7; break; |
| case 0x8: ai4const_in_0 = 0x8; break; |
| case 0x9: ai4const_in_0 = 0x9; break; |
| case 0xa: ai4const_in_0 = 0xa; break; |
| case 0xb: ai4const_in_0 = 0xb; break; |
| case 0xc: ai4const_in_0 = 0xc; break; |
| case 0xd: ai4const_in_0 = 0xd; break; |
| case 0xe: ai4const_in_0 = 0xe; break; |
| default: ai4const_in_0 = 0xf; break; |
| } |
| *valp = ai4const_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_b4const_decode (uint32 *valp) |
| { |
| unsigned b4const_out_0; |
| unsigned b4const_in_0; |
| b4const_in_0 = *valp & 0xf; |
| b4const_out_0 = CONST_TBL_b4c_0[b4const_in_0 & 0xf]; |
| *valp = b4const_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_b4const_encode (uint32 *valp) |
| { |
| unsigned b4const_in_0; |
| unsigned b4const_out_0; |
| b4const_out_0 = *valp; |
| switch (b4const_out_0) |
| { |
| case 0xffffffff: b4const_in_0 = 0; break; |
| case 0x1: b4const_in_0 = 0x1; break; |
| case 0x2: b4const_in_0 = 0x2; break; |
| case 0x3: b4const_in_0 = 0x3; break; |
| case 0x4: b4const_in_0 = 0x4; break; |
| case 0x5: b4const_in_0 = 0x5; break; |
| case 0x6: b4const_in_0 = 0x6; break; |
| case 0x7: b4const_in_0 = 0x7; break; |
| case 0x8: b4const_in_0 = 0x8; break; |
| case 0xa: b4const_in_0 = 0x9; break; |
| case 0xc: b4const_in_0 = 0xa; break; |
| case 0x10: b4const_in_0 = 0xb; break; |
| case 0x20: b4const_in_0 = 0xc; break; |
| case 0x40: b4const_in_0 = 0xd; break; |
| case 0x80: b4const_in_0 = 0xe; break; |
| default: b4const_in_0 = 0xf; break; |
| } |
| *valp = b4const_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_b4constu_decode (uint32 *valp) |
| { |
| unsigned b4constu_out_0; |
| unsigned b4constu_in_0; |
| b4constu_in_0 = *valp & 0xf; |
| b4constu_out_0 = CONST_TBL_b4cu_0[b4constu_in_0 & 0xf]; |
| *valp = b4constu_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_b4constu_encode (uint32 *valp) |
| { |
| unsigned b4constu_in_0; |
| unsigned b4constu_out_0; |
| b4constu_out_0 = *valp; |
| switch (b4constu_out_0) |
| { |
| case 0x8000: b4constu_in_0 = 0; break; |
| case 0x10000: b4constu_in_0 = 0x1; break; |
| case 0x2: b4constu_in_0 = 0x2; break; |
| case 0x3: b4constu_in_0 = 0x3; break; |
| case 0x4: b4constu_in_0 = 0x4; break; |
| case 0x5: b4constu_in_0 = 0x5; break; |
| case 0x6: b4constu_in_0 = 0x6; break; |
| case 0x7: b4constu_in_0 = 0x7; break; |
| case 0x8: b4constu_in_0 = 0x8; break; |
| case 0xa: b4constu_in_0 = 0x9; break; |
| case 0xc: b4constu_in_0 = 0xa; break; |
| case 0x10: b4constu_in_0 = 0xb; break; |
| case 0x20: b4constu_in_0 = 0xc; break; |
| case 0x40: b4constu_in_0 = 0xd; break; |
| case 0x80: b4constu_in_0 = 0xe; break; |
| default: b4constu_in_0 = 0xf; break; |
| } |
| *valp = b4constu_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm8_decode (uint32 *valp) |
| { |
| unsigned uimm8_out_0; |
| unsigned uimm8_in_0; |
| uimm8_in_0 = *valp & 0xff; |
| uimm8_out_0 = uimm8_in_0; |
| *valp = uimm8_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm8_encode (uint32 *valp) |
| { |
| unsigned uimm8_in_0; |
| unsigned uimm8_out_0; |
| uimm8_out_0 = *valp; |
| uimm8_in_0 = (uimm8_out_0 & 0xff); |
| *valp = uimm8_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm8x2_decode (uint32 *valp) |
| { |
| unsigned uimm8x2_out_0; |
| unsigned uimm8x2_in_0; |
| uimm8x2_in_0 = *valp & 0xff; |
| uimm8x2_out_0 = uimm8x2_in_0 << 1; |
| *valp = uimm8x2_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm8x2_encode (uint32 *valp) |
| { |
| unsigned uimm8x2_in_0; |
| unsigned uimm8x2_out_0; |
| uimm8x2_out_0 = *valp; |
| uimm8x2_in_0 = ((uimm8x2_out_0 >> 1) & 0xff); |
| *valp = uimm8x2_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm8x4_decode (uint32 *valp) |
| { |
| unsigned uimm8x4_out_0; |
| unsigned uimm8x4_in_0; |
| uimm8x4_in_0 = *valp & 0xff; |
| uimm8x4_out_0 = uimm8x4_in_0 << 2; |
| *valp = uimm8x4_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm8x4_encode (uint32 *valp) |
| { |
| unsigned uimm8x4_in_0; |
| unsigned uimm8x4_out_0; |
| uimm8x4_out_0 = *valp; |
| uimm8x4_in_0 = ((uimm8x4_out_0 >> 2) & 0xff); |
| *valp = uimm8x4_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm4x16_decode (uint32 *valp) |
| { |
| unsigned uimm4x16_out_0; |
| unsigned uimm4x16_in_0; |
| uimm4x16_in_0 = *valp & 0xf; |
| uimm4x16_out_0 = uimm4x16_in_0 << 4; |
| *valp = uimm4x16_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm4x16_encode (uint32 *valp) |
| { |
| unsigned uimm4x16_in_0; |
| unsigned uimm4x16_out_0; |
| uimm4x16_out_0 = *valp; |
| uimm4x16_in_0 = ((uimm4x16_out_0 >> 4) & 0xf); |
| *valp = uimm4x16_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm8_decode (uint32 *valp) |
| { |
| unsigned simm8_out_0; |
| unsigned simm8_in_0; |
| simm8_in_0 = *valp & 0xff; |
| simm8_out_0 = ((int) simm8_in_0 << 24) >> 24; |
| *valp = simm8_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm8_encode (uint32 *valp) |
| { |
| unsigned simm8_in_0; |
| unsigned simm8_out_0; |
| simm8_out_0 = *valp; |
| simm8_in_0 = (simm8_out_0 & 0xff); |
| *valp = simm8_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm8x256_decode (uint32 *valp) |
| { |
| unsigned simm8x256_out_0; |
| unsigned simm8x256_in_0; |
| simm8x256_in_0 = *valp & 0xff; |
| simm8x256_out_0 = (((int) simm8x256_in_0 << 24) >> 24) << 8; |
| *valp = simm8x256_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm8x256_encode (uint32 *valp) |
| { |
| unsigned simm8x256_in_0; |
| unsigned simm8x256_out_0; |
| simm8x256_out_0 = *valp; |
| simm8x256_in_0 = ((simm8x256_out_0 >> 8) & 0xff); |
| *valp = simm8x256_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm12b_decode (uint32 *valp) |
| { |
| unsigned simm12b_out_0; |
| unsigned simm12b_in_0; |
| simm12b_in_0 = *valp & 0xfff; |
| simm12b_out_0 = ((int) simm12b_in_0 << 20) >> 20; |
| *valp = simm12b_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_simm12b_encode (uint32 *valp) |
| { |
| unsigned simm12b_in_0; |
| unsigned simm12b_out_0; |
| simm12b_out_0 = *valp; |
| simm12b_in_0 = (simm12b_out_0 & 0xfff); |
| *valp = simm12b_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_msalp32_decode (uint32 *valp) |
| { |
| unsigned msalp32_out_0; |
| unsigned msalp32_in_0; |
| msalp32_in_0 = *valp & 0x1f; |
| msalp32_out_0 = 0x20 - msalp32_in_0; |
| *valp = msalp32_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_msalp32_encode (uint32 *valp) |
| { |
| unsigned msalp32_in_0; |
| unsigned msalp32_out_0; |
| msalp32_out_0 = *valp; |
| msalp32_in_0 = (0x20 - msalp32_out_0) & 0x1f; |
| *valp = msalp32_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_op2p1_decode (uint32 *valp) |
| { |
| unsigned op2p1_out_0; |
| unsigned op2p1_in_0; |
| op2p1_in_0 = *valp & 0xf; |
| op2p1_out_0 = op2p1_in_0 + 0x1; |
| *valp = op2p1_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_op2p1_encode (uint32 *valp) |
| { |
| unsigned op2p1_in_0; |
| unsigned op2p1_out_0; |
| op2p1_out_0 = *valp; |
| op2p1_in_0 = (op2p1_out_0 - 0x1) & 0xf; |
| *valp = op2p1_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_label8_decode (uint32 *valp) |
| { |
| unsigned label8_out_0; |
| unsigned label8_in_0; |
| label8_in_0 = *valp & 0xff; |
| label8_out_0 = 0x4 + (((int) label8_in_0 << 24) >> 24); |
| *valp = label8_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_label8_encode (uint32 *valp) |
| { |
| unsigned label8_in_0; |
| unsigned label8_out_0; |
| label8_out_0 = *valp; |
| label8_in_0 = (label8_out_0 - 0x4) & 0xff; |
| *valp = label8_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ulabel8_decode (uint32 *valp) |
| { |
| unsigned ulabel8_out_0; |
| unsigned ulabel8_in_0; |
| ulabel8_in_0 = *valp & 0xff; |
| ulabel8_out_0 = 0x4 + (((0) << 8) | ulabel8_in_0); |
| *valp = ulabel8_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ulabel8_encode (uint32 *valp) |
| { |
| unsigned ulabel8_in_0; |
| unsigned ulabel8_out_0; |
| ulabel8_out_0 = *valp; |
| ulabel8_in_0 = (ulabel8_out_0 - 0x4) & 0xff; |
| *valp = ulabel8_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_label12_decode (uint32 *valp) |
| { |
| unsigned label12_out_0; |
| unsigned label12_in_0; |
| label12_in_0 = *valp & 0xfff; |
| label12_out_0 = 0x4 + (((int) label12_in_0 << 20) >> 20); |
| *valp = label12_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_label12_encode (uint32 *valp) |
| { |
| unsigned label12_in_0; |
| unsigned label12_out_0; |
| label12_out_0 = *valp; |
| label12_in_0 = (label12_out_0 - 0x4) & 0xfff; |
| *valp = label12_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_soffset_decode (uint32 *valp) |
| { |
| unsigned soffset_out_0; |
| unsigned soffset_in_0; |
| soffset_in_0 = *valp & 0x3ffff; |
| soffset_out_0 = 0x4 + (((int) soffset_in_0 << 14) >> 14); |
| *valp = soffset_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_soffset_encode (uint32 *valp) |
| { |
| unsigned soffset_in_0; |
| unsigned soffset_out_0; |
| soffset_out_0 = *valp; |
| soffset_in_0 = (soffset_out_0 - 0x4) & 0x3ffff; |
| *valp = soffset_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm16x4_decode (uint32 *valp) |
| { |
| unsigned uimm16x4_out_0; |
| unsigned uimm16x4_in_0; |
| uimm16x4_in_0 = *valp & 0xffff; |
| uimm16x4_out_0 = (((0xffff) << 16) | uimm16x4_in_0) << 2; |
| *valp = uimm16x4_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_uimm16x4_encode (uint32 *valp) |
| { |
| unsigned uimm16x4_in_0; |
| unsigned uimm16x4_out_0; |
| uimm16x4_out_0 = *valp; |
| uimm16x4_in_0 = (uimm16x4_out_0 >> 2) & 0xffff; |
| *valp = uimm16x4_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_bbi_decode (uint32 *valp) |
| { |
| unsigned bbi_out_0; |
| unsigned bbi_in_0; |
| bbi_in_0 = *valp & 0x1f; |
| bbi_out_0 = (0 << 5) | bbi_in_0; |
| *valp = bbi_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_bbi_encode (uint32 *valp) |
| { |
| unsigned bbi_in_0; |
| unsigned bbi_out_0; |
| bbi_out_0 = *valp; |
| bbi_in_0 = (bbi_out_0 & 0x1f); |
| *valp = bbi_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_s_decode (uint32 *valp) |
| { |
| unsigned s_out_0; |
| unsigned s_in_0; |
| s_in_0 = *valp & 0xf; |
| s_out_0 = (0 << 4) | s_in_0; |
| *valp = s_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_s_encode (uint32 *valp) |
| { |
| unsigned s_in_0; |
| unsigned s_out_0; |
| s_out_0 = *valp; |
| s_in_0 = (s_out_0 & 0xf); |
| *valp = s_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 4); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_1_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_1_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 4); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_2_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_2_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 4); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_3_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_3_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 4); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_4_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_4_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 4); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_5_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_MR_5_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 4); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_immt_decode (uint32 *valp) |
| { |
| unsigned immt_out_0; |
| unsigned immt_in_0; |
| immt_in_0 = *valp & 0xf; |
| immt_out_0 = immt_in_0; |
| *valp = immt_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_immt_encode (uint32 *valp) |
| { |
| unsigned immt_in_0; |
| unsigned immt_out_0; |
| immt_out_0 = *valp; |
| immt_in_0 = immt_out_0 & 0xf; |
| *valp = immt_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 16); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR2_decode (uint32 *valp) |
| { |
| *valp = *valp << 1; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR2_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 16) || ((*valp & 1) != 0); |
| *valp = *valp >> 1; |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR4_decode (uint32 *valp) |
| { |
| *valp = *valp << 2; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR4_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 16) || ((*valp & 3) != 0); |
| *valp = *valp >> 2; |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR8_decode (uint32 *valp) |
| { |
| *valp = *valp << 3; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR8_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 16) || ((*valp & 7) != 0); |
| *valp = *valp >> 3; |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR16_decode (uint32 *valp) |
| { |
| *valp = *valp << 4; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_BR16_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 16) || ((*valp & 15) != 0); |
| *valp = *valp >> 4; |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_tp7_decode (uint32 *valp) |
| { |
| unsigned tp7_out_0; |
| unsigned tp7_in_0; |
| tp7_in_0 = *valp & 0xf; |
| tp7_out_0 = tp7_in_0 + 0x7; |
| *valp = tp7_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_tp7_encode (uint32 *valp) |
| { |
| unsigned tp7_in_0; |
| unsigned tp7_out_0; |
| tp7_out_0 = *valp; |
| tp7_in_0 = (tp7_out_0 - 0x7) & 0xf; |
| *valp = tp7_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_xt_wbr15_label_decode (uint32 *valp) |
| { |
| unsigned xt_wbr15_label_out_0; |
| unsigned xt_wbr15_label_in_0; |
| xt_wbr15_label_in_0 = *valp & 0x7fff; |
| xt_wbr15_label_out_0 = 0x4 + (((int) xt_wbr15_label_in_0 << 17) >> 17); |
| *valp = xt_wbr15_label_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_xt_wbr15_label_encode (uint32 *valp) |
| { |
| unsigned xt_wbr15_label_in_0; |
| unsigned xt_wbr15_label_out_0; |
| xt_wbr15_label_out_0 = *valp; |
| xt_wbr15_label_in_0 = (xt_wbr15_label_out_0 - 0x4) & 0x7fff; |
| *valp = xt_wbr15_label_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_samt32_decode (uint32 *valp) |
| { |
| unsigned ae_samt32_out_0; |
| unsigned ae_samt32_in_0; |
| ae_samt32_in_0 = *valp & 0x1f; |
| ae_samt32_out_0 = (0 << 5) | ae_samt32_in_0; |
| *valp = ae_samt32_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_samt32_encode (uint32 *valp) |
| { |
| unsigned ae_samt32_in_0; |
| unsigned ae_samt32_out_0; |
| ae_samt32_out_0 = *valp; |
| ae_samt32_in_0 = (ae_samt32_out_0 & 0x1f); |
| *valp = ae_samt32_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AE_PR_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AE_PR_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 8); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AE_QR_decode (uint32 *valp ATTRIBUTE_UNUSED) |
| { |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_AE_QR_encode (uint32 *valp) |
| { |
| int error; |
| error = (*valp >= 4); |
| return error; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_lsimm16_decode (uint32 *valp) |
| { |
| unsigned ae_lsimm16_out_0; |
| unsigned ae_lsimm16_in_0; |
| ae_lsimm16_in_0 = *valp & 0xf; |
| ae_lsimm16_out_0 = (((int) ae_lsimm16_in_0 << 28) >> 28) << 1; |
| *valp = ae_lsimm16_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_lsimm16_encode (uint32 *valp) |
| { |
| unsigned ae_lsimm16_in_0; |
| unsigned ae_lsimm16_out_0; |
| ae_lsimm16_out_0 = *valp; |
| ae_lsimm16_in_0 = ((ae_lsimm16_out_0 >> 1) & 0xf); |
| *valp = ae_lsimm16_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_lsimm32_decode (uint32 *valp) |
| { |
| unsigned ae_lsimm32_out_0; |
| unsigned ae_lsimm32_in_0; |
| ae_lsimm32_in_0 = *valp & 0xf; |
| ae_lsimm32_out_0 = (((int) ae_lsimm32_in_0 << 28) >> 28) << 2; |
| *valp = ae_lsimm32_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_lsimm32_encode (uint32 *valp) |
| { |
| unsigned ae_lsimm32_in_0; |
| unsigned ae_lsimm32_out_0; |
| ae_lsimm32_out_0 = *valp; |
| ae_lsimm32_in_0 = ((ae_lsimm32_out_0 >> 2) & 0xf); |
| *valp = ae_lsimm32_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_lsimm64_decode (uint32 *valp) |
| { |
| unsigned ae_lsimm64_out_0; |
| unsigned ae_lsimm64_in_0; |
| ae_lsimm64_in_0 = *valp & 0xf; |
| ae_lsimm64_out_0 = (((int) ae_lsimm64_in_0 << 28) >> 28) << 3; |
| *valp = ae_lsimm64_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_lsimm64_encode (uint32 *valp) |
| { |
| unsigned ae_lsimm64_in_0; |
| unsigned ae_lsimm64_out_0; |
| ae_lsimm64_out_0 = *valp; |
| ae_lsimm64_in_0 = ((ae_lsimm64_out_0 >> 3) & 0xf); |
| *valp = ae_lsimm64_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_samt64_decode (uint32 *valp) |
| { |
| unsigned ae_samt64_out_0; |
| unsigned ae_samt64_in_0; |
| ae_samt64_in_0 = *valp & 0x3f; |
| ae_samt64_out_0 = (0 << 6) | ae_samt64_in_0; |
| *valp = ae_samt64_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_samt64_encode (uint32 *valp) |
| { |
| unsigned ae_samt64_in_0; |
| unsigned ae_samt64_out_0; |
| ae_samt64_out_0 = *valp; |
| ae_samt64_in_0 = (ae_samt64_out_0 & 0x3f); |
| *valp = ae_samt64_in_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_ohba_decode (uint32 *valp) |
| { |
| unsigned ae_ohba_out_0; |
| unsigned ae_ohba_in_0; |
| ae_ohba_in_0 = *valp & 0xf; |
| ae_ohba_out_0 = (0 << 5) | (((((ae_ohba_in_0 & 0xf))) == 0) << 4) | ((ae_ohba_in_0 & 0xf)); |
| *valp = ae_ohba_out_0; |
| return 0; |
| } |
| |
| static int |
| OperandSem_opnd_sem_ae_ohba_encode (uint32 *valp) |
| { |
| unsigned ae_ohba_in_0; |
| unsigned ae_ohba_out_0; |
| ae_ohba_out_0 = *valp; |
| ae_ohba_in_0 = (ae_ohba_out_0 & 0xf); |
| *valp = ae_ohba_in_0; |
| return 0; |
| } |
| |
| static int |
| Operand_soffsetx4_ator (uint32 *valp, uint32 pc) |
| { |
| *valp -= (pc & ~0x3); |
| return 0; |
| } |
| |
| static int |
| Operand_soffsetx4_rtoa (uint32 *valp, uint32 pc) |
| { |
| *valp += (pc & ~0x3); |
| return 0; |
| } |
| |
| static int |
| Operand_uimm6_ator (uint32 *valp, uint32 pc) |
| { |
| *valp -= pc; |
| return 0; |
| } |
| |
| static int |
| Operand_uimm6_rtoa (uint32 *valp, uint32 pc) |
| { |
| *valp += pc; |
| return 0; |
| } |
| |
| static int |
| Operand_label8_ator (uint32 *valp, uint32 pc) |
| { |
| *valp -= pc; |
| return 0; |
| } |
| |
| static int |
| Operand_label8_rtoa (uint32 *valp, uint32 pc) |
| { |
| *valp += pc; |
| return 0; |
| } |
| |
| static int |
| Operand_ulabel8_ator (uint32 *valp, uint32 pc) |
| { |
| *valp -= pc; |
| return 0; |
| } |
| |
| static int |
| Operand_ulabel8_rtoa (uint32 *valp, uint32 pc) |
| { |
| *valp += pc; |
| return 0; |
| } |
| |
| static int |
| Operand_label12_ator (uint32 *valp, uint32 pc) |
| { |
| *valp -= pc; |
| return 0; |
| } |
| |
| static int |
| Operand_label12_rtoa (uint32 *valp, uint32 pc) |
| { |
| *valp += pc; |
| return 0; |
| } |
| |
| static int |
| Operand_soffset_ator (uint32 *valp, uint32 pc) |
| { |
| *valp -= pc; |
| return 0; |
| } |
| |
| static int |
| Operand_soffset_rtoa (uint32 *valp, uint32 pc) |
| { |
| *valp += pc; |
| return 0; |
| } |
| |
| static int |
| Operand_uimm16x4_ator (uint32 *valp, uint32 pc) |
| { |
| *valp -= ((pc + 3) & ~0x3); |
| return 0; |
| } |
| |
| static int |
| Operand_uimm16x4_rtoa (uint32 *valp, uint32 pc) |
| { |
| *valp += ((pc + 3) & ~0x3); |
| return 0; |
| } |
| |
| static int |
| Operand_xt_wbr15_label_ator (uint32 *valp, uint32 pc) |
| { |
| *valp -= pc; |
| return 0; |
| } |
| |
| static int |
| Operand_xt_wbr15_label_rtoa (uint32 *valp, uint32 pc) |
| { |
| *valp += pc; |
| return 0; |
| } |
| |
| static int |
| Operand_xt_wbr18_label_ator (uint32 *valp, uint32 pc) |
| { |
| *valp -= pc; |
| return 0; |
| } |
| |
| static int |
| Operand_xt_wbr18_label_rtoa (uint32 *valp, uint32 pc) |
| { |
| *valp += pc; |
| return 0; |
| } |
| |
| static xtensa_operand_internal operands[] = { |
| { "soffsetx4", FIELD_offset, -1, 0, |
| XTENSA_OPERAND_IS_PCRELATIVE, |
| OperandSem_opnd_sem_soffsetx4_encode, OperandSem_opnd_sem_soffsetx4_decode, |
| Operand_soffsetx4_ator, Operand_soffsetx4_rtoa }, |
| { "uimm12x8", FIELD_imm12, -1, 0, |
| 0, |
| OperandSem_opnd_sem_uimm12x8_encode, OperandSem_opnd_sem_uimm12x8_decode, |
| 0, 0 }, |
| { "simm4", FIELD_mn, -1, 0, |
| 0, |
| OperandSem_opnd_sem_simm4_encode, OperandSem_opnd_sem_simm4_decode, |
| 0, 0 }, |
| { "arr", FIELD_r, REGFILE_AR, 1, |
| XTENSA_OPERAND_IS_REGISTER, |
| OperandSem_opnd_sem_AR_encode, OperandSem_opnd_sem_AR_decode, |
| 0, 0 }, |
| { "ars", FIELD_s, REGFILE_AR, 1, |
| XTENSA_OPERAND_IS_REGISTER, |
| OperandSem_opnd_sem_AR_encode, OperandSem_opnd_sem_AR_decode, |
| 0, 0 }, |
| { "*ars_invisible", FIELD_s, REGFILE_AR, 1, |
| XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE, |
| OperandSem_opnd_sem_AR_encode, OperandSem_opnd_sem_AR_decode, |
| 0, 0 }, |
|