tree 6ba55df72af8ae646a7cd0278e1cb499bce0c6d4
parent 30d93588bb166538f884918ca246027525d04590
author John Grossman <johngro@google.com> 1488314338 -0800
committer Petr Hosek <phosek@google.com> 1588266883 -0700

[intel-hda] Fix some W1C bits in the stream control/status register.

The IRQ pending bits in the stream status register (BCIS, FIFOE, DESE)
have write-one-clear behavior regardless of if they are accesses with
a single byte write to the Status register, or a 32-bit word write to
the Control/Status register.  Update the register definition so that
the word access works properly as well.

See sections 3.3.36 and 4.5.6 of the Intel High Definition Audio
Specification Rev 1.0a dated June 17, 2010

Change-Id: I6bc4515029edc09cad2ff75143c7f7e593c5ca2d