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| |
| ; SKD014: Intel(R) PT TIP.PGD May Not Have Target IP Payload. |
| ; |
| ; When Intel PT (Intel Processor Trace) is enabled and a direct |
| ; unconditional branch clears IA32_RTIT_STATUS.FilterEn (MSR 571H, |
| ; bit 0), due to this erratum, the resulting TIP.PGD (Target IP |
| ; Packet, Packet Generation Disable) may not have an IP payload |
| ; with the target IP. |
| ; |
| ; Variant: TIP.PGD binds to second jmp |
| ; |
| ; opt:ptxed --filter:addr0_cfg 1 --filter:addr0_a 0x1000 --filter:addr0_b 0x10ff |
| ; |
| ; cpu 6/78 |
| ; cpu 6/85 |
| ; cpu 6/94 |
| ; cpu 6/102 |
| ; cpu 6/125 |
| ; cpu 6/126 |
| ; cpu 6/165 |
| ; cpu 6/166 |
| ; cpu 6/106 |
| ; cpu 6/108 |
| ; cpu 6/143 |
| ; cpu 6/140 |
| ; cpu 6/141 |
| ; |
| |
| org 0x1000 |
| bits 64 |
| |
| ; @pt p0: psb() |
| ; @pt p1: mode.exec(64bit) |
| ; @pt p2: fup(3: %l0) |
| ; @pt p3: psbend() |
| l0: jmp l2 |
| l1: hlt |
| |
| l2: jmp l4 |
| l3: hlt |
| |
| ; @pt p4: tip.pgd(0: %l4) |
| ALIGN 0x100 |
| l4: hlt |
| |
| |
| ; @pt .exp(ptdump) |
| ;%0p0 psb |
| ;%0p1 mode.exec cs.l |
| ;%0p2 fup 3: %?l0 |
| ;%0p3 psbend |
| ;%0p4 tip.pgd 0: %?l4.0 |
| |
| |
| ; @pt .exp(ptxed) |
| ;%0l0 # jmp l2 |
| ;%0l2 # jmp l4 |
| ;[disabled] |
