Make Polly 3.6 compile with isl 0.14

git-svn-id: https://llvm.org/svn/llvm-project/polly/branches/release_36@228339 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/IslExprBuilder.cpp b/lib/CodeGen/IslExprBuilder.cpp
index 4dd7ba3..a2651d1 100644
--- a/lib/CodeGen/IslExprBuilder.cpp
+++ b/lib/CodeGen/IslExprBuilder.cpp
@@ -191,7 +191,6 @@
   case isl_ast_op_pdiv_r:
   case isl_ast_op_div:
   case isl_ast_op_fdiv_q:
-  case isl_ast_op_zdiv_r:
     // Do nothing
     break;
   case isl_ast_op_add:
@@ -240,7 +239,6 @@
     break;
   }
   case isl_ast_op_pdiv_r: // Dividend is non-negative
-  case isl_ast_op_zdiv_r: // Result only compared against zero
     Res = Builder.CreateSRem(LHS, RHS);
     break;
   }
@@ -406,7 +404,6 @@
   case isl_ast_op_fdiv_q: // Round towards -infty
   case isl_ast_op_pdiv_q: // Dividend is non-negative
   case isl_ast_op_pdiv_r: // Dividend is non-negative
-  case isl_ast_op_zdiv_r: // Result only compared against zero
     return createOpBin(Expr);
   case isl_ast_op_minus:
     return createOpUnary(Expr);
diff --git a/test/Isl/Ast/reduction_modulo_schedule_multiple_dimensions_4.ll b/test/Isl/Ast/reduction_modulo_schedule_multiple_dimensions_4.ll
index 8e4d52a..1ecc549 100644
--- a/test/Isl/Ast/reduction_modulo_schedule_multiple_dimensions_4.ll
+++ b/test/Isl/Ast/reduction_modulo_schedule_multiple_dimensions_4.ll
@@ -7,7 +7,7 @@
 ; CHECK:    for (int c1 = 0; c1 < 2 * n; c1 += 1)
 ; CHECK:      #pragma simd reduction
 ; CHECK:      for (int c3 = -1023; c3 <= 1023; c3 += 1) {
-; CHECK:        if (c3 <= 0 && c3 % 2 == 0) {
+; CHECK:        if (c3 <= 0 && -c3 % 2 == 0)
 ; CHECK:          Stmt_for_body3(c1, -c3);
 ; CHECK:        } else if (c3 >= 1 && (c3 - 1) % 2 == 0)
 ; CHECK:          Stmt_for_body3(c1, c3);
diff --git a/utils/checkout_isl.sh b/utils/checkout_isl.sh
index 129e9e0..ac7dc6f 100755
--- a/utils/checkout_isl.sh
+++ b/utils/checkout_isl.sh
@@ -1,6 +1,6 @@
 #!/bin/sh
 
-ISL_HASH="b3e0fa7a05d32f1e0e36e0a42b0b83fa2ba1f609"
+ISL_HASH="0698f8436c523ecc742b13a9b3aa337cc2421fa2"
 
 PWD=`pwd`