blob: 18bd412f10c186ee28fe31d772079ac93883ca2e [file] [log] [blame]
/*
* Copyright 2018 Collabora Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "zink_clear.h"
#include "zink_context.h"
#include "zink_descriptors.h"
#include "zink_fence.h"
#include "zink_format.h"
#include "zink_framebuffer.h"
#include "zink_helpers.h"
#include "zink_inlines.h"
#include "zink_kopper.h"
#include "zink_program.h"
#include "zink_query.h"
#include "zink_render_pass.h"
#include "zink_resource.h"
#include "zink_screen.h"
#include "zink_state.h"
#include "zink_surface.h"
#include "util/u_blitter.h"
#include "util/u_debug.h"
#include "util/format_srgb.h"
#include "util/format/u_format.h"
#include "util/u_helpers.h"
#include "util/u_inlines.h"
#include "util/u_thread.h"
#include "util/u_cpu_detect.h"
#include "util/strndup.h"
#include "nir.h"
#include "driver_trace/tr_context.h"
#include "util/u_memory.h"
#include "util/u_upload_mgr.h"
#define XXH_INLINE_ALL
#include "util/xxhash.h"
static void
update_tc_info(struct zink_context *ctx, bool wait)
{
if (ctx->tc) {
const struct tc_renderpass_info *info = threaded_context_get_renderpass_info(ctx->tc, wait);
if (info) {
ctx->rp_changed |= ctx->dynamic_fb.tc_info.data != info->data;
ctx->dynamic_fb.tc_info.data = info->data;
}
}
}
void
debug_describe_zink_buffer_view(char *buf, const struct zink_buffer_view *ptr)
{
sprintf(buf, "zink_buffer_view");
}
ALWAYS_INLINE static void
check_resource_for_batch_ref(struct zink_context *ctx, struct zink_resource *res)
{
if (!zink_resource_has_binds(res)) {
/* avoid desync between usage and tracking:
* - if usage exists, it must be removed before the context is destroyed
* - having usage does not imply having tracking
* - if tracking will be added here, also reapply usage to avoid dangling usage once tracking is removed
* TODO: somehow fix this for perf because it's an extra hash lookup
*/
if (!res->obj->dt && (res->obj->bo->reads || res->obj->bo->writes))
zink_batch_reference_resource_rw(&ctx->batch, res, !!res->obj->bo->writes);
else
zink_batch_reference_resource(&ctx->batch, res);
}
}
static void
zink_context_destroy(struct pipe_context *pctx)
{
struct zink_context *ctx = zink_context(pctx);
struct zink_screen *screen = zink_screen(pctx->screen);
struct pipe_framebuffer_state fb = {0};
pctx->set_framebuffer_state(pctx, &fb);
if (util_queue_is_initialized(&screen->flush_queue))
util_queue_finish(&screen->flush_queue);
if (ctx->batch.state && !screen->device_lost) {
VkResult result = VKSCR(QueueWaitIdle)(screen->queue);
if (result != VK_SUCCESS)
mesa_loge("ZINK: vkQueueWaitIdle failed (%s)", vk_Result_to_str(result));
}
for (unsigned i = 0; i < ARRAY_SIZE(ctx->program_cache); i++) {
simple_mtx_lock((&ctx->program_lock[i]));
hash_table_foreach(&ctx->program_cache[i], entry) {
struct zink_program *pg = entry->data;
pg->removed = true;
}
simple_mtx_unlock((&ctx->program_lock[i]));
}
if (ctx->blitter)
util_blitter_destroy(ctx->blitter);
for (unsigned i = 0; i < ctx->fb_state.nr_cbufs; i++)
pipe_surface_release(&ctx->base, &ctx->fb_state.cbufs[i]);
pipe_surface_release(&ctx->base, &ctx->fb_state.zsbuf);
pipe_resource_reference(&ctx->dummy_vertex_buffer, NULL);
pipe_resource_reference(&ctx->dummy_xfb_buffer, NULL);
for (unsigned i = 0; i < ARRAY_SIZE(ctx->dummy_surface); i++)
pipe_surface_release(&ctx->base, &ctx->dummy_surface[i]);
zink_buffer_view_reference(screen, &ctx->dummy_bufferview, NULL);
zink_descriptors_deinit_bindless(ctx);
if (ctx->batch.state) {
zink_clear_batch_state(ctx, ctx->batch.state);
zink_batch_state_destroy(screen, ctx->batch.state);
}
struct zink_batch_state *bs = ctx->batch_states;
while (bs) {
struct zink_batch_state *bs_next = bs->next;
zink_clear_batch_state(ctx, bs);
zink_batch_state_destroy(screen, bs);
bs = bs_next;
}
bs = ctx->free_batch_states;
while (bs) {
struct zink_batch_state *bs_next = bs->next;
zink_clear_batch_state(ctx, bs);
zink_batch_state_destroy(screen, bs);
bs = bs_next;
}
for (unsigned i = 0; i < 2; i++) {
util_idalloc_fini(&ctx->di.bindless[i].tex_slots);
util_idalloc_fini(&ctx->di.bindless[i].img_slots);
free(ctx->di.bindless[i].buffer_infos);
free(ctx->di.bindless[i].img_infos);
util_dynarray_fini(&ctx->di.bindless[i].updates);
util_dynarray_fini(&ctx->di.bindless[i].resident);
}
hash_table_foreach(&ctx->framebuffer_cache, he)
zink_destroy_framebuffer(screen, he->data);
hash_table_foreach(ctx->render_pass_cache, he)
zink_destroy_render_pass(screen, he->data);
zink_context_destroy_query_pools(ctx);
u_upload_destroy(pctx->stream_uploader);
u_upload_destroy(pctx->const_uploader);
slab_destroy_child(&ctx->transfer_pool);
for (unsigned i = 0; i < ARRAY_SIZE(ctx->program_cache); i++)
_mesa_hash_table_clear(&ctx->program_cache[i], NULL);
for (unsigned i = 0; i < ARRAY_SIZE(ctx->program_lock); i++)
simple_mtx_destroy(&ctx->program_lock[i]);
_mesa_hash_table_destroy(ctx->render_pass_cache, NULL);
slab_destroy_child(&ctx->transfer_pool_unsync);
zink_descriptors_deinit(ctx);
if (!(ctx->flags & ZINK_CONTEXT_COPY_ONLY))
p_atomic_dec(&screen->base.num_contexts);
ralloc_free(ctx);
}
static void
check_device_lost(struct zink_context *ctx)
{
if (!zink_screen(ctx->base.screen)->device_lost || ctx->is_device_lost)
return;
debug_printf("ZINK: device lost detected!\n");
if (ctx->reset.reset)
ctx->reset.reset(ctx->reset.data, PIPE_GUILTY_CONTEXT_RESET);
ctx->is_device_lost = true;
}
static enum pipe_reset_status
zink_get_device_reset_status(struct pipe_context *pctx)
{
struct zink_context *ctx = zink_context(pctx);
enum pipe_reset_status status = PIPE_NO_RESET;
if (ctx->is_device_lost) {
// Since we don't know what really happened to the hardware, just
// assume that we are in the wrong
status = PIPE_GUILTY_CONTEXT_RESET;
debug_printf("ZINK: device lost detected!\n");
if (ctx->reset.reset)
ctx->reset.reset(ctx->reset.data, status);
}
return status;
}
static void
zink_set_device_reset_callback(struct pipe_context *pctx,
const struct pipe_device_reset_callback *cb)
{
struct zink_context *ctx = zink_context(pctx);
bool had_reset = !!ctx->reset.reset;
if (cb)
ctx->reset = *cb;
else
memset(&ctx->reset, 0, sizeof(ctx->reset));
bool have_reset = !!ctx->reset.reset;
if (had_reset != have_reset) {
if (have_reset)
p_atomic_inc(&zink_screen(pctx->screen)->robust_ctx_count);
else
p_atomic_dec(&zink_screen(pctx->screen)->robust_ctx_count);
}
}
static void
zink_set_context_param(struct pipe_context *pctx, enum pipe_context_param param,
unsigned value)
{
struct zink_context *ctx = zink_context(pctx);
switch (param) {
case PIPE_CONTEXT_PARAM_PIN_THREADS_TO_L3_CACHE:
util_set_thread_affinity(zink_screen(ctx->base.screen)->flush_queue.threads[0],
util_get_cpu_caps()->L3_affinity_mask[value],
NULL, util_get_cpu_caps()->num_cpu_mask_bits);
break;
default:
break;
}
}
static VkSamplerMipmapMode
sampler_mipmap_mode(enum pipe_tex_mipfilter filter)
{
switch (filter) {
case PIPE_TEX_MIPFILTER_NEAREST: return VK_SAMPLER_MIPMAP_MODE_NEAREST;
case PIPE_TEX_MIPFILTER_LINEAR: return VK_SAMPLER_MIPMAP_MODE_LINEAR;
case PIPE_TEX_MIPFILTER_NONE:
unreachable("PIPE_TEX_MIPFILTER_NONE should be dealt with earlier");
}
unreachable("unexpected filter");
}
static VkSamplerAddressMode
sampler_address_mode(enum pipe_tex_wrap filter)
{
switch (filter) {
case PIPE_TEX_WRAP_REPEAT: return VK_SAMPLER_ADDRESS_MODE_REPEAT;
case PIPE_TEX_WRAP_CLAMP_TO_EDGE: return VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE;
case PIPE_TEX_WRAP_CLAMP_TO_BORDER: return VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER;
case PIPE_TEX_WRAP_MIRROR_REPEAT: return VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT;
case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE;
case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE; /* not technically correct, but kinda works */
default: break;
}
unreachable("unexpected wrap");
}
static VkCompareOp
compare_op(enum pipe_compare_func op)
{
switch (op) {
case PIPE_FUNC_NEVER: return VK_COMPARE_OP_NEVER;
case PIPE_FUNC_LESS: return VK_COMPARE_OP_LESS;
case PIPE_FUNC_EQUAL: return VK_COMPARE_OP_EQUAL;
case PIPE_FUNC_LEQUAL: return VK_COMPARE_OP_LESS_OR_EQUAL;
case PIPE_FUNC_GREATER: return VK_COMPARE_OP_GREATER;
case PIPE_FUNC_NOTEQUAL: return VK_COMPARE_OP_NOT_EQUAL;
case PIPE_FUNC_GEQUAL: return VK_COMPARE_OP_GREATER_OR_EQUAL;
case PIPE_FUNC_ALWAYS: return VK_COMPARE_OP_ALWAYS;
}
unreachable("unexpected compare");
}
static inline bool
wrap_needs_border_color(unsigned wrap)
{
return wrap == PIPE_TEX_WRAP_CLAMP || wrap == PIPE_TEX_WRAP_CLAMP_TO_BORDER ||
wrap == PIPE_TEX_WRAP_MIRROR_CLAMP || wrap == PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER;
}
static VkBorderColor
get_border_color(const union pipe_color_union *color, bool is_integer, bool need_custom)
{
if (is_integer) {
if (color->ui[0] == 0 && color->ui[1] == 0 && color->ui[2] == 0 && color->ui[3] == 0)
return VK_BORDER_COLOR_INT_TRANSPARENT_BLACK;
if (color->ui[0] == 0 && color->ui[1] == 0 && color->ui[2] == 0 && color->ui[3] == 1)
return VK_BORDER_COLOR_INT_OPAQUE_BLACK;
if (color->ui[0] == 1 && color->ui[1] == 1 && color->ui[2] == 1 && color->ui[3] == 1)
return VK_BORDER_COLOR_INT_OPAQUE_WHITE;
return need_custom ? VK_BORDER_COLOR_INT_CUSTOM_EXT : VK_BORDER_COLOR_INT_TRANSPARENT_BLACK;
}
if (color->f[0] == 0 && color->f[1] == 0 && color->f[2] == 0 && color->f[3] == 0)
return VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK;
if (color->f[0] == 0 && color->f[1] == 0 && color->f[2] == 0 && color->f[3] == 1)
return VK_BORDER_COLOR_FLOAT_OPAQUE_BLACK;
if (color->f[0] == 1 && color->f[1] == 1 && color->f[2] == 1 && color->f[3] == 1)
return VK_BORDER_COLOR_FLOAT_OPAQUE_WHITE;
return need_custom ? VK_BORDER_COLOR_FLOAT_CUSTOM_EXT : VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK;
}
static void *
zink_create_sampler_state(struct pipe_context *pctx,
const struct pipe_sampler_state *state)
{
struct zink_screen *screen = zink_screen(pctx->screen);
bool need_custom = false;
bool need_clamped_border_color = false;
VkSamplerCreateInfo sci = {0};
VkSamplerCustomBorderColorCreateInfoEXT cbci = {0};
VkSamplerCustomBorderColorCreateInfoEXT cbci_clamped = {0};
sci.sType = VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO;
if (screen->info.have_EXT_non_seamless_cube_map && !state->seamless_cube_map)
sci.flags |= VK_SAMPLER_CREATE_NON_SEAMLESS_CUBE_MAP_BIT_EXT;
assert(!state->unnormalized_coords);
sci.magFilter = zink_filter(state->mag_img_filter);
if (sci.unnormalizedCoordinates)
sci.minFilter = sci.magFilter;
else
sci.minFilter = zink_filter(state->min_img_filter);
VkSamplerReductionModeCreateInfo rci;
rci.sType = VK_STRUCTURE_TYPE_SAMPLER_REDUCTION_MODE_CREATE_INFO;
rci.pNext = NULL;
switch (state->reduction_mode) {
case PIPE_TEX_REDUCTION_MIN:
rci.reductionMode = VK_SAMPLER_REDUCTION_MODE_MIN;
break;
case PIPE_TEX_REDUCTION_MAX:
rci.reductionMode = VK_SAMPLER_REDUCTION_MODE_MAX;
break;
default:
rci.reductionMode = VK_SAMPLER_REDUCTION_MODE_WEIGHTED_AVERAGE;
break;
}
if (state->reduction_mode)
sci.pNext = &rci;
if (sci.unnormalizedCoordinates) {
sci.mipmapMode = VK_SAMPLER_MIPMAP_MODE_NEAREST;
} else if (state->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
sci.mipmapMode = sampler_mipmap_mode(state->min_mip_filter);
sci.minLod = state->min_lod;
sci.maxLod = MAX2(state->max_lod, state->min_lod);
} else {
sci.mipmapMode = VK_SAMPLER_MIPMAP_MODE_NEAREST;
sci.minLod = 0;
sci.maxLod = 0.25f;
}
if (!sci.unnormalizedCoordinates) {
sci.addressModeU = sampler_address_mode(state->wrap_s);
sci.addressModeV = sampler_address_mode(state->wrap_t);
sci.addressModeW = sampler_address_mode(state->wrap_r);
} else {
sci.addressModeU = sci.addressModeV = sci.addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE;
}
sci.mipLodBias = CLAMP(state->lod_bias,
-screen->info.props.limits.maxSamplerLodBias,
screen->info.props.limits.maxSamplerLodBias);
need_custom |= wrap_needs_border_color(state->wrap_s);
need_custom |= wrap_needs_border_color(state->wrap_t);
need_custom |= wrap_needs_border_color(state->wrap_r);
if (state->compare_mode == PIPE_TEX_COMPARE_NONE)
sci.compareOp = VK_COMPARE_OP_NEVER;
else {
sci.compareOp = compare_op(state->compare_func);
sci.compareEnable = VK_TRUE;
}
bool is_integer = state->border_color_is_integer;
sci.borderColor = get_border_color(&state->border_color, is_integer, need_custom);
if (sci.borderColor > VK_BORDER_COLOR_INT_OPAQUE_WHITE && need_custom) {
if (!screen->info.border_color_feats.customBorderColorWithoutFormat &&
screen->info.driver_props.driverID != VK_DRIVER_ID_MESA_TURNIP) {
static bool warned = false;
warn_missing_feature(warned, "customBorderColorWithoutFormat");
}
if (screen->info.have_EXT_custom_border_color &&
(screen->info.border_color_feats.customBorderColorWithoutFormat || state->border_color_format)) {
if (!screen->info.have_EXT_border_color_swizzle) {
static bool warned = false;
warn_missing_feature(warned, "VK_EXT_border_color_swizzle");
}
if (!is_integer && !screen->have_D24_UNORM_S8_UINT) {
union pipe_color_union clamped_border_color;
for (unsigned i = 0; i < 4; ++i) {
/* Use channel 0 on purpose, so that we can use OPAQUE_WHITE
* when the border color is 1.0. */
clamped_border_color.f[i] = CLAMP(state->border_color.f[0], 0, 1);
}
if (memcmp(&state->border_color, &clamped_border_color, sizeof(clamped_border_color)) != 0) {
need_clamped_border_color = true;
cbci_clamped.sType = VK_STRUCTURE_TYPE_SAMPLER_CUSTOM_BORDER_COLOR_CREATE_INFO_EXT;
cbci_clamped.format = VK_FORMAT_UNDEFINED;
/* these are identical unions */
memcpy(&cbci_clamped.customBorderColor, &clamped_border_color, sizeof(union pipe_color_union));
}
}
cbci.sType = VK_STRUCTURE_TYPE_SAMPLER_CUSTOM_BORDER_COLOR_CREATE_INFO_EXT;
if (screen->info.border_color_feats.customBorderColorWithoutFormat) {
cbci.format = VK_FORMAT_UNDEFINED;
/* these are identical unions */
memcpy(&cbci.customBorderColor, &state->border_color, sizeof(union pipe_color_union));
} else {
if (util_format_is_depth_or_stencil(state->border_color_format)) {
if (is_integer) {
cbci.format = VK_FORMAT_S8_UINT;
for (unsigned i = 0; i < 4; i++)
cbci.customBorderColor.uint32[i] = CLAMP(state->border_color.ui[i], 0, 255);
} else {
cbci.format = zink_get_format(screen, util_format_get_depth_only(state->border_color_format));
/* these are identical unions */
memcpy(&cbci.customBorderColor, &state->border_color, sizeof(union pipe_color_union));
}
} else {
cbci.format = zink_get_format(screen, state->border_color_format);
for (unsigned i = 0; i < 4; i++) {
zink_format_clamp_channel_color(util_format_description(state->border_color_format), (void*)&cbci.customBorderColor, &state->border_color, i);
zink_format_clamp_channel_srgb(util_format_description(state->border_color_format), (void*)&cbci.customBorderColor, (void*)&cbci.customBorderColor, i);
}
}
}
cbci.pNext = sci.pNext;
sci.pNext = &cbci;
UNUSED uint32_t check = p_atomic_inc_return(&screen->cur_custom_border_color_samplers);
assert(check <= screen->info.border_color_props.maxCustomBorderColorSamplers);
} else
sci.borderColor = VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK; // TODO with custom shader if we're super interested?
if (sci.unnormalizedCoordinates)
sci.addressModeU = sci.addressModeV = sci.addressModeW = VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER;
}
if (state->max_anisotropy > 1) {
sci.maxAnisotropy = state->max_anisotropy;
sci.anisotropyEnable = VK_TRUE;
}
struct zink_sampler_state *sampler = CALLOC_STRUCT(zink_sampler_state);
if (!sampler)
return NULL;
VkResult result = VKSCR(CreateSampler)(screen->dev, &sci, NULL, &sampler->sampler);
if (result != VK_SUCCESS) {
mesa_loge("ZINK: vkCreateSampler failed (%s)", vk_Result_to_str(result));
FREE(sampler);
return NULL;
}
if (need_clamped_border_color) {
sci.pNext = &cbci_clamped;
result = VKSCR(CreateSampler)(screen->dev, &sci, NULL, &sampler->sampler_clamped);
if (result != VK_SUCCESS) {
mesa_loge("ZINK: vkCreateSampler failed (%s)", vk_Result_to_str(result));
VKSCR(DestroySampler)(screen->dev, sampler->sampler, NULL);
FREE(sampler);
return NULL;
}
}
sampler->custom_border_color = need_custom;
if (!screen->info.have_EXT_non_seamless_cube_map)
sampler->emulate_nonseamless = !state->seamless_cube_map;
return sampler;
}
ALWAYS_INLINE static VkImageLayout
get_layout_for_binding(const struct zink_context *ctx, struct zink_resource *res, enum zink_descriptor_type type, bool is_compute)
{
if (res->obj->is_buffer)
return 0;
switch (type) {
case ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW:
return zink_descriptor_util_image_layout_eval(ctx, res, is_compute);
case ZINK_DESCRIPTOR_TYPE_IMAGE:
return VK_IMAGE_LAYOUT_GENERAL;
default:
break;
}
return 0;
}
ALWAYS_INLINE static struct zink_surface *
get_imageview_for_binding(struct zink_context *ctx, gl_shader_stage stage, enum zink_descriptor_type type, unsigned idx)
{
switch (type) {
case ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW: {
struct zink_sampler_view *sampler_view = zink_sampler_view(ctx->sampler_views[stage][idx]);
if (!sampler_view || !sampler_view->base.texture)
return NULL;
/* if this is a non-seamless cube sampler, return the cube array view */
return (ctx->di.emulate_nonseamless[stage] & ctx->di.cubes[stage] & BITFIELD_BIT(idx)) ?
sampler_view->cube_array :
sampler_view->image_view;
}
case ZINK_DESCRIPTOR_TYPE_IMAGE: {
struct zink_image_view *image_view = &ctx->image_views[stage][idx];
return image_view->base.resource ? image_view->surface : NULL;
}
default:
break;
}
unreachable("ACK");
return VK_NULL_HANDLE;
}
ALWAYS_INLINE static struct zink_buffer_view *
get_bufferview_for_binding(struct zink_context *ctx, gl_shader_stage stage, enum zink_descriptor_type type, unsigned idx)
{
switch (type) {
case ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW: {
struct zink_sampler_view *sampler_view = zink_sampler_view(ctx->sampler_views[stage][idx]);
return sampler_view->base.texture ? sampler_view->buffer_view : NULL;
}
case ZINK_DESCRIPTOR_TYPE_IMAGE: {
struct zink_image_view *image_view = &ctx->image_views[stage][idx];
return image_view->base.resource ? image_view->buffer_view : NULL;
}
default:
break;
}
unreachable("ACK");
return VK_NULL_HANDLE;
}
ALWAYS_INLINE static struct zink_resource *
update_descriptor_state_ubo(struct zink_context *ctx, gl_shader_stage shader, unsigned slot, struct zink_resource *res)
{
struct zink_screen *screen = zink_screen(ctx->base.screen);
bool have_null_descriptors = screen->info.rb2_feats.nullDescriptor;
const enum zink_descriptor_type type = ZINK_DESCRIPTOR_TYPE_UBO;
ctx->di.descriptor_res[type][shader][slot] = res;
ctx->di.ubos[shader][slot].offset = ctx->ubos[shader][slot].buffer_offset;
if (res) {
ctx->di.ubos[shader][slot].buffer = res->obj->buffer;
ctx->di.ubos[shader][slot].range = ctx->ubos[shader][slot].buffer_size;
assert(ctx->di.ubos[shader][slot].range <= screen->info.props.limits.maxUniformBufferRange);
} else {
VkBuffer null_buffer = zink_resource(ctx->dummy_vertex_buffer)->obj->buffer;
ctx->di.ubos[shader][slot].buffer = have_null_descriptors ? VK_NULL_HANDLE : null_buffer;
ctx->di.ubos[shader][slot].range = VK_WHOLE_SIZE;
}
if (!slot) {
if (res)
ctx->di.push_valid |= BITFIELD64_BIT(shader);
else
ctx->di.push_valid &= ~BITFIELD64_BIT(shader);
}
return res;
}
ALWAYS_INLINE static struct zink_resource *
update_descriptor_state_ssbo(struct zink_context *ctx, gl_shader_stage shader, unsigned slot, struct zink_resource *res)
{
struct zink_screen *screen = zink_screen(ctx->base.screen);
bool have_null_descriptors = screen->info.rb2_feats.nullDescriptor;
const enum zink_descriptor_type type = ZINK_DESCRIPTOR_TYPE_SSBO;
ctx->di.descriptor_res[type][shader][slot] = res;
ctx->di.ssbos[shader][slot].offset = ctx->ssbos[shader][slot].buffer_offset;
if (res) {
ctx->di.ssbos[shader][slot].buffer = res->obj->buffer;
ctx->di.ssbos[shader][slot].range = ctx->ssbos[shader][slot].buffer_size;
} else {
VkBuffer null_buffer = zink_resource(ctx->dummy_vertex_buffer)->obj->buffer;
ctx->di.ssbos[shader][slot].buffer = have_null_descriptors ? VK_NULL_HANDLE : null_buffer;
ctx->di.ssbos[shader][slot].range = VK_WHOLE_SIZE;
}
return res;
}
ALWAYS_INLINE static struct zink_resource *
update_descriptor_state_sampler(struct zink_context *ctx, gl_shader_stage shader, unsigned slot, struct zink_resource *res)
{
struct zink_screen *screen = zink_screen(ctx->base.screen);
bool have_null_descriptors = screen->info.rb2_feats.nullDescriptor;
const enum zink_descriptor_type type = ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW;
ctx->di.descriptor_res[type][shader][slot] = res;
if (res) {
if (res->obj->is_buffer) {
struct zink_buffer_view *bv = get_bufferview_for_binding(ctx, shader, type, slot);
ctx->di.tbos[shader][slot] = bv->buffer_view;
} else {
struct zink_surface *surface = get_imageview_for_binding(ctx, shader, type, slot);
ctx->di.textures[shader][slot].imageLayout = get_layout_for_binding(ctx, res, type, shader == MESA_SHADER_COMPUTE);
ctx->di.textures[shader][slot].imageView = surface->image_view;
if (!screen->have_D24_UNORM_S8_UINT &&
ctx->sampler_states[shader][slot] && ctx->sampler_states[shader][slot]->sampler_clamped) {
struct zink_sampler_state *state = ctx->sampler_states[shader][slot];
VkSampler sampler = (surface->base.format == PIPE_FORMAT_Z24X8_UNORM && surface->ivci.format == VK_FORMAT_D32_SFLOAT) ||
(surface->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT && surface->ivci.format == VK_FORMAT_D32_SFLOAT_S8_UINT) ?
state->sampler_clamped :
state->sampler;
if (ctx->di.textures[shader][slot].sampler != sampler) {
zink_context_invalidate_descriptor_state(ctx, shader, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, slot, 1);
ctx->di.textures[shader][slot].sampler = sampler;
}
}
}
} else {
if (likely(have_null_descriptors)) {
ctx->di.textures[shader][slot].imageView = VK_NULL_HANDLE;
ctx->di.textures[shader][slot].imageLayout = VK_IMAGE_LAYOUT_UNDEFINED;
ctx->di.tbos[shader][slot] = VK_NULL_HANDLE;
} else {
struct zink_surface *null_surface = zink_get_dummy_surface(ctx, 0);
struct zink_buffer_view *null_bufferview = ctx->dummy_bufferview;
ctx->di.textures[shader][slot].imageView = null_surface->image_view;
ctx->di.textures[shader][slot].imageLayout = VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL;
ctx->di.tbos[shader][slot] = null_bufferview->buffer_view;
}
}
return res;
}
ALWAYS_INLINE static struct zink_resource *
update_descriptor_state_image(struct zink_context *ctx, gl_shader_stage shader, unsigned slot, struct zink_resource *res)
{
struct zink_screen *screen = zink_screen(ctx->base.screen);
bool have_null_descriptors = screen->info.rb2_feats.nullDescriptor;
const enum zink_descriptor_type type = ZINK_DESCRIPTOR_TYPE_IMAGE;
ctx->di.descriptor_res[type][shader][slot] = res;
if (res) {
if (res->obj->is_buffer) {
struct zink_buffer_view *bv = get_bufferview_for_binding(ctx, shader, type, slot);
ctx->di.texel_images[shader][slot] = bv->buffer_view;
} else {
struct zink_surface *surface = get_imageview_for_binding(ctx, shader, type, slot);
ctx->di.images[shader][slot].imageLayout = VK_IMAGE_LAYOUT_GENERAL;
ctx->di.images[shader][slot].imageView = surface->image_view;
}
} else {
if (likely(have_null_descriptors)) {
memset(&ctx->di.images[shader][slot], 0, sizeof(ctx->di.images[shader][slot]));
ctx->di.texel_images[shader][slot] = VK_NULL_HANDLE;
} else {
struct zink_surface *null_surface = zink_get_dummy_surface(ctx, 0);
struct zink_buffer_view *null_bufferview = ctx->dummy_bufferview;
ctx->di.images[shader][slot].imageView = null_surface->image_view;
ctx->di.images[shader][slot].imageLayout = VK_IMAGE_LAYOUT_GENERAL;
ctx->di.texel_images[shader][slot] = null_bufferview->buffer_view;
}
}
return res;
}
static void
update_nonseamless_shader_key(struct zink_context *ctx, gl_shader_stage pstage)
{
const uint32_t new_mask = ctx->di.emulate_nonseamless[pstage] & ctx->di.cubes[pstage];
if (pstage == MESA_SHADER_COMPUTE) {
if (ctx->compute_pipeline_state.key.base.nonseamless_cube_mask != new_mask)
ctx->compute_dirty = true;
ctx->compute_pipeline_state.key.base.nonseamless_cube_mask = new_mask;
} else {
if (zink_get_shader_key_base(ctx, pstage)->nonseamless_cube_mask != new_mask)
zink_set_shader_key_base(ctx, pstage)->nonseamless_cube_mask = new_mask;
}
}
static void
zink_bind_sampler_states(struct pipe_context *pctx,
gl_shader_stage shader,
unsigned start_slot,
unsigned num_samplers,
void **samplers)
{
struct zink_context *ctx = zink_context(pctx);
struct zink_screen *screen = zink_screen(pctx->screen);
for (unsigned i = 0; i < num_samplers; ++i) {
struct zink_sampler_state *state = samplers[i];
if (ctx->sampler_states[shader][start_slot + i] != state)
zink_context_invalidate_descriptor_state(ctx, shader, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, start_slot, 1);
ctx->sampler_states[shader][start_slot + i] = state;
if (state) {
ctx->di.textures[shader][start_slot + i].sampler = state->sampler;
if (state->sampler_clamped && !screen->have_D24_UNORM_S8_UINT) {
struct zink_surface *surface = get_imageview_for_binding(ctx, shader, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, start_slot + i);
if (surface &&
((surface->base.format == PIPE_FORMAT_Z24X8_UNORM && surface->ivci.format == VK_FORMAT_D32_SFLOAT) ||
(surface->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT && surface->ivci.format == VK_FORMAT_D32_SFLOAT_S8_UINT)))
ctx->di.textures[shader][start_slot + i].sampler = state->sampler_clamped;
}
} else {
ctx->di.textures[shader][start_slot + i].sampler = VK_NULL_HANDLE;
}
}
ctx->di.num_samplers[shader] = start_slot + num_samplers;
}
static void
zink_bind_sampler_states_nonseamless(struct pipe_context *pctx,
gl_shader_stage shader,
unsigned start_slot,
unsigned num_samplers,
void **samplers)
{
struct zink_context *ctx = zink_context(pctx);
uint32_t old_mask = ctx->di.emulate_nonseamless[shader];
uint32_t mask = BITFIELD_RANGE(start_slot, num_samplers);
ctx->di.emulate_nonseamless[shader] &= ~mask;
for (unsigned i = 0; i < num_samplers; ++i) {
struct zink_sampler_state *state = samplers[i];
const uint32_t bit = BITFIELD_BIT(start_slot + i);
if (!state)
continue;
if (state->emulate_nonseamless)
ctx->di.emulate_nonseamless[shader] |= bit;
if (state->emulate_nonseamless != (old_mask & bit) && (ctx->di.cubes[shader] & bit)) {
struct zink_surface *surface = get_imageview_for_binding(ctx, shader, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, start_slot + i);
if (surface && ctx->di.images[shader][start_slot + i].imageView != surface->image_view) {
ctx->di.images[shader][start_slot + i].imageView = surface->image_view;
update_descriptor_state_sampler(ctx, shader, start_slot + i, zink_resource(surface->base.texture));
zink_context_invalidate_descriptor_state(ctx, shader, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, start_slot + i, 1);
}
}
}
zink_bind_sampler_states(pctx, shader, start_slot, num_samplers, samplers);
update_nonseamless_shader_key(ctx, shader);
}
static void
zink_delete_sampler_state(struct pipe_context *pctx,
void *sampler_state)
{
struct zink_sampler_state *sampler = sampler_state;
struct zink_batch *batch = &zink_context(pctx)->batch;
/* may be called if context_create fails */
if (batch->state) {
util_dynarray_append(&batch->state->zombie_samplers, VkSampler,
sampler->sampler);
if (sampler->sampler_clamped)
util_dynarray_append(&batch->state->zombie_samplers, VkSampler,
sampler->sampler_clamped);
}
if (sampler->custom_border_color)
p_atomic_dec(&zink_screen(pctx->screen)->cur_custom_border_color_samplers);
FREE(sampler);
}
static VkImageAspectFlags
sampler_aspect_from_format(enum pipe_format fmt)
{
if (util_format_is_depth_or_stencil(fmt)) {
const struct util_format_description *desc = util_format_description(fmt);
if (util_format_has_depth(desc))
return VK_IMAGE_ASPECT_DEPTH_BIT;
assert(util_format_has_stencil(desc));
return VK_IMAGE_ASPECT_STENCIL_BIT;
} else
return VK_IMAGE_ASPECT_COLOR_BIT;
}
static uint32_t
hash_bufferview(void *bvci)
{
size_t offset = offsetof(VkBufferViewCreateInfo, flags);
return _mesa_hash_data((char*)bvci + offset, sizeof(VkBufferViewCreateInfo) - offset);
}
static VkBufferViewCreateInfo
create_bvci(struct zink_context *ctx, struct zink_resource *res, enum pipe_format format, uint32_t offset, uint32_t range)
{
struct zink_screen *screen = zink_screen(ctx->base.screen);
VkBufferViewCreateInfo bvci;
// Zero whole struct (including alignment holes), so hash_bufferview
// does not access potentially uninitialized data.
memset(&bvci, 0, sizeof(bvci));
bvci.sType = VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO;
bvci.pNext = NULL;
if (screen->format_props[format].bufferFeatures & VK_FORMAT_FEATURE_STORAGE_TEXEL_BUFFER_BIT)
bvci.buffer = res->obj->storage_buffer ? res->obj->storage_buffer : res->obj->buffer;
else
bvci.buffer = res->obj->buffer;
bvci.format = zink_get_format(screen, format);
assert(bvci.format);
bvci.offset = offset;
bvci.range = !offset && range == res->base.b.width0 ? VK_WHOLE_SIZE : range;
unsigned blocksize = util_format_get_blocksize(format);
if (bvci.range != VK_WHOLE_SIZE) {
/* clamp out partial texels */
bvci.range -= bvci.range % blocksize;
if (bvci.offset + bvci.range >= res->base.b.width0)
bvci.range = VK_WHOLE_SIZE;
}
uint64_t clamp = blocksize * screen->info.props.limits.maxTexelBufferElements;
if (bvci.range == VK_WHOLE_SIZE && res->base.b.width0 > clamp)
bvci.range = clamp;
bvci.flags = 0;
return bvci;
}
static struct zink_buffer_view *
get_buffer_view(struct zink_context *ctx, struct zink_resource *res, VkBufferViewCreateInfo *bvci)
{
struct zink_screen *screen = zink_screen(ctx->base.screen);
struct zink_buffer_view *buffer_view = NULL;
uint32_t hash = hash_bufferview(bvci);
simple_mtx_lock(&res->bufferview_mtx);
struct hash_entry *he = _mesa_hash_table_search_pre_hashed(&res->bufferview_cache, hash, bvci);
if (he) {
buffer_view = he->data;
p_atomic_inc(&buffer_view->reference.count);
} else {
VkBufferView view;
VkResult result = VKSCR(CreateBufferView)(screen->dev, bvci, NULL, &view);
if (result != VK_SUCCESS) {
mesa_loge("ZINK: vkCreateBufferView failed (%s)", vk_Result_to_str(result));
goto out;
}
buffer_view = CALLOC_STRUCT(zink_buffer_view);
if (!buffer_view) {
VKSCR(DestroyBufferView)(screen->dev, view, NULL);
goto out;
}
pipe_reference_init(&buffer_view->reference, 1);
pipe_resource_reference(&buffer_view->pres, &res->base.b);
buffer_view->bvci = *bvci;
buffer_view->buffer_view = view;
buffer_view->hash = hash;
_mesa_hash_table_insert_pre_hashed(&res->bufferview_cache, hash, &buffer_view->bvci, buffer_view);
}
out:
simple_mtx_unlock(&res->bufferview_mtx);
return buffer_view;
}
enum pipe_swizzle
zink_clamp_void_swizzle(const struct util_format_description *desc, enum pipe_swizzle swizzle)
{
switch (swizzle) {
case PIPE_SWIZZLE_X:
case PIPE_SWIZZLE_Y:
case PIPE_SWIZZLE_Z:
case PIPE_SWIZZLE_W:
return desc->channel[swizzle].type == UTIL_FORMAT_TYPE_VOID ? PIPE_SWIZZLE_1 : swizzle;
default:
break;
}
return swizzle;
}
ALWAYS_INLINE static enum pipe_swizzle
clamp_zs_swizzle(enum pipe_swizzle swizzle)
{
switch (swizzle) {
case PIPE_SWIZZLE_X:
case PIPE_SWIZZLE_Y:
case PIPE_SWIZZLE_Z:
case PIPE_SWIZZLE_W:
return PIPE_SWIZZLE_X;
default:
break;
}
return swizzle;
}
ALWAYS_INLINE static enum pipe_swizzle
clamp_alpha_swizzle(enum pipe_swizzle swizzle)
{
if (swizzle == PIPE_SWIZZLE_W)
return PIPE_SWIZZLE_X;
if (swizzle < PIPE_SWIZZLE_W)
return PIPE_SWIZZLE_0;
return swizzle;
}
ALWAYS_INLINE static enum pipe_swizzle
clamp_luminance_swizzle(enum pipe_swizzle swizzle)
{
if (swizzle == PIPE_SWIZZLE_W)
return PIPE_SWIZZLE_1;
if (swizzle < PIPE_SWIZZLE_W)
return PIPE_SWIZZLE_X;
return swizzle;
}
ALWAYS_INLINE static enum pipe_swizzle
clamp_luminance_alpha_swizzle(enum pipe_swizzle swizzle)
{
if (swizzle == PIPE_SWIZZLE_W)
return PIPE_SWIZZLE_Y;
if (swizzle < PIPE_SWIZZLE_W)
return PIPE_SWIZZLE_X;
return swizzle;
}
ALWAYS_INLINE static bool
viewtype_is_cube(const VkImageViewCreateInfo *ivci)
{
return ivci->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
ivci->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY;
}
static struct pipe_sampler_view *
zink_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *pres,
const struct pipe_sampler_view *state)
{
struct zink_screen *screen = zink_screen(pctx->screen);
struct zink_resource *res = zink_resource(pres);
struct zink_context *ctx = zink_context(pctx);
struct zink_sampler_view *sampler_view = CALLOC_STRUCT_CL(zink_sampler_view);
bool err;
sampler_view->base = *state;
sampler_view->base.texture = NULL;
pipe_resource_reference(&sampler_view->base.texture, pres);
sampler_view->base.reference.count = 1;
sampler_view->base.context = pctx;
if (state->target != PIPE_BUFFER) {
VkImageViewCreateInfo ivci;
struct pipe_surface templ = {0};
templ.u.tex.level = state->u.tex.first_level;
templ.format = state->format;
/* avoid needing mutable for depth/stencil sampling */
if (util_format_is_depth_and_stencil(pres->format))
templ.format = pres->format;
if (state->target != PIPE_TEXTURE_3D) {
templ.u.tex.first_layer = state->u.tex.first_layer;
templ.u.tex.last_layer = state->u.tex.last_layer;
}
if (zink_is_swapchain(res)) {
if (!zink_kopper_acquire(ctx, res, UINT64_MAX)) {
FREE_CL(sampler_view);
return NULL;
}
}
ivci = create_ivci(screen, res, &templ, state->target);
ivci.subresourceRange.levelCount = state->u.tex.last_level - state->u.tex.first_level + 1;
ivci.subresourceRange.aspectMask = sampler_aspect_from_format(state->format);
/* samplers for stencil aspects of packed formats need to always use stencil swizzle */
if (ivci.subresourceRange.aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) {
if (sampler_view->base.swizzle_r == PIPE_SWIZZLE_0 &&
sampler_view->base.swizzle_g == PIPE_SWIZZLE_0 &&
sampler_view->base.swizzle_b == PIPE_SWIZZLE_0 &&
sampler_view->base.swizzle_a == PIPE_SWIZZLE_X) {
/*
* When the state tracker asks for 000x swizzles, this is depth mode GL_ALPHA,
* however with the single dref fetch this will fail, so just spam all the channels.
*/
ivci.components.r = VK_COMPONENT_SWIZZLE_R;
ivci.components.g = VK_COMPONENT_SWIZZLE_R;
ivci.components.b = VK_COMPONENT_SWIZZLE_R;
ivci.components.a = VK_COMPONENT_SWIZZLE_R;
} else {
ivci.components.r = zink_component_mapping(clamp_zs_swizzle(sampler_view->base.swizzle_r));
ivci.components.g = zink_component_mapping(clamp_zs_swizzle(sampler_view->base.swizzle_g));
ivci.components.b = zink_component_mapping(clamp_zs_swizzle(sampler_view->base.swizzle_b));
ivci.components.a = zink_component_mapping(clamp_zs_swizzle(sampler_view->base.swizzle_a));
}
} else {
enum pipe_swizzle swizzle[4] = {
sampler_view->base.swizzle_r,
sampler_view->base.swizzle_g,
sampler_view->base.swizzle_b,
sampler_view->base.swizzle_a
};
/* if we have e.g., R8G8B8X8, then we have to ignore alpha since we're just emulating
* these formats
*/
if (zink_format_is_voidable_rgba_variant(state->format)) {
const struct util_format_description *view_desc = util_format_description(state->format);
for (int i = 0; i < 4; ++i)
swizzle[i] = zink_clamp_void_swizzle(view_desc, swizzle[i]);
} else if (util_format_is_alpha(state->format)) {
for (int i = 0; i < 4; ++i)
swizzle[i] = clamp_alpha_swizzle(swizzle[i]);
} else if (util_format_is_luminance(pres->format) ||
util_format_is_luminance_alpha(pres->format)) {
if (util_format_is_luminance(pres->format)) {
for (int i = 0; i < 4; ++i)
swizzle[i] = clamp_luminance_swizzle(swizzle[i]);
} else {
for (int i = 0; i < 4; ++i)
swizzle[i] = clamp_luminance_alpha_swizzle(swizzle[i]);
}
if (state->format != pres->format) {
/* luminance / luminance-alpha formats can be reinterpreted
* as red / red-alpha formats by the state-tracker, and we
* need to whack the green/blue channels here to the
* correct values for that to work.
*/
enum pipe_format linear = util_format_linear(pres->format);
if (state->format == util_format_luminance_to_red(linear)) {
assert(swizzle[1] == PIPE_SWIZZLE_X ||
swizzle[1] == PIPE_SWIZZLE_0);
assert(swizzle[2] == PIPE_SWIZZLE_X ||
swizzle[2] == PIPE_SWIZZLE_0);
swizzle[1] = swizzle[2] = PIPE_SWIZZLE_0;
} else
assert(state->format == linear);
}
}
ivci.components.r = zink_component_mapping(swizzle[0]);
ivci.components.g = zink_component_mapping(swizzle[1]);
ivci.components.b = zink_component_mapping(swizzle[2]);
ivci.components.a = zink_component_mapping(swizzle[3]);
}
assert(ivci.format);
sampler_view->image_view = (struct zink_surface*)zink_get_surface(ctx, pres, &templ, &ivci);
if (!screen->info.have_EXT_non_seamless_cube_map && viewtype_is_cube(&sampler_view->image_view->ivci)) {
ivci.viewType = VK_IMAGE_VIEW_TYPE_2D_ARRAY;
sampler_view->cube_array = (struct zink_surface*)zink_get_surface(ctx, pres, &templ, &ivci);
}
err = !sampler_view->image_view;
} else {
VkBufferViewCreateInfo bvci = create_bvci(ctx, res, state->format, state->u.buf.offset, state->u.buf.size);
sampler_view->buffer_view = get_buffer_view(ctx, res, &bvci);
err = !sampler_view->buffer_view;
}
if (err) {
FREE_CL(sampler_view);
return NULL;
}
return &sampler_view->base;
}
void
zink_destroy_buffer_view(struct zink_screen *screen, struct zink_buffer_view *buffer_view)
{
struct zink_resource *res = zink_resource(buffer_view->pres);
simple_mtx_lock(&res->bufferview_mtx);
if (buffer_view->reference.count) {
/* got a cache hit during deletion */
simple_mtx_unlock(&res->bufferview_mtx);
return;
}
struct hash_entry *he = _mesa_hash_table_search_pre_hashed(&res->bufferview_cache, buffer_view->hash, &buffer_view->bvci);
assert(he);
_mesa_hash_table_remove(&res->bufferview_cache, he);
simple_mtx_unlock(&res->bufferview_mtx);
simple_mtx_lock(&res->obj->view_lock);
util_dynarray_append(&res->obj->views, VkBufferView, buffer_view->buffer_view);
simple_mtx_unlock(&res->obj->view_lock);
pipe_resource_reference(&buffer_view->pres, NULL);
FREE(buffer_view);
}
static void
zink_sampler_view_destroy(struct pipe_context *pctx,
struct pipe_sampler_view *pview)
{
struct zink_sampler_view *view = zink_sampler_view(pview);
if (pview->texture->target == PIPE_BUFFER)
zink_buffer_view_reference(zink_screen(pctx->screen), &view->buffer_view, NULL);
else {
zink_surface_reference(zink_screen(pctx->screen), &view->image_view, NULL);
zink_surface_reference(zink_screen(pctx->screen), &view->cube_array, NULL);
}
pipe_resource_reference(&pview->texture, NULL);
FREE_CL(view);
}
static void
zink_get_sample_position(struct pipe_context *ctx,
unsigned sample_count,
unsigned sample_index,
float *out_value)
{
/* TODO: handle this I guess */
assert(zink_screen(ctx->screen)->info.props.limits.standardSampleLocations);
/* from 26.4. Multisampling */
switch (sample_count) {
case 0:
case 1: {
float pos[][2] = { {0.5,0.5}, };
out_value[0] = pos[sample_index][0];
out_value[1] = pos[sample_index][1];
break;
}
case 2: {
float pos[][2] = { {0.75,0.75},
{0.25,0.25}, };
out_value[0] = pos[sample_index][0];
out_value[1] = pos[sample_index][1];
break;
}
case 4: {
float pos[][2] = { {0.375, 0.125},
{0.875, 0.375},
{0.125, 0.625},
{0.625, 0.875}, };
out_value[0] = pos[sample_index][0];
out_value[1] = pos[sample_index][1];
break;
}
case 8: {
float pos[][2] = { {0.5625, 0.3125},
{0.4375, 0.6875},
{0.8125, 0.5625},
{0.3125, 0.1875},
{0.1875, 0.8125},
{0.0625, 0.4375},
{0.6875, 0.9375},
{0.9375, 0.0625}, };
out_value[0] = pos[sample_index][0];
out_value[1] = pos[sample_index][1];
break;
}
case 16: {
float pos[][2] = { {0.5625, 0.5625},
{0.4375, 0.3125},
{0.3125, 0.625},
{0.75, 0.4375},
{0.1875, 0.375},
{0.625, 0.8125},
{0.8125, 0.6875},
{0.6875, 0.1875},
{0.375, 0.875},
{0.5, 0.0625},
{0.25, 0.125},
{0.125, 0.75},
{0.0, 0.5},
{0.9375, 0.25},
{0.875, 0.9375},
{0.0625, 0.0}, };
out_value[0] = pos[sample_index][0];
out_value[1] = pos[sample_index][1];
break;
}
default:
unreachable("unhandled sample count!");
}
}
static void
zink_set_polygon_stipple(struct pipe_context *pctx,
const struct pipe_poly_stipple *ps)
{
}
ALWAYS_INLINE static void
update_res_bind_count(struct zink_context *ctx, struct zink_resource *res, bool is_compute, bool decrement)
{
if (decrement) {
assert(res->bind_count[is_compute]);
if (!--res->bind_count[is_compute])
_mesa_set_remove_key(ctx->need_barriers[is_compute], res);
check_resource_for_batch_ref(ctx, res);
} else
res->bind_count[is_compute]++;
}
ALWAYS_INLINE static void
update_existing_vbo(struct zink_context *ctx, unsigned slot)
{
if (!ctx->vertex_buffers[slot].buffer.resource)
return;
struct zink_resource *res = zink_resource(ctx->vertex_buffers[slot].buffer.resource);
res->vbo_bind_count--;
res->vbo_bind_mask &= ~BITFIELD_BIT(slot);
if (!res->vbo_bind_count) {
res->gfx_barrier &= ~VK_PIPELINE_STAGE_VERTEX_INPUT_BIT;
res->barrier_access[0] &= ~VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT;
}
update_res_bind_count(ctx, res, false, true);
}
static void
zink_set_vertex_buffers(struct pipe_context *pctx,
unsigned start_slot,
unsigned num_buffers,
unsigned unbind_num_trailing_slots,
bool take_ownership,
const struct pipe_vertex_buffer *buffers)
{
struct zink_context *ctx = zink_context(pctx);
const bool have_input_state = zink_screen(pctx->screen)->info.have_EXT_vertex_input_dynamic_state;
const bool need_state_change = !zink_screen(pctx->screen)->info.have_EXT_extended_dynamic_state &&
!have_input_state;
uint32_t enabled_buffers = ctx->gfx_pipeline_state.vertex_buffers_enabled_mask;
enabled_buffers |= u_bit_consecutive(start_slot, num_buffers);
enabled_buffers &= ~u_bit_consecutive(start_slot + num_buffers, unbind_num_trailing_slots);
bool stride_changed = false;
if (buffers) {
for (unsigned i = 0; i < num_buffers; ++i) {
const struct pipe_vertex_buffer *vb = buffers + i;
struct pipe_vertex_buffer *ctx_vb = &ctx->vertex_buffers[start_slot + i];
stride_changed |= ctx_vb->stride != vb->stride;
update_existing_vbo(ctx, start_slot + i);
if (!take_ownership)
pipe_resource_reference(&ctx_vb->buffer.resource, vb->buffer.resource);
else {
pipe_resource_reference(&ctx_vb->buffer.resource, NULL);
ctx_vb->buffer.resource = vb->buffer.resource;
}
if (vb->buffer.resource) {
struct zink_resource *res = zink_resource(vb->buffer.resource);
res->vbo_bind_mask |= BITFIELD_BIT(start_slot + i);
res->vbo_bind_count++;
res->gfx_barrier |= VK_PIPELINE_STAGE_VERTEX_INPUT_BIT;
res->barrier_access[0] |= VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT;
update_res_bind_count(ctx, res, false, false);
ctx_vb->stride = vb->stride;
ctx_vb->buffer_offset = vb->buffer_offset;
zink_batch_resource_usage_set(&ctx->batch, res, false, true);
/* always barrier before possible rebind */
zink_screen(ctx->base.screen)->buffer_barrier(ctx, res, VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
VK_PIPELINE_STAGE_VERTEX_INPUT_BIT);
res->obj->unordered_read = false;
} else {
enabled_buffers &= ~BITFIELD_BIT(start_slot + i);
}
}
} else {
for (unsigned i = 0; i < num_buffers; ++i) {
update_existing_vbo(ctx, start_slot + i);
pipe_resource_reference(&ctx->vertex_buffers[start_slot + i].buffer.resource, NULL);
}
}
for (unsigned i = 0; i < unbind_num_trailing_slots; i++) {
update_existing_vbo(ctx, start_slot + i);
pipe_resource_reference(&ctx->vertex_buffers[start_slot + i].buffer.resource, NULL);
}
if (need_state_change)
ctx->vertex_state_changed = true;
else if (!have_input_state && (stride_changed || ctx->gfx_pipeline_state.vertex_buffers_enabled_mask != enabled_buffers))
ctx->vertex_state_changed = true;
ctx->gfx_pipeline_state.vertex_buffers_enabled_mask = enabled_buffers;
ctx->vertex_buffers_dirty = num_buffers > 0;
#ifndef NDEBUG
u_foreach_bit(b, enabled_buffers)
assert(ctx->vertex_buffers[b].buffer.resource);
#endif
}
static void
zink_set_viewport_states(struct pipe_context *pctx,
unsigned start_slot,
unsigned num_viewports,
const struct pipe_viewport_state *state)
{
struct zink_context *ctx = zink_context(pctx);
for (unsigned i = 0; i < num_viewports; ++i)
ctx->vp_state.viewport_states[start_slot + i] = state[i];
ctx->vp_state_changed = true;
}
static void
zink_set_scissor_states(struct pipe_context *pctx,
unsigned start_slot, unsigned num_scissors,
const struct pipe_scissor_state *states)
{
struct zink_context *ctx = zink_context(pctx);
for (unsigned i = 0; i < num_scissors; i++)
ctx->vp_state.scissor_states[start_slot + i] = states[i];
ctx->scissor_changed = true;
}
static void
zink_set_inlinable_constants(struct pipe_context *pctx,
gl_shader_stage shader,
uint num_values, uint32_t *values)
{
struct zink_context *ctx = (struct zink_context *)pctx;
const uint32_t bit = BITFIELD_BIT(shader);
uint32_t *inlinable_uniforms;
struct zink_shader_key *key = NULL;
if (shader == MESA_SHADER_COMPUTE) {
key = &ctx->compute_pipeline_state.key;
} else {
assert(!zink_screen(pctx->screen)->optimal_keys);
key = &ctx->gfx_pipeline_state.shader_keys.key[shader];
}
inlinable_uniforms = key->base.inlined_uniform_values;
if (!(ctx->inlinable_uniforms_valid_mask & bit) ||
memcmp(inlinable_uniforms, values, num_values * 4)) {
memcpy(inlinable_uniforms, values, num_values * 4);
if (shader == MESA_SHADER_COMPUTE)
ctx->compute_dirty = true;
else
ctx->dirty_gfx_stages |= bit;
ctx->inlinable_uniforms_valid_mask |= bit;
key->inline_uniforms = true;
}
}
ALWAYS_INLINE static void
unbind_descriptor_stage(struct zink_resource *res, gl_shader_stage pstage)
{
if (!res->sampler_binds[pstage] && !res->image_binds[pstage])
res->gfx_barrier &= ~zink_pipeline_flags_from_pipe_stage(pstage);
}
ALWAYS_INLINE static void
unbind_buffer_descriptor_stage(struct zink_resource *res, gl_shader_stage pstage)
{
if (!res->ubo_bind_mask[pstage] && !res->ssbo_bind_mask[pstage])
unbind_descriptor_stage(res, pstage);
}
ALWAYS_INLINE static void
unbind_ubo(struct zink_context *ctx, struct zink_resource *res, gl_shader_stage pstage, unsigned slot)
{
if (!res)
return;
res->ubo_bind_mask[pstage] &= ~BITFIELD_BIT(slot);
res->ubo_bind_count[pstage == MESA_SHADER_COMPUTE]--;
unbind_buffer_descriptor_stage(res, pstage);
if (!res->ubo_bind_count[pstage == MESA_SHADER_COMPUTE])
res->barrier_access[pstage == MESA_SHADER_COMPUTE] &= ~VK_ACCESS_UNIFORM_READ_BIT;
update_res_bind_count(ctx, res, pstage == MESA_SHADER_COMPUTE, true);
}
static void
invalidate_inlined_uniforms(struct zink_context *ctx, gl_shader_stage pstage)
{
unsigned bit = BITFIELD_BIT(pstage);
if (!(ctx->inlinable_uniforms_valid_mask & bit))
return;
ctx->inlinable_uniforms_valid_mask &= ~bit;
if (pstage == MESA_SHADER_COMPUTE) {
ctx->compute_dirty = true;
return;
}
assert(!zink_screen(ctx->base.screen)->optimal_keys);
ctx->dirty_gfx_stages |= bit;
struct zink_shader_key *key = &ctx->gfx_pipeline_state.shader_keys.key[pstage];
key->inline_uniforms = false;
}
static void
zink_set_constant_buffer(struct pipe_context *pctx,
gl_shader_stage shader, uint index,
bool take_ownership,
const struct pipe_constant_buffer *cb)
{
struct zink_context *ctx = zink_context(pctx);
bool update = false;
struct zink_resource *res = zink_resource(ctx->ubos[shader][index].buffer);
if (cb) {
struct pipe_resource *buffer = cb->buffer;
unsigned offset = cb->buffer_offset;
struct zink_screen *screen = zink_screen(pctx->screen);
if (cb->user_buffer) {
u_upload_data(ctx->base.const_uploader, 0, cb->buffer_size,
screen->info.props.limits.minUniformBufferOffsetAlignment,
cb->user_buffer, &offset, &buffer);
}
struct zink_resource *new_res = zink_resource(buffer);
if (new_res) {
if (new_res != res) {
unbind_ubo(ctx, res, shader, index);
new_res->ubo_bind_count[shader == MESA_SHADER_COMPUTE]++;
new_res->ubo_bind_mask[shader] |= BITFIELD_BIT(index);
new_res->gfx_barrier |= zink_pipeline_flags_from_pipe_stage(shader);
new_res->barrier_access[shader == MESA_SHADER_COMPUTE] |= VK_ACCESS_UNIFORM_READ_BIT;
update_res_bind_count(ctx, new_res, shader == MESA_SHADER_COMPUTE, false);
}
zink_batch_resource_usage_set(&ctx->batch, new_res, false, true);
zink_screen(ctx->base.screen)->buffer_barrier(ctx, new_res, VK_ACCESS_UNIFORM_READ_BIT,
new_res->gfx_barrier);
new_res->obj->unordered_read = false;
}
update |= ctx->ubos[shader][index].buffer_offset != offset ||
!!res != !!buffer || (res && res->obj->buffer != new_res->obj->buffer) ||
ctx->ubos[shader][index].buffer_size != cb->buffer_size;
if (take_ownership) {
pipe_resource_reference(&ctx->ubos[shader][index].buffer, NULL);
ctx->ubos[shader][index].buffer = buffer;
} else {
pipe_resource_reference(&ctx->ubos[shader][index].buffer, buffer);
}
ctx->ubos[shader][index].buffer_offset = offset;
ctx->ubos[shader][index].buffer_size = cb->buffer_size;
ctx->ubos[shader][index].user_buffer = NULL;
if (cb->user_buffer)
pipe_resource_reference(&buffer, NULL);
if (index + 1 >= ctx->di.num_ubos[shader])
ctx->di.num_ubos[shader] = index + 1;
update_descriptor_state_ubo(ctx, shader, index, new_res);
} else {
ctx->ubos[shader][index].buffer_offset = 0;
ctx->ubos[shader][index].buffer_size = 0;
ctx->ubos[shader][index].user_buffer = NULL;
if (res) {
unbind_ubo(ctx, res, shader, index);
update_descriptor_state_ubo(ctx, shader, index, NULL);
}
update = !!ctx->ubos[shader][index].buffer;
pipe_resource_reference(&ctx->ubos[shader][index].buffer, NULL);
if (ctx->di.num_ubos[shader] == index + 1)
ctx->di.num_ubos[shader]--;
}
if (index == 0) {
/* Invalidate current inlinable uniforms. */
invalidate_inlined_uniforms(ctx, shader);
}
if (update)
zink_context_invalidate_descriptor_state(ctx, shader, ZINK_DESCRIPTOR_TYPE_UBO, index, 1);
}
ALWAYS_INLINE static void
unbind_descriptor_reads(struct zink_resource *res, gl_shader_stage pstage)
{
bool is_compute = pstage == MESA_SHADER_COMPUTE;
if (!res->sampler_bind_count[is_compute] && !res->image_bind_count[is_compute])
res->barrier_access[is_compute] &= ~VK_ACCESS_SHADER_READ_BIT;
}
ALWAYS_INLINE static void
unbind_buffer_descriptor_reads(struct zink_resource *res, gl_shader_stage pstage)
{
if (!res->ssbo_bind_count[pstage == MESA_SHADER_COMPUTE])
unbind_descriptor_reads(res, pstage);
}
ALWAYS_INLINE static void
unbind_ssbo(struct zink_context *ctx, struct zink_resource *res, gl_shader_stage pstage, unsigned slot, bool writable)
{
if (!res)
return;
res->ssbo_bind_mask[pstage] &= ~BITFIELD_BIT(slot);
res->ssbo_bind_count[pstage == MESA_SHADER_COMPUTE]--;
unbind_buffer_descriptor_stage(res, pstage);
unbind_buffer_descriptor_reads(res, pstage);
update_res_bind_count(ctx, res, pstage == MESA_SHADER_COMPUTE, true);
if (writable)
res->write_bind_count[pstage == MESA_SHADER_COMPUTE]--;
if (!res->write_bind_count[pstage == MESA_SHADER_COMPUTE])
res->barrier_access[pstage == MESA_SHADER_COMPUTE] &= ~VK_ACCESS_SHADER_WRITE_BIT;
}
static void
zink_set_shader_buffers(struct pipe_context *pctx,
gl_shader_stage p_stage,
unsigned start_slot, unsigned count,
const struct pipe_shader_buffer *buffers,
unsigned writable_bitmask)
{
struct zink_context *ctx = zink_context(pctx);
bool update = false;
unsigned max_slot = 0;
unsigned modified_bits = u_bit_consecutive(start_slot, count);
unsigned old_writable_mask = ctx->writable_ssbos[p_stage];
ctx->writable_ssbos[p_stage] &= ~modified_bits;
ctx->writable_ssbos[p_stage] |= writable_bitmask << start_slot;
for (unsigned i = 0; i < count; i++) {
struct pipe_shader_buffer *ssbo = &ctx->ssbos[p_stage][start_slot + i];
struct zink_resource *res = ssbo->buffer ? zink_resource(ssbo->buffer) : NULL;
bool was_writable = old_writable_mask & BITFIELD64_BIT(start_slot + i);
if (buffers && buffers[i].buffer) {
struct zink_resource *new_res = zink_resource(buffers[i].buffer);
if (new_res != res) {
unbind_ssbo(ctx, res, p_stage, i, was_writable);
new_res->ssbo_bind_mask[p_stage] |= BITFIELD_BIT(i);
new_res->ssbo_bind_count[p_stage == MESA_SHADER_COMPUTE]++;
new_res->gfx_barrier |= zink_pipeline_flags_from_pipe_stage(p_stage);
update_res_bind_count(ctx, new_res, p_stage == MESA_SHADER_COMPUTE, false);
}
VkAccessFlags access = VK_ACCESS_SHADER_READ_BIT;
if (ctx->writable_ssbos[p_stage] & BITFIELD64_BIT(start_slot + i)) {
new_res->write_bind_count[p_stage == MESA_SHADER_COMPUTE]++;
access |= VK_ACCESS_SHADER_WRITE_BIT;
}
pipe_resource_reference(&ssbo->buffer, &new_res->base.b);
new_res->barrier_access[p_stage == MESA_SHADER_COMPUTE] |= access;
zink_batch_resource_usage_set(&ctx->batch, new_res, access & VK_ACCESS_SHADER_WRITE_BIT, true);
ssbo->buffer_offset = buffers[i].buffer_offset;
ssbo->buffer_size = MIN2(buffers[i].buffer_size, new_res->base.b.width0 - ssbo->buffer_offset);
util_range_add(&new_res->base.b, &new_res->valid_buffer_range, ssbo->buffer_offset,
ssbo->buffer_offset + ssbo->buffer_size);
zink_screen(ctx->base.screen)->buffer_barrier(ctx, new_res, access,
new_res->gfx_barrier);
update = true;
max_slot = MAX2(max_slot, start_slot + i);
update_descriptor_state_ssbo(ctx, p_stage, start_slot + i, new_res);
if (zink_resource_access_is_write(access))
new_res->obj->unordered_read = new_res->obj->unordered_write = false;
else
new_res->obj->unordered_read = false;
} else {
if (res)
update = true;
ssbo->buffer_offset = 0;
ssbo->buffer_size = 0;
if (res) {
unbind_ssbo(ctx, res, p_stage, i, was_writable);
update_descriptor_state_ssbo(ctx, p_stage, start_slot + i, NULL);
}
pipe_resource_reference(&ssbo->buffer, NULL);
}
}
if (start_slot + count >= ctx->di.num_ssbos[p_stage])
ctx->di.num_ssbos[p_stage] = max_slot + 1;
if (update)
zink_context_invalidate_descriptor_state(ctx, p_stage, ZINK_DESCRIPTOR_TYPE_SSBO, start_slot, count);
}
static void
update_binds_for_samplerviews(struct zink_context *ctx, struct zink_resource *res, bool is_compute)
{
VkImageLayout layout = get_layout_for_binding(ctx, res, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, is_compute);
if (is_compute) {
u_foreach_bit(slot, res->sampler_binds[MESA_SHADER_COMPUTE]) {
if (ctx->di.textures[MESA_SHADER_COMPUTE][slot].imageLayout != layout) {
update_descriptor_state_sampler(ctx, MESA_SHADER_COMPUTE, slot, res);
zink_context_invalidate_descriptor_state(ctx, MESA_SHADER_COMPUTE, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, slot, 1);
}
}
} else {
for (unsigned i = 0; i < ZINK_GFX_SHADER_COUNT; i++) {
u_foreach_bit(slot, res->sampler_binds[i]) {
if (ctx->di.textures[i][slot].imageLayout != layout) {
update_descriptor_state_sampler(ctx, i, slot, res);
zink_context_invalidate_descriptor_state(ctx, i, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, slot, 1);
}
}
}
}
}
static void
flush_pending_clears(struct zink_context *ctx, struct zink_resource *res)
{
if (res->fb_bind_count && ctx->clears_enabled)
zink_fb_clears_apply(ctx, &res->base.b);
}
static inline void
unbind_shader_image_counts(struct zink_context *ctx, struct zink_resource *res, bool is_compute, bool writable)
{
update_res_bind_count(ctx, res, is_compute, true);
if (writable)
res->write_bind_count[is_compute]--;
res->image_bind_count[is_compute]--;
/* if this was the last image bind, the sampler bind layouts must be updated */
if (!res->obj->is_buffer && !res->image_bind_count[is_compute] && res->bind_count[is_compute])
update_binds_for_samplerviews(ctx, res, is_compute);
}
ALWAYS_INLINE static void
check_for_layout_update(struct zink_context *ctx, struct zink_resource *res, bool is_compute)
{
VkImageLayout layout = res->bind_count[is_compute] ? zink_descriptor_util_image_layout_eval(ctx, res, is_compute) : VK_IMAGE_LAYOUT_UNDEFINED;
VkImageLayout other_layout = res->bind_count[!is_compute] ? zink_descriptor_util_image_layout_eval(ctx, res, !is_compute) : VK_IMAGE_LAYOUT_UNDEFINED;
if (res->bind_count[is_compute] && layout && res->layout != layout)
_mesa_set_add(ctx->need_barriers[is_compute], res);
if (res->bind_count[!is_compute] && other_layout && (layout != other_layout || res->layout != other_layout))
_mesa_set_add(ctx->need_barriers[!is_compute], res);
}
static void
unbind_shader_image(struct zink_context *ctx, gl_shader_stage stage, unsigned slot)
{
struct zink_image_view *image_view = &ctx->image_views[stage][slot];
bool is_compute = stage == MESA_SHADER_COMPUTE;
if (!image_view->base.resource)
return;
struct zink_resource *res = zink_resource(image_view->base.resource);
res->image_binds[stage] &= ~BITFIELD_BIT(slot);
unbind_shader_image_counts(ctx, res, is_compute, image_view->base.access & PIPE_IMAGE_ACCESS_WRITE);
if (!res->write_bind_count[is_compute])
res->barrier_access[stage == MESA_SHADER_COMPUTE] &= ~VK_ACCESS_SHADER_WRITE_BIT;
if (image_view->base.resource->target == PIPE_BUFFER) {
unbind_buffer_descriptor_stage(res, stage);
unbind_buffer_descriptor_reads(res, stage);
zink_buffer_view_reference(zink_screen(ctx->base.screen), &image_view->buffer_view, NULL);
} else {
unbind_descriptor_stage(res, stage);
unbind_descriptor_reads(res, stage);
if (!res->image_bind_count[is_compute])
check_for_layout_update(ctx, res, is_compute);
zink_surface_reference(zink_screen(ctx->base.screen), &image_view->surface, NULL);
}
image_view->base.resource = NULL;
image_view->surface = NULL;
}
static struct zink_buffer_view *
create_image_bufferview(struct zink_context *ctx, const struct pipe_image_view *view)
{
struct zink_resource *res = zink_resource(view->resource);
VkBufferViewCreateInfo bvci = create_bvci(ctx, res, view->format, view->u.buf.offset, view->u.buf.size);
struct zink_buffer_view *buffer_view = get_buffer_view(ctx, res, &bvci);
if (!buffer_view)
return NULL;
util_range_add(&res->base.b, &res->valid_buffer_range, view->u.buf.offset,
view->u.buf.offset + view->u.buf.size);
return buffer_view;
}
static void
finalize_image_bind(struct zink_context *ctx, struct zink_resource *res, bool is_compute)
{
/* if this is the first image bind and there are sampler binds, the image's sampler layout
* must be updated to GENERAL
*/
if (res->image_bind_count[is_compute] == 1 &&
res->bind_count[is_compute] > 1)
update_binds_for_samplerviews(ctx, res, is_compute);
check_for_layout_update(ctx, res, is_compute);
}
static struct zink_surface *
create_image_surface(struct zink_context *ctx, const struct pipe_image_view *view, bool is_compute)
{
struct zink_screen *screen = zink_screen(ctx->base.screen);
struct zink_resource *res = zink_resource(view->resource);
struct pipe_surface tmpl = {0};
enum pipe_texture_target target = res->base.b.target;
tmpl.format = view->format;
tmpl.u.tex.level = view->u.tex.level;
tmpl.u.tex.first_layer = view->u.tex.first_layer;
tmpl.u.tex.last_layer = view->u.tex.last_layer;
unsigned depth = 1 + tmpl.u.tex.last_layer - tmpl.u.tex.first_layer;
switch (target) {
case PIPE_TEXTURE_3D:
if (depth < u_minify(res->base.b.depth0, view->u.tex.level)) {
assert(depth == 1);
target = PIPE_TEXTURE_2D;
if (!screen->info.have_EXT_image_2d_view_of_3d ||
!screen->info.view2d_feats.image2DViewOf3D) {
static bool warned = false;
warn_missing_feature(warned, "image2DViewOf3D");
}
} else {
assert(tmpl.u.tex.first_layer == 0);
tmpl.u.tex.last_layer = 0;
}
break;
case PIPE_TEXTURE_2D_ARRAY:
case PIPE_TEXTURE_1D_ARRAY:
if (depth < res->base.b.array_size && depth == 1)
target = target == PIPE_TEXTURE_2D_ARRAY ? PIPE_TEXTURE_2D : PIPE_TEXTURE_1D;
break;
default: break;
}
if (!res->obj->dt && view->resource->format != view->format)
/* mutable not set by default */
zink_resource_object_init_mutable(ctx, res);
VkImageViewCreateInfo ivci = create_ivci(screen, res, &tmpl, target);
struct pipe_surface *psurf = zink_get_surface(ctx, view->resource, &tmpl, &ivci);
if (!psurf)
return NULL;
struct zink_surface *surface = zink_surface(psurf);
if (is_compute)
flush_pending_clears(ctx, res);
return surface;
}
static void
zink_set_shader_images(struct pipe_context *pctx,
gl_shader_stage p_stage,
unsigned start_slot, unsigned count,
unsigned unbind_num_trailing_slots,
const struct pipe_image_view *images)
{
struct zink_context *ctx = zink_context(pctx);
bool update = false;
for (unsigned i = 0; i < count; i++) {
struct zink_image_view *image_view = &ctx->image_views[p_stage][start_slot + i];
if (images && images[i].resource) {
struct zink_resource *res = zink_resource(images[i].resource);
if (!zink_resource_object_init_storage(ctx, res)) {
debug_printf("couldn't create storage image!");
continue;
}
/* no refs */
VkAccessFlags access = 0;
if (images[i].access & PIPE_IMAGE_ACCESS_WRITE) {
res->write_bind_count[p_stage == MESA_SHADER_COMPUTE]++;
access |= VK_ACCESS_SHADER_WRITE_BIT;
}
if (images[i].access & PIPE_IMAGE_ACCESS_READ) {
access |= VK_ACCESS_SHADER_READ_BIT;
}
res->gfx_barrier |= zink_pipeline_flags_from_pipe_stage(p_stage);
res->barrier_access[p_stage == MESA_SHADER_COMPUTE] |= access;
if (images[i].resource->target == PIPE_BUFFER) {
struct zink_buffer_view *bv = create_image_bufferview(ctx, &images[i]);
assert(bv);
if (image_view->buffer_view != bv) {
update_res_bind_count(ctx, res, p_stage == MESA_SHADER_COMPUTE, false);
res->image_bind_count[p_stage == MESA_SHADER_COMPUTE]++;
unbind_shader_image(ctx, p_stage, start_slot + i);
}
image_view->buffer_view = bv;
zink_screen(ctx->base.screen)->buffer_barrier(ctx, res, access,
res->gfx_barrier);
zink_batch_resource_usage_set(&ctx->batch, res,
zink_resource_access_is_write(access), true);
} else {
struct zink_surface *surface = create_image_surface(ctx, &images[i], p_stage == MESA_SHADER_COMPUTE);
assert(surface);
if (image_view->surface != surface) {
res->image_bind_count[p_stage == MESA_SHADER_COMPUTE]++;
update_res_bind_count(ctx, res, p_stage == MESA_SHADER_COMPUTE, false);
unbind_shader_image(ctx, p_stage, start_slot + i);
image_view->surface = surface;
} else {
/* create_image_surface will always increment ref */
zink_surface_reference(zink_screen(ctx->base.screen), &surface, NULL);
}
finalize_image_bind(ctx, res, p_stage == MESA_SHADER_COMPUTE);
zink_batch_resource_usage_set(&ctx->batch, res,
zink_resource_access_is_write(access), false);
}
memcpy(&image_view->base, images + i, sizeof(struct pipe_image_view));
update = true;
update_descriptor_state_image(ctx, p_stage, start_slot + i, res);
if (zink_resource_access_is_write(access) || !res->obj->is_buffer)
res->obj->unordered_read = res->obj->unordered_write = false;
else
res->obj->unordered_read = false;
res->image_binds[p_stage] |= BITFIELD_BIT(start_slot + i);
} else if (image_view->base.resource) {
update = true;
unbind_shader_image(ctx, p_stage, start_slot + i);
update_descriptor_state_image(ctx, p_stage, start_slot + i, NULL);
}
}
for (unsigned i = 0; i < unbind_num_trailing_slots; i++) {
update |= !!ctx->image_views[p_stage][start_slot + count + i].base.resource;
unbind_shader_image(ctx, p_stage, start_slot + count + i);
update_descriptor_state_image(ctx, p_stage, start_slot + count + i, NULL);
}
ctx->di.num_images[p_stage] = start_slot + count;
if (update)
zink_context_invalidate_descriptor_state(ctx, p_stage, ZINK_DESCRIPTOR_TYPE_IMAGE, start_slot, count);
}
ALWAYS_INLINE static void
unbind_samplerview(struct zink_context *ctx, gl_shader_stage stage, unsigned slot)
{
struct zink_sampler_view *sv = zink_sampler_view(ctx->sampler_views[stage][slot]);
if (!sv || !sv->base.texture)
return;
struct zink_resource *res = zink_resource(sv->base.texture);
res->sampler_bind_count[stage == MESA_SHADER_COMPUTE]--;
if (stage != MESA_SHADER_COMPUTE && !res->sampler_bind_count[0] && res->fb_bind_count) {
u_foreach_bit(idx, res->fb_binds) {
if (ctx->feedback_loops & BITFIELD_BIT(idx)) {
ctx->dynamic_fb.attachments[idx].imageLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
ctx->rp_layout_changed = true;
}
unsigned feedback_loops = ctx->feedback_loops;
ctx->feedback_loops &= ~BITFIELD_BIT(idx);
if (feedback_loops != ctx->feedback_loops) {
if (idx == PIPE_MAX_COLOR_BUFS && !zink_screen(ctx->base.screen)->driver_workarounds.always_feedback_loop_zs) {
if (ctx->gfx_pipeline_state.feedback_loop_zs)
ctx->gfx_pipeline_state.dirty = true;
ctx->gfx_pipeline_state.feedback_loop_zs = false;
} else if (idx < PIPE_MAX_COLOR_BUFS && !zink_screen(ctx->base.screen)->driver_workarounds.always_feedback_loop) {
if (ctx->gfx_pipeline_state.feedback_loop)
ctx->gfx_pipeline_state.dirty = true;
ctx->gfx_pipeline_state.feedback_loop = false;
}
}
}
}
update_res_bind_count(ctx, res, stage == MESA_SHADER_COMPUTE, true);
res->sampler_binds[stage] &= ~BITFIELD_BIT(slot);
if (res->obj->is_buffer) {
unbind_buffer_descriptor_stage(res, stage);
unbind_buffer_descriptor_reads(res, stage);
} else {
unbind_descriptor_stage(res, stage);
unbind_descriptor_reads(res, stage);
}
}
static void
zink_set_sampler_views(struct pipe_context *pctx,
gl_shader_stage shader_type,
unsigned start_slot,
unsigned num_views,
unsigned unbind_num_trailing_slots,
bool take_ownership,
struct pipe_sampler_view **views)
{
struct zink_context *ctx = zink_context(pctx);
unsigned i;
const uint32_t mask = BITFIELD_RANGE(start_slot, num_views);
ctx->di.cubes[shader_type] &= ~mask;
bool update = false;
for (i = 0; i < num_views; ++i) {
struct pipe_sampler_view *pview = views ? views[i] : NULL;
struct zink_sampler_view *a = zink_sampler_view(ctx->sampler_views[shader_type][start_slot + i]);
struct zink_sampler_view *b = zink_sampler_view(pview);
struct zink_resource *res = b ? zink_resource(b->base.texture) : NULL;
if (b && b->base.texture) {
if (!a || zink_resource(a->base.texture) != res) {
if (a)
unbind_samplerview(ctx, shader_type, start_slot + i);
update_res_bind_count(ctx, res, shader_type == MESA_SHADER_COMPUTE, false);
res->sampler_bind_count[shader_type == MESA_SHADER_COMPUTE]++;
res->gfx_barrier |= zink_pipeline_flags_from_pipe_stage(shader_type);
res->barrier_access[shader_type == MESA_SHADER_COMPUTE] |= VK_ACCESS_SHADER_READ_BIT;
}
if (res->base.b.target == PIPE_BUFFER) {
if (b->buffer_view->bvci.buffer != res->obj->buffer) {
/* if this resource has been rebound while it wasn't set here,
* its backing resource will have changed and thus we need to update
* the bufferview
*/
VkBufferViewCreateInfo bvci = b->buffer_view->bvci;
bvci.buffer = res->obj->buffer;
struct zink_buffer_view *buffer_view = get_buffer_view(ctx, res, &bvci);
assert(buffer_view != b->buffer_view);
zink_buffer_view_reference(zink_screen(ctx->base.screen), &b->buffer_view, NULL);
b->buffer_view = buffer_view;
update = true;
} else if (!a || a->buffer_view->buffer_view != b->buffer_view->buffer_view)
update = true;
zink_screen(ctx->base.screen)->buffer_barrier(ctx, res, VK_ACCESS_SHADER_READ_BIT,
res->gfx_barrier);
zink_batch_resource_usage_set(&ctx->batch, res, false, true);
} else if (!res->obj->is_buffer) {
if (res->base.b.format != b->image_view->base.format)
/* mutable not set by default */
zink_resource_object_init_mutable(ctx, res);
if (res->obj != b->image_view->obj) {
struct pipe_surface *psurf = &b->image_view->base;
VkImageView iv = b->image_view->image_view;
zink_rebind_surface(ctx, &psurf);
b->image_view = zink_surface(psurf);
update |= iv != b->image_view->image_view;
} else if (a != b)
update = true;
if (shader_type == MESA_SHADER_COMPUTE)
flush_pending_clears(ctx, res);
if (b->cube_array) {
ctx->di.cubes[shader_type] |= BITFIELD_BIT(start_slot + i);
}
check_for_layout_update(ctx, res, shader_type == MESA_SHADER_COMPUTE);
if (!a)
update = true;
zink_batch_resource_usage_set(&ctx->batch, res, false, false);
res->obj->unordered_write = false;
}
res->sampler_binds[shader_type] |= BITFIELD_BIT(start_slot + i);
res->obj->unordered_read = false;
} else if (a) {
unbind_samplerview(ctx, shader_type, start_slot + i);
update = true;
}
if (take_ownership) {
pipe_sampler_view_reference(&ctx->sampler_views[shader_type][start_slot + i], NULL);
ctx->sampler_views[shader_type][start_slot + i] = pview;
} else {
pipe_sampler_view_reference(&ctx->sampler_views[shader_type][start_slot + i], pview);
}
update_descriptor_state_sampler(ctx, shader_type, start_slot + i, res);
}
for (; i < num_views + unbind_num_trailing_slots; ++i) {
update |= !!ctx->sampler_views[shader_type][start_slot + i];
unbind_samplerview(ctx, shader_type, start_slot + i);
pipe_sampler_view_reference(
&ctx->sampler_views[shader_type][start_slot + i],
NULL);
update_descriptor_state_sampler(ctx, shader_type, start_slot + i, NULL);
}
ctx->di.num_sampler_views[shader_type] = start_slot + num_views;
if (update) {
struct zink_screen *screen = zink_screen(pctx->screen);
zink_context_invalidate_descriptor_state(ctx, shader_type, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, start_slot, num_views);
if (!screen->info.have_EXT_non_seamless_cube_map)
update_nonseamless_shader_key(ctx, shader_type);
}
}
static uint64_t
zink_create_texture_handle(struct pipe_context *pctx, struct pipe_sampler_view *view, const struct pipe_sampler_state *state)
{
struct zink_context *ctx = zink_context(pctx);
struct zink_resource *res = zink_resource(view->texture);
struct zink_sampler_view *sv = zink_sampler_view(view);
struct zink_bindless_descriptor *bd;
bd = calloc(1, sizeof(struct zink_bindless_descriptor));
if (!bd)
return 0;
bd->sampler = pctx->create_sampler_state(pctx, state);
if (!bd->sampler) {
free(bd);
return 0;
}
bd->ds.is_buffer = res->base.b.target == PIPE_BUFFER;
if (res->base.b.target == PIPE_BUFFER)
zink_buffer_view_reference(zink_screen(pctx->screen), &bd->ds.bufferview, sv->buffer_view);
else
zink_surface_reference(zink_screen(pctx->screen), &bd->ds.surface, sv->image_view);
uint64_t handle = util_idalloc_alloc(&ctx->di.bindless[bd->ds.is_buffer].tex_slots);
if (bd->ds.is_buffer)
handle += ZINK_MAX_BINDLESS_HANDLES;
bd->handle = handle;
_mesa_hash_table_insert(&ctx->di.bindless[bd->ds.is_buffer].tex_handles, (void*)(uintptr_t)handle, bd);
return handle;
}
static void
zink_delete_texture_handle(struct pipe_context *pctx, uint64_t handle)
{
struct zink_context *ctx = zink_context(pctx);
bool is_buffer = ZINK_BINDLESS_IS_BUFFER(handle);
struct hash_entry *he = _mesa_hash_table_search(&ctx->di.bindless[is_buffer].tex_handles, (void*)(uintptr_t)handle);
assert(he);
struct zink_bindless_descriptor *bd = he->data;
struct zink_descriptor_surface *ds = &bd->ds;
_mesa_hash_table_remove(&ctx->di.bindless[is_buffer].tex_handles, he);
uint32_t h = handle;
util_dynarray_append(&ctx->batch.state->bindless_releases[0], uint32_t, h);
if (ds->is_buffer) {
zink_buffer_view_reference(zink_screen(pctx->screen), &ds->bufferview, NULL);
} else {
zink_surface_reference(zink_screen(pctx->screen), &ds->surface, NULL);
pctx->delete_sampler_state(pctx, bd->sampler);
}
free(ds);
}
static void
rebind_bindless_bufferview(struct zink_context *ctx, struct zink_resource *res, struct zink_descriptor_surface *ds)
{
/* if this resource has been rebound while it wasn't set here,
* its backing resource will have changed and thus we need to update
* the bufferview
*/
VkBufferViewCreateInfo bvci = ds->bufferview->bvci;
bvci.buffer = res->obj->buffer;
struct zink_buffer_view *buffer_view = get_buffer_view(ctx, res, &bvci);
assert(buffer_view != ds->bufferview);
zink_buffer_view_reference(zink_screen(ctx->base.screen), &ds->bufferview, NULL);
ds->bufferview = buffer_view;
}
static void
zero_bindless_descriptor(struct zink_context *ctx, uint32_t handle, bool is_buffer, bool is_image)
{
if (likely(zink_screen(ctx->base.screen)->info.rb2_feats.nullDescriptor)) {
if (is_buffer) {
VkBufferView *bv = &ctx->di.bindless[is_image].buffer_infos[handle];
*bv = VK_NULL_HANDLE;
} else {
VkDescriptorImageInfo *ii = &ctx->di.bindless[is_image].img_infos[handle];
memset(ii, 0, sizeof(*ii));
}
} else {
if (is_buffer) {
VkBufferView *bv = &ctx->di.bindless[is_image].buffer_infos[handle];
struct zink_buffer_view *null_bufferview = ctx->dummy_bufferview;
*bv = null_bufferview->buffer_view;
} else {
struct zink_surface *null_surface = zink_get_dummy_surface(ctx, 0);
VkDescriptorImageInfo *ii = &ctx->di.bindless[is_image].img_infos[handle];
ii->sampler = VK_NULL_HANDLE;
ii->imageView = null_surface->image_view;
ii->imageLayout = VK_IMAGE_LAYOUT_GENERAL;
}
}
}
static void
zink_make_texture_handle_resident(struct pipe_context *pctx, uint64_t handle, bool resident)
{
struct zink_context *ctx = zink_context(pctx);
bool is_buffer = ZINK_BINDLESS_IS_BUFFER(handle);
struct hash_entry *he = _mesa_hash_table_search(&ctx->di.bindless[is_buffer].tex_handles, (void*)(uintptr_t)handle);
assert(he);
struct zink_bindless_descriptor *bd = he->data;
struct zink_descriptor_surface *ds = &bd->ds;
struct zink_resource *res = zink_descriptor_surface_resource(ds);
if (is_buffer)
handle -= ZINK_MAX_BINDLESS_HANDLES;
if (resident) {
update_res_bind_count(ctx, res, false, false);
update_res_bind_count(ctx, res, true, false);
res->bindless[0]++;
if (is_buffer) {
if (ds->bufferview->bvci.buffer != res->obj->buffer)
rebind_bindless_bufferview(ctx, res, ds);
VkBufferView *bv = &ctx->di.bindless[0].buffer_infos[handle];
*bv = ds->bufferview->buffer_view;
zink_screen(ctx->base.screen)->buffer_barrier(ctx, res, VK_ACCESS_SHADER_READ_BIT, VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT);
zink_batch_resource_usage_set(&ctx->batch, res, false, true);
} else {
VkDescriptorImageInfo *ii = &ctx->di.bindless[0].img_infos[handle];
ii->sampler = bd->sampler->sampler;
ii->imageView = ds->surface->image_view;
ii->imageLayout = zink_descriptor_util_image_layout_eval(ctx, res, false);
flush_pending_clears(ctx, res);
check_for_layout_update(ctx, res, false);
check_for_layout_update(ctx, res, true);
zink_batch_resource_usage_set(&ctx->batch, res, false, false);
res->obj->unordered_write = false;
}
util_dynarray_append(&ctx->di.bindless[0].resident, struct zink_bindless_descriptor *, bd);
uint32_t h = is_buffer ? handle + ZINK_MAX_BINDLESS_HANDLES : handle;
util_dynarray_append(&ctx->di.bindless[0].updates, uint32_t, h);
res->obj->unordered_read = false;
} else {
zero_bindless_descriptor(ctx, handle, is_buffer, false);
util_dynarray_delete_unordered(&ctx->di.bindless[0].resident, struct zink_bindless_descriptor *, bd);
update_res_bind_count(ctx, res, false, true);
update_res_bind_count(ctx, res, true, true);
res->bindless[0]--;
for (unsigned i = 0; i < 2; i++) {
if (!res->image_bind_count[i])
check_for_layout_update(ctx, res, i);
}
}
ctx->di.bindless_dirty[0] = true;
}
static uint64_t
zink_create_image_handle(struct pipe_context *pctx, const struct pipe_image_view *view)
{
struct zink_context *ctx = zink_context(pctx);
struct zink_resource *res = zink_resource(view->resource);
struct zink_bindless_descriptor *bd;
if (!zink_resource_object_init_storage(ctx, res)) {
debug_printf("couldn't create storage image!");
return 0;
}
bd = malloc(sizeof(struct zink_bindless_descriptor));
if (!bd)
return 0;
bd->sampler = NULL;
bd->ds.is_buffer = res->base.b.target == PIPE_BUFFER;
if (res->base.b.target == PIPE_BUFFER)
bd->ds.bufferview = create_image_bufferview(ctx, view);
else
bd->ds.surface = create_image_surface(ctx, view, false);
uint64_t handle = util_idalloc_alloc(&ctx->di.bindless[bd->ds.is_buffer].img_slots);
if (bd->ds.is_buffer)
handle += ZINK_MAX_BINDLESS_HANDLES;
bd->handle = handle;
_mesa_hash_table_insert(&ctx->di.bindless[bd->ds.is_buffer].img_handles, (void*)(uintptr_t)handle, bd);
return handle;
}
static void
zink_delete_image_handle(struct pipe_context *pctx, uint64_t handle)
{
struct zink_context *ctx = zink_context(pctx);
bool is_buffer = ZINK_BINDLESS_IS_BUFFER(handle);
struct hash_entry *he = _mesa_hash_table_search(&ctx->di.bindless[is_buffer].img_handles, (void*)(uintptr_t)handle);
assert(he);
struct zink_descriptor_surface *ds = he->data;
_mesa_hash_table_remove(&ctx->di.bindless[is_buffer].img_handles, he);
uint32_t h = handle;
util_dynarray_append(&ctx->batch.state->bindless_releases[1], uint32_t, h);
if (ds->is_buffer) {
zink_buffer_view_reference(zink_screen(pctx->screen), &ds->bufferview, NULL);
} else {
zink_surface_reference(zink_screen(pctx->screen), &ds->surface, NULL);
}
free(ds);
}
static void
zink_make_image_handle_resident(struct pipe_context *pctx, uint64_t handle, unsigned paccess, bool resident)
{
struct zink_context *ctx = zink_context(pctx);
bool is_buffer = ZINK_BINDLESS_IS_BUFFER(handle);
struct hash_entry *he = _mesa_hash_table_search(&ctx->di.bindless[is_buffer].img_handles, (void*)(uintptr_t)handle);
assert(he);
struct zink_bindless_descriptor *bd = he->data;
struct zink_descriptor_surface *ds = &bd->ds;
bd->access = paccess;
struct zink_resource *res = zink_descriptor_surface_resource(ds);
VkAccessFlags access = 0;
if (paccess & PIPE_IMAGE_ACCESS_WRITE) {
if (resident) {
res->write_bind_count[0]++;
res->write_bind_count[1]++;
} else {
res->write_bind_count[0]--;
res->write_bind_count[1]--;
}
access |= VK_ACCESS_SHADER_WRITE_BIT;
}
if (paccess & PIPE_IMAGE_ACCESS_READ) {
access |= VK_ACCESS_SHADER_READ_BIT;
}
if (is_buffer)
handle -= ZINK_MAX_BINDLESS_HANDLES;
if (resident) {
update_res_bind_count(ctx, res, false, false);
update_res_bind_count(ctx, res, true, false);
res->image_bind_count[0]++;
res->image_bind_count[1]++;
res->bindless[1]++;
if (is_buffer) {
if (ds->bufferview->bvci.buffer != res->obj->buffer)
rebind_bindless_bufferview(ctx, res, ds);
VkBufferView *bv = &ctx->di.bindless[1].buffer_infos[handle];
*bv = ds->bufferview->buffer_view;
zink_screen(ctx->base.screen)->buffer_barrier(ctx, res, access, VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT);
zink_batch_resource_usage_set(&ctx->batch, res, zink_resource_access_is_write(access), true);
} else {
VkDescriptorImageInfo *ii = &ctx->di.bindless[1].img_infos[handle];
ii->sampler = VK_NULL_HANDLE;
ii->imageView = ds->surface->image_view;
ii->imageLayout = VK_IMAGE_LAYOUT_GENERAL;
finalize_image_bind(ctx, res, false);
finalize_image_bind(ctx, res, true);
zink_batch_resource_usage_set(&ctx->batch, res, zink_resource_access_is_write(access), false);
res->obj->unordered_write = false;
}
util_dynarray_append(&ctx->di.bindless[1].resident, struct zink_bindless_descriptor *, bd);
uint32_t h = is_buffer ? handle + ZINK_MAX_BINDLESS_HANDLES : handle;
util_dynarray_append(&ctx->di.bindless[1].updates, uint32_t, h);
if (zink_resource_access_is_write(access))
res->obj->unordered_read = res->obj->unordered_write = false;
else
res->obj->unordered_read = false;
} else {
zero_bindless_descriptor(ctx, handle, is_buffer, true);
util_dynarray_delete_unordered(&ctx->di.bindless[1].resident, struct zink_bindless_descriptor *, bd);
unbind_shader_image_counts(ctx, res, false, false);
unbind_shader_image_counts(ctx, res, true, false);
res->bindless[1]--;
for (unsigned i = 0; i < 2; i++) {
if (!res->image_bind_count[i])
check_for_layout_update(ctx, res, i);
}
}
ctx->di.bindless_dirty[1] = true;
}
static void
zink_set_stencil_ref(struct pipe_context *pctx,
const struct pipe_stencil_ref ref)
{
struct zink_context *ctx = zink_context(pctx);
ctx->stencil_ref = ref;
ctx->stencil_ref_changed = true;
}
static void
zink_set_clip_state(struct pipe_context *pctx,
const struct pipe_clip_state *pcs)
{
}
static void
zink_set_tess_state(struct pipe_context *pctx,
const float default_outer_level[4],
const float default_inner_level[2])
{
struct zink_context *ctx = zink_context(pctx);
memcpy(&ctx->default_inner_level, default_inner_level, sizeof(ctx->default_inner_level));
memcpy(&ctx->default_outer_level, default_outer_level, sizeof(ctx->default_outer_level));
}
static void
zink_set_patch_vertices(struct pipe_context *pctx, uint8_t patch_vertices)
{
struct zink_context *ctx = zink_context(pctx);
if (zink_set_tcs_key_patches(ctx, patch_vertices)) {
ctx->gfx_pipeline_state.dyn_state2.vertices_per_patch = patch_vertices;
if (zink_screen(ctx->base.screen)->info.dynamic_state2_feats.extendedDynamicState2PatchControlPoints)
VKCTX(CmdSetPatchControlPointsEXT)(ctx->batch.state->cmdbuf, patch_vertices);
else
ctx->gfx_pipeline_state.dirty = true;
}
}
void
zink_update_fbfetch(struct zink_context *ctx)
{
const bool had_fbfetch = ctx->di.fbfetch.imageLayout == VK_IMAGE_LAYOUT_GENERAL;
if (!ctx->gfx_stages[MESA_SHADER_FRAGMENT] ||
!ctx->gfx_stages[MESA_SHADER_FRAGMENT]->nir->info.fs.uses_fbfetch_output) {
if (!had_fbfetch)
return;
ctx->rp_changed = true;
zink_batch_no_rp(ctx);
ctx->di.fbfetch.imageLayout = VK_IMAGE_LAYOUT_UNDEFINED;
ctx->di.fbfetch.imageView = zink_screen(ctx->base.screen)->info.rb2_feats.nullDescriptor ?
VK_NULL_HANDLE :
zink_get_dummy_surface(ctx, 0)->image_view;
zink_context_invalidate_descriptor_state(ctx, MESA_SHADER_FRAGMENT, ZINK_DESCRIPTOR_TYPE_UBO, 0, 1);
return;
}
bool changed = !had_fbfetch;
if (ctx->fb_state.cbufs[0]) {
VkImageView fbfetch = zink_csurface(ctx->fb_state.cbufs[0])->image_view;
if (!fbfetch)
/* swapchain image: retry later */
return;
changed |= fbfetch != ctx->di.fbfetch.imageView;
ctx->di.fbfetch.imageView = zink_csurface(ctx->fb_state.cbufs[0])->image_view;
bool fbfetch_ms = ctx->fb_state.cbufs[0]->texture->nr_samples > 1;
if (zink_get_fs_key(ctx)->fbfetch_ms != fbfetch_ms)
zink_set_fs_key(ctx)->fbfetch_ms = fbfetch_ms;
}
ctx->di.fbfetch.imageLayout = VK_IMAGE_LAYOUT_GENERAL;
if (changed) {
zink_context_invalidate_descriptor_state(ctx, MESA_SHADER_FRAGMENT, ZINK_DESCRIPTOR_TYPE_UBO, 0, 1);
if (!had_fbfetch) {
ctx->rp_changed = true;
zink_batch_no_rp(ctx);
}
}
}
void
zink_update_vk_sample_locations(struct zink_context *ctx)
{
if (ctx->gfx_pipeline_state.sample_locations_enabled && ctx->sample_locations_changed) {
unsigned samples = ctx->gfx_pipeline_state.rast_samples + 1;
unsigned idx = util_logbase2_ceil(MAX2(samples, 1));
VkExtent2D grid_size = zink_screen(ctx->base.screen)->maxSampleLocationGridSize[idx];
for (unsigned pixel = 0; pixel < grid_size.width * grid_size.height; pixel++) {
for (unsigned sample = 0; sample < samples; sample++) {
unsigned pixel_x = pixel % grid_size.width;
unsigned pixel_y = pixel / grid_size.width;
unsigned wi = pixel * samples + sample;
unsigned ri = (pixel_y * grid_size.width + pixel_x % grid_size.width);
ri = ri * samples + sample;
ctx->vk_sample_locations[wi].x = (ctx->sample_locations[ri] & 0xf) / 16.0f;
ctx->vk_sample_locations[wi].y = (16 - (ctx->sample_locations[ri] >> 4)) / 16.0f;
}
}
}
}
static unsigned
find_rp_state(struct zink_context *ctx)
{
bool found = false;
struct set_entry *he = _mesa_set_search_or_add(&ctx->rendering_state_cache, &ctx->gfx_pipeline_state.rendering_info, &found);
struct zink_rendering_info *info;
if (found) {
info = (void*)he->key;
return info->id;
}
info = ralloc(ctx, struct zink_rendering_info);
memcpy(info, &ctx->gfx_pipeline_state.rendering_info, sizeof(VkPipelineRenderingCreateInfo));
info->id = ctx->rendering_state_cache.entries;
he->key = info;
return info->id;
}
static unsigned
begin_rendering(struct zink_context *ctx)
{
unsigned clear_buffers = 0;
ctx->gfx_pipeline_state.render_pass = NULL;
zink_update_vk_sample_locations(ctx);
zink_render_update_swapchain(ctx);
bool has_depth = false;
bool has_stencil = false;
bool changed_layout = false;
bool changed_size = false;
bool zsbuf_used = zink_is_zsbuf_used(ctx);
if (ctx->rp_changed || ctx->rp_layout_changed || ctx->rp_loadop_changed) {
/* init imageviews, base loadOp, formats */
for (int i = 0; i < ctx->fb_state.nr_cbufs; i++) {
struct zink_surface *surf = zink_csurface(ctx->fb_state.cbufs[i]);
if (!surf || !zink_resource(surf->base.texture)->valid)
ctx->dynamic_fb.attachments[i].loadOp = VK_ATTACHMENT_LOAD_OP_DONT_CARE;
else
ctx->dynamic_fb.attachments[i].loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
if (ctx->tc && zink_screen(ctx->base.screen)->driver_workarounds.track_renderpasses) {
if (ctx->dynamic_fb.tc_info.cbuf_invalidate & BITFIELD_BIT(i))
ctx->dynamic_fb.attachments[i].storeOp = VK_ATTACHMENT_STORE_OP_DONT_CARE;
else
ctx->dynamic_fb.attachments[i].storeOp = VK_ATTACHMENT_STORE_OP_STORE;
}
ctx->gfx_pipeline_state.rendering_formats[i] = surf ? surf->info.format[0] : VK_FORMAT_R8G8B8A8_UNORM;
/* use dummy fb size of 1024 if no surf exists */
unsigned width = surf ? surf->base.texture->width0 : 1024;
unsigned height = surf ? surf->base.texture->height0 : 1024;
unsigned prev_width = ctx->dynamic_fb.info.renderArea.extent.width;
unsigned prev_height = ctx->dynamic_fb.info.renderArea.extent.height;
ctx->dynamic_fb.info.renderArea.extent.width = MIN2(ctx->dynamic_fb.info.renderArea.extent.width, width);
ctx->dynamic_fb.info.renderArea.extent.height = MIN2(ctx->dynamic_fb.info.renderArea.extent.height, height);
changed_size |= ctx->dynamic_fb.info.renderArea.extent.width != prev_width;
changed_size |= ctx->dynamic_fb.info.renderArea.extent.height != prev_height;
}
/* unset depth and stencil info: reset below */
VkImageLayout zlayout = ctx->dynamic_fb.info.pDepthAttachment ? ctx->dynamic_fb.info.pDepthAttachment->imageLayout : VK_IMAGE_LAYOUT_UNDEFINED;
VkImageLayout slayout = ctx->dynamic_fb.info.pStencilAttachment ? ctx->dynamic_fb.info.pStencilAttachment->imageLayout : VK_IMAGE_LAYOUT_UNDEFINED;
ctx->dynamic_fb.info.pDepthAttachment = NULL;
ctx->gfx_pipeline_state.rendering_info.depthAttachmentFormat = VK_FORMAT_UNDEFINED;
ctx->dynamic_fb.info.pStencilAttachment = NULL;
ctx->gfx_pipeline_state.rendering_info.stencilAttachmentFormat = VK_FORMAT_UNDEFINED;
if (ctx->fb_state.zsbuf && zsbuf_used) {
struct zink_surface *surf = zink_csurface(ctx->fb_state.zsbuf);
has_depth = util_format_has_depth(util_format_description(ctx->fb_state.zsbuf->format));
has_stencil = util_format_has_stencil(util_format_description(ctx->fb_state.zsbuf->format));
/* depth may or may not be used but init it anyway */
if (zink_resource(surf->base.texture)->valid)
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS].loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
else
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS].loadOp = VK_ATTACHMENT_LOAD_OP_DONT_CARE;
if (ctx->tc && zink_screen(ctx->base.screen)->driver_workarounds.track_renderpasses) {
if (ctx->dynamic_fb.tc_info.zsbuf_invalidate)
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS].storeOp = VK_ATTACHMENT_STORE_OP_DONT_CARE;
else
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS].storeOp = VK_ATTACHMENT_STORE_OP_STORE;
}
/* stencil may or may not be used but init it anyway */
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS+1].loadOp = ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS].loadOp;
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS+1].storeOp = ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS].storeOp;
if (has_depth) {
ctx->dynamic_fb.info.pDepthAttachment = &ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS];
ctx->gfx_pipeline_state.rendering_info.depthAttachmentFormat = surf->info.format[0];
/* stencil info only set for clears below */
}
if (has_stencil) {
/* must be stencil-only */
ctx->dynamic_fb.info.pStencilAttachment = &ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS + 1];
ctx->gfx_pipeline_state.rendering_info.stencilAttachmentFormat = surf->info.format[0];
}
} else {
ctx->dynamic_fb.info.pDepthAttachment = NULL;
ctx->gfx_pipeline_state.rendering_info.depthAttachmentFormat = VK_FORMAT_UNDEFINED;
}
if (zlayout != (ctx->dynamic_fb.info.pDepthAttachment ? ctx->dynamic_fb.info.pDepthAttachment->imageLayout : VK_IMAGE_LAYOUT_UNDEFINED))
changed_layout = true;
if (slayout != (ctx->dynamic_fb.info.pStencilAttachment ? ctx->dynamic_fb.info.pStencilAttachment->imageLayout : VK_IMAGE_LAYOUT_UNDEFINED))
changed_layout = true;
/* similar to begin_render_pass(), but just filling in VkRenderingInfo */
for (int i = 0; i < ctx->fb_state.nr_cbufs; i++) {
/* these are no-ops */
if (!ctx->fb_state.cbufs[i] || !zink_fb_clear_enabled(ctx, i))
continue;
/* these need actual clear calls inside the rp */
struct zink_framebuffer_clear_data *clear = zink_fb_clear_element(&ctx->fb_clears[i], 0);
if (zink_fb_clear_needs_explicit(&ctx->fb_clears[i])) {
clear_buffers |= (PIPE_CLEAR_COLOR0 << i);
if (zink_fb_clear_count(&ctx->fb_clears[i]) < 2 ||
zink_fb_clear_element_needs_explicit(clear))
continue;
}
/* we now know there's one clear that can be done here */
memcpy(&ctx->dynamic_fb.attachments[i].clearValue, &clear->color, sizeof(float) * 4);
ctx->dynamic_fb.attachments[i].loadOp = VK_ATTACHMENT_LOAD_OP_CLEAR;
}
if (ctx->fb_state.zsbuf && zink_fb_clear_enabled(ctx, PIPE_MAX_COLOR_BUFS)) {
struct zink_framebuffer_clear *fb_clear = &ctx->fb_clears[PIPE_MAX_COLOR_BUFS];
struct zink_framebuffer_clear_data *clear = zink_fb_clear_element(fb_clear, 0);
if (!zink_fb_clear_element_needs_explicit(clear)) {
/* base zs clear info */
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS].clearValue.depthStencil.depth = clear->zs.depth;
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS].clearValue.depthStencil.stencil = clear->zs.stencil;
/* always init separate stencil attachment */
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS+1].clearValue.depthStencil.stencil = clear->zs.stencil;
if ((zink_fb_clear_element(fb_clear, 0)->zs.bits & PIPE_CLEAR_DEPTH))
/* initiate a depth clear */
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS].loadOp = VK_ATTACHMENT_LOAD_OP_CLEAR;
if ((zink_fb_clear_element(fb_clear, 0)->zs.bits & PIPE_CLEAR_STENCIL)) {
/* use a stencil clear, also set stencil attachment */
ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS+1].loadOp = VK_ATTACHMENT_LOAD_OP_CLEAR;
}
}
if (zink_fb_clear_needs_explicit(fb_clear)) {
for (int j = !zink_fb_clear_element_needs_explicit(clear);
(clear_buffers & PIPE_CLEAR_DEPTHSTENCIL) != PIPE_CLEAR_DEPTHSTENCIL && j < zink_fb_clear_count(fb_clear);
j++)
clear_buffers |= zink_fb_clear_element(fb_clear, j)->zs.bits;
}
}