diff --git a/.pick_status.json b/.pick_status.json
index b4c3d70..931c9f1 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -4,7 +4,7 @@
         "description": "aco/gfx10: Fix VcmpxExecWARHazard mitigation.",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "d6dfce02d074d615a3b88a3fccd8ee8c7e13c010"
     },
diff --git a/src/amd/compiler/README.md b/src/amd/compiler/README.md
index 822ecd7..7c7e68f 100644
--- a/src/amd/compiler/README.md
+++ b/src/amd/compiler/README.md
@@ -154,7 +154,6 @@
 
 Triggered by:
 An SMEM instruction reads an SGPR. Then, a VALU instruction writes that same SGPR.
-Despite LLVM
 
 Mitigated by:
 Any non-SOPP SALU instruction (except `s_setvskip`, `s_version`, and any non-lgkmcnt `s_waitcnt`).
diff --git a/src/amd/compiler/aco_insert_NOPs.cpp b/src/amd/compiler/aco_insert_NOPs.cpp
index 2422db8..76b7ddd 100644
--- a/src/amd/compiler/aco_insert_NOPs.cpp
+++ b/src/amd/compiler/aco_insert_NOPs.cpp
@@ -455,9 +455,9 @@
          ctx.has_nonVALU_exec_read = false;
 
          /* Insert s_waitcnt_depctr instruction with magic imm to mitigate the problem */
-         aco_ptr<SOPP_instruction> depctr{create_instruction<SOPP_instruction>(aco_opcode::s_waitcnt_depctr, Format::SOPP, 0, 1)};
+         aco_ptr<SOPP_instruction> depctr{create_instruction<SOPP_instruction>(aco_opcode::s_waitcnt_depctr, Format::SOPP, 0, 0)};
          depctr->imm = 0xfffe;
-         depctr->definitions[0] = Definition(sgpr_null, s1);
+         depctr->block = -1;
          new_instructions.emplace_back(std::move(depctr));
       } else if (instr_writes_sgpr(instr)) {
          /* Any VALU instruction that writes an SGPR mitigates the problem */