| #ifndef NVC0_COMPUTE_XML |
| #define NVC0_COMPUTE_XML |
| |
| /* Autogenerated file, DO NOT EDIT manually! |
| |
| This file was generated by the rules-ng-ng headergen tool in this git repository: |
| http://github.com/envytools/envytools/ |
| git clone https://github.com/envytools/envytools.git |
| |
| The rules-ng-ng source files this header was generated from are: |
| - rnndb/graph/gf100_compute.xml ( 11143 bytes, from 2014-09-25 06:32:11) |
| - rnndb/copyright.xml ( 6456 bytes, from 2014-12-31 02:13:31) |
| - rnndb/nvchipsets.xml ( 2759 bytes, from 2014-10-05 01:51:02) |
| - rnndb/fifo/nv_object.xml ( 15326 bytes, from 2014-09-25 06:32:11) |
| - rnndb/g80_defs.xml ( 18175 bytes, from 2014-09-25 06:32:11) |
| |
| Copyright (C) 2006-2014 by the following authors: |
| - Artur Huillet <arthur.huillet@free.fr> (ahuillet) |
| - Ben Skeggs (darktama, darktama_) |
| - B. R. <koala_br@users.sourceforge.net> (koala_br) |
| - Carlos Martin <carlosmn@users.sf.net> (carlosmn) |
| - Christoph Bumiller <e0425955@student.tuwien.ac.at> (calim, chrisbmr) |
| - Dawid Gajownik <gajownik@users.sf.net> (gajownik) |
| - Dmitry Baryshkov |
| - Dmitry Eremin-Solenikov <lumag@users.sf.net> (lumag) |
| - EdB <edb_@users.sf.net> (edb_) |
| - Erik Waling <erikwailing@users.sf.net> (erikwaling) |
| - Francisco Jerez <currojerez@riseup.net> (curro) |
| - Ilia Mirkin <imirkin@alum.mit.edu> (imirkin) |
| - jb17bsome <jb17bsome@bellsouth.net> (jb17bsome) |
| - Jeremy Kolb <kjeremy@users.sf.net> (kjeremy) |
| - Laurent Carlier <lordheavym@gmail.com> (lordheavy) |
| - Luca Barbieri <luca@luca-barbieri.com> (lb, lb1) |
| - Maarten Maathuis <madman2003@gmail.com> (stillunknown) |
| - Marcin Kościelnicki <koriakin@0x04.net> (mwk, koriakin) |
| - Mark Carey <mark.carey@gmail.com> (careym) |
| - Matthieu Castet <matthieu.castet@parrot.com> (mat-c) |
| - nvidiaman <nvidiaman@users.sf.net> (nvidiaman) |
| - Patrice Mandin <patmandin@gmail.com> (pmandin, pmdata) |
| - Pekka Paalanen <pq@iki.fi> (pq, ppaalanen) |
| - Peter Popov <ironpeter@users.sf.net> (ironpeter) |
| - Richard Hughes <hughsient@users.sf.net> (hughsient) |
| - Rudi Cilibrasi <cilibrar@users.sf.net> (cilibrar) |
| - Serge Martin |
| - Simon Raffeiner |
| - Stephane Loeuillet <leroutier@users.sf.net> (leroutier) |
| - Stephane Marchesin <stephane.marchesin@gmail.com> (marcheu) |
| - sturmflut <sturmflut@users.sf.net> (sturmflut) |
| - Sylvain Munaut <tnt@246tNt.com> |
| - Victor Stinner <victor.stinner@haypocalc.com> (haypo) |
| - Wladmir van der Laan <laanwj@gmail.com> (miathan6) |
| - Younes Manton <younes.m@gmail.com> (ymanton) |
| |
| Permission is hereby granted, free of charge, to any person obtaining |
| a copy of this software and associated documentation files (the |
| "Software"), to deal in the Software without restriction, including |
| without limitation the rights to use, copy, modify, merge, publish, |
| distribute, sublicense, and/or sell copies of the Software, and to |
| permit persons to whom the Software is furnished to do so, subject to |
| the following conditions: |
| |
| The above copyright notice and this permission notice (including the |
| next paragraph) shall be included in all copies or substantial |
| portions of the Software. |
| |
| THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
| LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
| OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
| WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| */ |
| |
| |
| |
| #define NVC0_COMPUTE_LOCAL_POS_ALLOC 0x00000204 |
| |
| #define NVC0_COMPUTE_LOCAL_NEG_ALLOC 0x00000208 |
| |
| #define NVC0_COMPUTE_WARP_CSTACK_SIZE 0x0000020c |
| |
| #define NVC0_COMPUTE_TEX_LIMITS 0x00000210 |
| #define NVC0_COMPUTE_TEX_LIMITS_SAMPLERS_LOG2__MASK 0x0000000f |
| #define NVC0_COMPUTE_TEX_LIMITS_SAMPLERS_LOG2__SHIFT 0 |
| #define NVC0_COMPUTE_TEX_LIMITS_SAMPLERS_LOG2__MIN 0x00000000 |
| #define NVC0_COMPUTE_TEX_LIMITS_SAMPLERS_LOG2__MAX 0x00000004 |
| #define NVC0_COMPUTE_TEX_LIMITS_TEXTURES_LOG2__MASK 0x000000f0 |
| #define NVC0_COMPUTE_TEX_LIMITS_TEXTURES_LOG2__SHIFT 4 |
| #define NVC0_COMPUTE_TEX_LIMITS_TEXTURES_LOG2__MIN 0x00000000 |
| #define NVC0_COMPUTE_TEX_LIMITS_TEXTURES_LOG2__MAX 0x00000007 |
| |
| #define NVC0_COMPUTE_SHARED_BASE 0x00000214 |
| |
| #define NVC0_COMPUTE_MEM_BARRIER 0x0000021c |
| #define NVC0_COMPUTE_MEM_BARRIER_UNK0 0x00000001 |
| #define NVC0_COMPUTE_MEM_BARRIER_UNK1 0x00000002 |
| #define NVC0_COMPUTE_MEM_BARRIER_UNK2 0x00000004 |
| #define NVC0_COMPUTE_MEM_BARRIER_UNK4 0x00000010 |
| #define NVC0_COMPUTE_MEM_BARRIER_UNK8 0x00000100 |
| #define NVC0_COMPUTE_MEM_BARRIER_UNK12 0x00001000 |
| |
| #define NVC0_COMPUTE_BIND_TSC 0x00000228 |
| #define NVC0_COMPUTE_BIND_TSC_ACTIVE 0x00000001 |
| #define NVC0_COMPUTE_BIND_TSC_SAMPLER__MASK 0x00000ff0 |
| #define NVC0_COMPUTE_BIND_TSC_SAMPLER__SHIFT 4 |
| #define NVC0_COMPUTE_BIND_TSC_TSC__MASK 0x01fff000 |
| #define NVC0_COMPUTE_BIND_TSC_TSC__SHIFT 12 |
| |
| #define NVC0_COMPUTE_BIND_TIC 0x0000022c |
| #define NVC0_COMPUTE_BIND_TIC_ACTIVE 0x00000001 |
| #define NVC0_COMPUTE_BIND_TIC_TEXTURE__MASK 0x000001fe |
| #define NVC0_COMPUTE_BIND_TIC_TEXTURE__SHIFT 1 |
| #define NVC0_COMPUTE_BIND_TIC_TIC__MASK 0x7ffffe00 |
| #define NVC0_COMPUTE_BIND_TIC_TIC__SHIFT 9 |
| |
| #define NVC0_COMPUTE_BIND_TSC2 0x00000230 |
| #define NVC0_COMPUTE_BIND_TSC2_ACTIVE 0x00000001 |
| #define NVC0_COMPUTE_BIND_TSC2_SAMPLER__MASK 0x00000010 |
| #define NVC0_COMPUTE_BIND_TSC2_SAMPLER__SHIFT 4 |
| #define NVC0_COMPUTE_BIND_TSC2_TSC__MASK 0x01fff000 |
| #define NVC0_COMPUTE_BIND_TSC2_TSC__SHIFT 12 |
| |
| #define NVC0_COMPUTE_BIND_TIC2 0x00000234 |
| #define NVC0_COMPUTE_BIND_TIC2_ACTIVE 0x00000001 |
| #define NVC0_COMPUTE_BIND_TIC2_TEXTURE__MASK 0x00000002 |
| #define NVC0_COMPUTE_BIND_TIC2_TEXTURE__SHIFT 1 |
| #define NVC0_COMPUTE_BIND_TIC2_TIC__MASK 0x7ffffe00 |
| #define NVC0_COMPUTE_BIND_TIC2_TIC__SHIFT 9 |
| |
| #define NVC0_COMPUTE_GRIDDIM_YX 0x00000238 |
| #define NVC0_COMPUTE_GRIDDIM_YX_X__MASK 0x0000ffff |
| #define NVC0_COMPUTE_GRIDDIM_YX_X__SHIFT 0 |
| #define NVC0_COMPUTE_GRIDDIM_YX_Y__MASK 0xffff0000 |
| #define NVC0_COMPUTE_GRIDDIM_YX_Y__SHIFT 16 |
| |
| #define NVC0_COMPUTE_GRIDDIM_Z 0x0000023c |
| |
| #define NVC0_COMPUTE_UNK244_TIC_FLUSH 0x00000244 |
| |
| #define NVC0_COMPUTE_SHARED_SIZE 0x0000024c |
| |
| #define NVC0_COMPUTE_THREADS_ALLOC 0x00000250 |
| |
| #define NVC0_COMPUTE_BARRIER_ALLOC 0x00000254 |
| |
| #define NVC0_COMPUTE_UNK028C 0x0000028c |
| |
| #define NVC0_COMPUTE_COMPUTE_BEGIN 0x0000029c |
| #define NVC0_COMPUTE_COMPUTE_BEGIN_UNK0 0x00000001 |
| |
| #define NVC0_COMPUTE_UNK02A0 0x000002a0 |
| |
| #define NVC0_COMPUTE_CP_GPR_ALLOC 0x000002c0 |
| |
| #define NVC0_COMPUTE_UNK02C4 0x000002c4 |
| |
| #define NVC0_COMPUTE_GLOBAL_BASE 0x000002c8 |
| #define NVC0_COMPUTE_GLOBAL_BASE_HIGH__MASK 0x000000ff |
| #define NVC0_COMPUTE_GLOBAL_BASE_HIGH__SHIFT 0 |
| #define NVC0_COMPUTE_GLOBAL_BASE_INDEX__MASK 0x00ff0000 |
| #define NVC0_COMPUTE_GLOBAL_BASE_INDEX__SHIFT 16 |
| #define NVC0_COMPUTE_GLOBAL_BASE_READ_OK 0x40000000 |
| #define NVC0_COMPUTE_GLOBAL_BASE_WRITE_OK 0x80000000 |
| |
| #define NVC8_COMPUTE_UNK02E0 0x000002e0 |
| |
| #define NVC0_COMPUTE_CACHE_SPLIT 0x00000308 |
| #define NVC0_COMPUTE_CACHE_SPLIT_16K_SHARED_48K_L1 0x00000001 |
| #define NVC0_COMPUTE_CACHE_SPLIT_48K_SHARED_16K_L1 0x00000003 |
| |
| #define NVC0_COMPUTE_UNK030C 0x0000030c |
| |
| #define NVC0_COMPUTE_UNK0360 0x00000360 |
| #define NVC0_COMPUTE_UNK0360_UNK0 0x00000001 |
| #define NVC0_COMPUTE_UNK0360_UNK8__MASK 0x00000300 |
| #define NVC0_COMPUTE_UNK0360_UNK8__SHIFT 8 |
| #define NVC8_COMPUTE_UNK0360_UNK10__MASK 0x00000c00 |
| #define NVC8_COMPUTE_UNK0360_UNK10__SHIFT 10 |
| |
| #define NVC0_COMPUTE_LAUNCH 0x00000368 |
| |
| #define NVC0_COMPUTE_UNK036C 0x0000036c |
| #define NVC0_COMPUTE_UNK036C_UNK0__MASK 0x00000003 |
| #define NVC0_COMPUTE_UNK036C_UNK0__SHIFT 0 |
| #define NVC8_COMPUTE_UNK036C_UNK2__MASK 0x0000000c |
| #define NVC8_COMPUTE_UNK036C_UNK2__SHIFT 2 |
| |
| #define NVC0_COMPUTE_BLOCKDIM_YX 0x000003ac |
| #define NVC0_COMPUTE_BLOCKDIM_YX_X__MASK 0x0000ffff |
| #define NVC0_COMPUTE_BLOCKDIM_YX_X__SHIFT 0 |
| #define NVC0_COMPUTE_BLOCKDIM_YX_Y__MASK 0xffff0000 |
| #define NVC0_COMPUTE_BLOCKDIM_YX_Y__SHIFT 16 |
| |
| #define NVC0_COMPUTE_BLOCKDIM_Z 0x000003b0 |
| |
| #define NVC0_COMPUTE_CP_START_ID 0x000003b4 |
| |
| #define NVC0_COMPUTE_FIRMWARE(i0) (0x00000500 + 0x4*(i0)) |
| #define NVC0_COMPUTE_FIRMWARE__ESIZE 0x00000004 |
| #define NVC0_COMPUTE_FIRMWARE__LEN 0x00000020 |
| |
| #define NVC0_COMPUTE_MP_LIMIT 0x00000758 |
| |
| #define NVC0_COMPUTE_LOCAL_BASE 0x0000077c |
| |
| #define NVC0_COMPUTE_GRIDID 0x00000780 |
| |
| #define NVC0_COMPUTE_TEMP_ADDRESS_HIGH 0x00000790 |
| |
| #define NVC0_COMPUTE_TEMP_ADDRESS_LOW 0x00000794 |
| |
| #define NVC0_COMPUTE_TEMP_SIZE_HIGH 0x00000798 |
| |
| #define NVC0_COMPUTE_TEMP_SIZE_LOW 0x0000079c |
| |
| #define NVC0_COMPUTE_WARP_TEMP_ALLOC 0x000007a0 |
| |
| #define NVC0_COMPUTE_COMPUTE_END 0x00000a04 |
| #define NVC0_COMPUTE_COMPUTE_END_UNK0 0x00000001 |
| |
| #define NVC0_COMPUTE_UNK0A08 0x00000a08 |
| |
| #define NVC0_COMPUTE_CALL_LIMIT_LOG 0x00000d64 |
| |
| #define NVC0_COMPUTE_UNK0D94 0x00000d94 |
| |
| #define NVC0_COMPUTE_WATCHDOG_TIMER 0x00000de4 |
| |
| #define NVC0_COMPUTE_UNK10F4 0x000010f4 |
| #define NVC0_COMPUTE_UNK10F4_UNK0 0x00000001 |
| #define NVC0_COMPUTE_UNK10F4_UNK4 0x00000010 |
| #define NVC0_COMPUTE_UNK10F4_UNK8 0x00000100 |
| |
| #define NVC0_COMPUTE_LINKED_TSC 0x00001234 |
| |
| #define NVC0_COMPUTE_UNK1288_TIC_FLUSH 0x00001288 |
| |
| #define NVC0_COMPUTE_UNK12AC 0x000012ac |
| |
| #define NVC0_COMPUTE_TSC_FLUSH 0x00001330 |
| #define NVC0_COMPUTE_TSC_FLUSH_SPECIFIC 0x00000001 |
| #define NVC0_COMPUTE_TSC_FLUSH_ENTRY__MASK 0x03fffff0 |
| #define NVC0_COMPUTE_TSC_FLUSH_ENTRY__SHIFT 4 |
| |
| #define NVC0_COMPUTE_TIC_FLUSH 0x00001334 |
| #define NVC0_COMPUTE_TIC_FLUSH_SPECIFIC 0x00000001 |
| #define NVC0_COMPUTE_TIC_FLUSH_ENTRY__MASK 0x03fffff0 |
| #define NVC0_COMPUTE_TIC_FLUSH_ENTRY__SHIFT 4 |
| |
| #define NVC0_COMPUTE_TEX_CACHE_CTL 0x00001338 |
| #define NVC0_COMPUTE_TEX_CACHE_CTL_UNK0__MASK 0x00000007 |
| #define NVC0_COMPUTE_TEX_CACHE_CTL_UNK0__SHIFT 0 |
| #define NVC0_COMPUTE_TEX_CACHE_CTL_ENTRY__MASK 0x03fffff0 |
| #define NVC0_COMPUTE_TEX_CACHE_CTL_ENTRY__SHIFT 4 |
| |
| #define NVC0_COMPUTE_UNK1354 0x00001354 |
| |
| #define NVC0_COMPUTE_UNK1424_TSC_FLUSH 0x00001424 |
| |
| #define NVC0_COMPUTE_COND_ADDRESS_HIGH 0x00001550 |
| |
| #define NVC0_COMPUTE_COND_ADDRESS_LOW 0x00001554 |
| |
| #define NVC0_COMPUTE_COND_MODE 0x00001558 |
| #define NVC0_COMPUTE_COND_MODE_NEVER 0x00000000 |
| #define NVC0_COMPUTE_COND_MODE_ALWAYS 0x00000001 |
| #define NVC0_COMPUTE_COND_MODE_RES_NON_ZERO 0x00000002 |
| #define NVC0_COMPUTE_COND_MODE_EQUAL 0x00000003 |
| #define NVC0_COMPUTE_COND_MODE_NOT_EQUAL 0x00000004 |
| |
| #define NVC0_COMPUTE_TSC_ADDRESS_HIGH 0x0000155c |
| |
| #define NVC0_COMPUTE_TSC_ADDRESS_LOW 0x00001560 |
| |
| #define NVC0_COMPUTE_TSC_LIMIT 0x00001564 |
| |
| #define NVC0_COMPUTE_TIC_ADDRESS_HIGH 0x00001574 |
| |
| #define NVC0_COMPUTE_TIC_ADDRESS_LOW 0x00001578 |
| |
| #define NVC0_COMPUTE_TIC_LIMIT 0x0000157c |
| |
| #define NVC0_COMPUTE_CODE_ADDRESS_HIGH 0x00001608 |
| |
| #define NVC0_COMPUTE_CODE_ADDRESS_LOW 0x0000160c |
| |
| #define NVC0_COMPUTE_TEX_MISC 0x00001664 |
| #define NVC0_COMPUTE_TEX_MISC_UNK 0x00000001 |
| #define NVC0_COMPUTE_TEX_MISC_SEAMLESS_CUBE_MAP 0x00000002 |
| |
| #define NVC0_COMPUTE_UNK1690 0x00001690 |
| #define NVC0_COMPUTE_UNK1690_ALWAYS_DERIV 0x00000001 |
| #define NVC0_COMPUTE_UNK1690_UNK16 0x00010000 |
| |
| #define NVC0_COMPUTE_CB_BIND 0x00001694 |
| #define NVC0_COMPUTE_CB_BIND_VALID 0x00000001 |
| #define NVC0_COMPUTE_CB_BIND_INDEX__MASK 0x00001f00 |
| #define NVC0_COMPUTE_CB_BIND_INDEX__SHIFT 8 |
| |
| #define NVC0_COMPUTE_FLUSH 0x00001698 |
| #define NVC0_COMPUTE_FLUSH_CODE 0x00000001 |
| #define NVC0_COMPUTE_FLUSH_GLOBAL 0x00000010 |
| #define NVC0_COMPUTE_FLUSH_UNK8 0x00000100 |
| #define NVC0_COMPUTE_FLUSH_CB 0x00001000 |
| |
| #define NVC0_COMPUTE_UNK1930 0x00001930 |
| |
| #define NVC0_COMPUTE_UNK1944 0x00001944 |
| |
| #define NVC0_COMPUTE_DELAY 0x00001a24 |
| |
| #define NVC0_COMPUTE_UNK1A2C(i0) (0x00001a2c + 0x4*(i0)) |
| #define NVC0_COMPUTE_UNK1A2C__ESIZE 0x00000004 |
| #define NVC0_COMPUTE_UNK1A2C__LEN 0x00000005 |
| |
| #define NVC0_COMPUTE_QUERY_ADDRESS_HIGH 0x00001b00 |
| |
| #define NVC0_COMPUTE_QUERY_ADDRESS_LOW 0x00001b04 |
| |
| #define NVC0_COMPUTE_QUERY_SEQUENCE 0x00001b08 |
| |
| #define NVC0_COMPUTE_QUERY_GET 0x00001b0c |
| #define NVC0_COMPUTE_QUERY_GET_MODE__MASK 0x00000003 |
| #define NVC0_COMPUTE_QUERY_GET_MODE__SHIFT 0 |
| #define NVC0_COMPUTE_QUERY_GET_MODE_WRITE 0x00000000 |
| #define NVC0_COMPUTE_QUERY_GET_MODE_WRITE_INTR_NRHOST 0x00000003 |
| #define NVC0_COMPUTE_QUERY_GET_INTR 0x00100000 |
| #define NVC0_COMPUTE_QUERY_GET_SHORT 0x10000000 |
| |
| #define NVC0_COMPUTE_CB_SIZE 0x00002380 |
| |
| #define NVC0_COMPUTE_CB_ADDRESS_HIGH 0x00002384 |
| |
| #define NVC0_COMPUTE_CB_ADDRESS_LOW 0x00002388 |
| |
| #define NVC0_COMPUTE_CB_POS 0x0000238c |
| |
| #define NVC0_COMPUTE_CB_DATA(i0) (0x00002390 + 0x4*(i0)) |
| #define NVC0_COMPUTE_CB_DATA__ESIZE 0x00000004 |
| #define NVC0_COMPUTE_CB_DATA__LEN 0x00000010 |
| |
| #define NVC0_COMPUTE_IMAGE(i0) (0x00002700 + 0x20*(i0)) |
| #define NVC0_COMPUTE_IMAGE__ESIZE 0x00000020 |
| #define NVC0_COMPUTE_IMAGE__LEN 0x00000008 |
| |
| #define NVC0_COMPUTE_IMAGE_ADDRESS_HIGH(i0) (0x00002700 + 0x20*(i0)) |
| |
| #define NVC0_COMPUTE_IMAGE_ADDRESS_LOW(i0) (0x00002704 + 0x20*(i0)) |
| |
| #define NVC0_COMPUTE_IMAGE_WIDTH(i0) (0x00002708 + 0x20*(i0)) |
| |
| #define NVC0_COMPUTE_IMAGE_HEIGHT(i0) (0x0000270c + 0x20*(i0)) |
| #define NVC0_COMPUTE_IMAGE_HEIGHT_HEIGHT__MASK 0x0000ffff |
| #define NVC0_COMPUTE_IMAGE_HEIGHT_HEIGHT__SHIFT 0 |
| #define NVC0_COMPUTE_IMAGE_HEIGHT_UNK16 0x00010000 |
| #define NVC0_COMPUTE_IMAGE_HEIGHT_LINEAR 0x00100000 |
| |
| #define NVC0_COMPUTE_IMAGE_FORMAT(i0) (0x00002710 + 0x20*(i0)) |
| #define NVC0_COMPUTE_IMAGE_FORMAT_UNK0 0x00000001 |
| #define NVC0_COMPUTE_IMAGE_FORMAT_FORMAT_COLOR__MASK 0x00000ff0 |
| #define NVC0_COMPUTE_IMAGE_FORMAT_FORMAT_COLOR__SHIFT 4 |
| #define NVC0_COMPUTE_IMAGE_FORMAT_FORMAT_ZETA__MASK 0x0001f000 |
| #define NVC0_COMPUTE_IMAGE_FORMAT_FORMAT_ZETA__SHIFT 12 |
| |
| #define NVC0_COMPUTE_IMAGE_TILE_MODE(i0) (0x00002714 + 0x20*(i0)) |
| |
| #define NVC0_COMPUTE_MP_PM_SET(i0) (0x0000335c + 0x4*(i0)) |
| #define NVC0_COMPUTE_MP_PM_SET__ESIZE 0x00000004 |
| #define NVC0_COMPUTE_MP_PM_SET__LEN 0x00000008 |
| |
| #define NVC0_COMPUTE_MP_PM_SIGSEL(i0) (0x0000337c + 0x4*(i0)) |
| #define NVC0_COMPUTE_MP_PM_SIGSEL__ESIZE 0x00000004 |
| #define NVC0_COMPUTE_MP_PM_SIGSEL__LEN 0x00000008 |
| |
| #define NVC0_COMPUTE_MP_PM_SRCSEL(i0) (0x0000339c + 0x4*(i0)) |
| #define NVC0_COMPUTE_MP_PM_SRCSEL__ESIZE 0x00000004 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL__LEN 0x00000008 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_GRP0__MASK 0x00000007 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_GRP0__SHIFT 0 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_SIG0__MASK 0x00000070 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_SIG0__SHIFT 4 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_GRP1__MASK 0x00000700 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_GRP1__SHIFT 8 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_SIG1__MASK 0x00007000 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_SIG1__SHIFT 12 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_GRP2__MASK 0x00070000 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_GRP2__SHIFT 16 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_SIG2__MASK 0x00700000 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_SIG2__SHIFT 20 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_GRP3__MASK 0x07000000 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_GRP3__SHIFT 24 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_SIG3__MASK 0x70000000 |
| #define NVC0_COMPUTE_MP_PM_SRCSEL_SIG3__SHIFT 28 |
| |
| #define NVC0_COMPUTE_MP_PM_OP(i0) (0x000033bc + 0x4*(i0)) |
| #define NVC0_COMPUTE_MP_PM_OP__ESIZE 0x00000004 |
| #define NVC0_COMPUTE_MP_PM_OP__LEN 0x00000008 |
| #define NVC0_COMPUTE_MP_PM_OP_MODE__MASK 0x00000001 |
| #define NVC0_COMPUTE_MP_PM_OP_MODE__SHIFT 0 |
| #define NVC0_COMPUTE_MP_PM_OP_MODE_LOGOP 0x00000000 |
| #define NVC0_COMPUTE_MP_PM_OP_MODE_LOGOP_PULSE 0x00000001 |
| #define NVC0_COMPUTE_MP_PM_OP_FUNC__MASK 0x000ffff0 |
| #define NVC0_COMPUTE_MP_PM_OP_FUNC__SHIFT 4 |
| |
| #define NVC0_COMPUTE_MP_PM_UNK33DC 0x000033dc |
| |
| |
| #endif /* NVC0_COMPUTE_XML */ |
