| commit | 26052805305f1f9dcbf3ab4102eb6b2372eb8dce | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Wed Feb 26 23:13:59 2020 -0500 |
| committer | Matt Arsenault <arsenm2@gmail.com> | Tue Jul 02 17:12:54 2024 +0200 |
| tree | 9fb6b343d00bcd1006b4c4c0f2b73eb46072e28c | |
| parent | e10d4e81ac6a2136f203252f765a1421a8ddb798 [diff] |
GlobalISel: Use G_UADDE when narrowing G_UMULH This greatly shrinks the AMDGPU div64 expansion. Instead of adding a zext of the condition output, add a zero and use the carry in to G_UADDE. This is closer to how the DAG expansion using umulh does it, and it seems more natural to leave the boolean output as a boolean input. We should have a combine to form G_UADDE from this pattern, but the legalizer shouldn't create extra work for the combiner if it can help it. The Mips cases are regressions, but the DAG lowering for muli128 seems to not use the expansion involving MULHU/MULHS at all. The DAG output is radically different than GlobalISel as-is, so it seems like Mips should be using a different legalization strategy here to begin with. The RISCV legalizer tests look worse for the mul i96 case, but those didn't exist when I wrote this patch and forgot about it 4 years ago, so I haven't really looked into why. We've entered the age where most tests should just be using IR, so I don't know if this matters or not (the IR mul test doesn't seem to cover i96)
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