llvm/test/CodeGen/X86/pr138982.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64 -mattr=+fma | FileCheck %s

define <4 x float> @pr138982(<4 x float> %in_vec) {
; CHECK-LABEL: pr138982:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vxorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
; CHECK-NEXT:    vrcpps %xmm0, %xmm2
; CHECK-NEXT:    vrcpps %xmm1, %xmm1
; CHECK-NEXT:    vxorps %xmm3, %xmm3, %xmm3
; CHECK-NEXT:    vcmpneqps %xmm0, %xmm3, %xmm0
; CHECK-NEXT:    vbroadcastss {{.*#+}} xmm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; CHECK-NEXT:    vblendvps %xmm0, %xmm1, %xmm4, %xmm0
; CHECK-NEXT:    vfnmadd231ps {{.*#+}} xmm0 = -(xmm3 * xmm2) + xmm0
; CHECK-NEXT:    retq
entry:
  %fneg = fneg <4 x float> %in_vec
  %rcp = tail call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %fneg)
  %cmp = fcmp une <4 x float> zeroinitializer, %in_vec
  %sel = select <4 x i1> %cmp, <4 x float> %rcp, <4 x float> splat (float 1.000000e+00)
  %fma = call nsz <4 x float> @llvm.fma.v4f32(<4 x float> %rcp, <4 x float> zeroinitializer, <4 x float> %sel)
  ret <4 x float> %fma
}