commit | c0333ceb38fb63fa8da856f0fad065a4b5409fa1 | [log] [tgz] |
---|---|---|
author | Craig Topper <craig.topper@intel.com> | Sun Jan 13 02:59:59 2019 +0000 |
committer | Craig Topper <craig.topper@intel.com> | Sun Jan 13 02:59:59 2019 +0000 |
tree | 08a287dc30199edb55783b12ca359f3c6270fb30 | |
parent | 875fba9e9cf5e250fda51f5f5ac059a8b41e96ae [diff] |
[X86] Add more ISD nodes to handle masked versions of VCVT(T)PD2DQZ128/VCVT(T)PD2UDQZ128 which only produce 2 result elements and zeroes the upper elements. We can't represent this properly with vselect like we normally do. We also have to update the instruction definition to use a VK2WM mask instead of VK4WM to represent this. Fixes another case from PR34877