[AMDGPU] Divergence driven ISel. Assign register class for cross block values according to the divergence.

    Details: To make instruction selection really divergence driven it is necessary to assign
             the correct register classes to the cross block values beforehand. For the divergent targets
             same value type requires different register classes dependent on the value divergence.

    Reviewers: rampitec, nhaehnle

    Differential Revision: https://reviews.llvm.org/D59990

    This commit was reverted because of the build failure.
    The reason was mlformed patch.
    Build failure fixed.

llvm-svn: 361741
49 files changed
tree: 688b9be43648fbc0f5c07b422b417ef8b69353b3
  1. clang/
  2. clang-tools-extra/
  3. compiler-rt/
  4. debuginfo-tests/
  5. libclc/
  6. libcxx/
  7. libcxxabi/
  8. libunwind/
  9. lld/
  10. lldb/
  11. llgo/
  12. llvm/
  13. openmp/
  14. parallel-libs/
  15. polly/
  16. pstl/
  17. .arcconfig
  18. .clang-format
  19. .clang-tidy
  20. .gitignore
  21. README.md
README.md

The LLVM Compiler Infrastructure

This directory and its subdirectories contain source code for LLVM, a toolkit for the construction of highly optimized compilers, optimizers, and runtime environments.