commit: 8dbc6398e17a957db0cfc4fc95d2d2d1517a3ed0
[log]
author: Alex Bradbury <asb@lowrisc.org>
Thu Mar 14 08:28:48 2019 +0000
committer: Alex Bradbury <asb@lowrisc.org>
Thu Mar 14 08:28:48 2019 +0000
tree: f50270fa31472f9dcfbea9a57f5c39197cb6dd29
parent: d08ed38e084b84db952b3c21fa759a81397675fb [diff]

[RISCV][NFC] Rename callee saved regs 'CSR' to CSR_ILP32_LP64 and minor RISCVRegisterInfo refactoring

The CSR renaming further prepares the way for an upcoming patch adding support for more
RISC-V ABIs.

Modify RISCVRegisterInfo::getCalleeSavedRegs and
RISCVRegisterInfo::getReservedRegs to do MF->getSubtarget<RISCVSubtarget>()
once rather than multiple times.

llvm-svn: 356123

llvm/lib/Target/RISCV/RISCVCallingConv.td[diff]
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp[diff]

2 files changed

tree: f50270fa31472f9dcfbea9a57f5c39197cb6dd29

clang/
clang-tools-extra/
compiler-rt/
debuginfo-tests/
libclc/
libcxx/
libcxxabi/
libunwind/
lld/
lldb/
llgo/
llvm/
openmp/
parallel-libs/
polly/
pstl/
.arcconfig
.clang-format
.clang-tidy
README.md

README.md

The LLVM Compiler Infrastructure

This directory and its subdirectories contain source code for LLVM, a toolkit for the construction of highly optimized compilers, optimizers, and runtime environments.