commit | fa16ddbb9fbee36d67d8496fc9389ea95930b238 | [log] [tgz] |
---|---|---|
author | Frank Barchard <fbarchard@google.com> | Tue Jul 02 10:39:04 2024 -0700 |
committer | Frank Barchard <fbarchard@google.com> | Tue Jul 02 18:10:56 2024 +0000 |
tree | 6124fb32d4222bc4d75bb4e4019ba6774643138d | |
parent | 616bee5420b62a7be09fda0252034e8be85f91b0 [diff] |
cpuid show vector length on ARM and RISCV - additional asm volatile changes from github - rotate mips remove C function - moved to common Run on Samsung S22 [ RUN ] LibYUVBaseTest.TestCpuHas Kernel Version 5.10 Has Arm 0x2 Has Neon 0x4 Has Neon DotProd 0x10 Has Neon I8MM 0x20 Has SVE 0x40 Has SVE2 0x80 Has SME 0x0 SVE vector length: 16 bytes [ OK ] LibYUVBaseTest.TestCpuHas (0 ms) [ RUN ] LibYUVBaseTest.TestCompilerMacros __ATOMIC_RELAXED 0 __cplusplus 201703 __clang_major__ 17 __clang_minor__ 0 __GNUC__ 4 __GNUC_MINOR__ 2 __aarch64__ 1 __clang__ 1 __llvm__ 1 __pic__ 2 INT_TYPES_DEFINED __has_feature Run on RISCV qemu emulating SiFive X280: [ RUN ] LibYUVBaseTest.TestCpuHas Kernel Version 6.6 Has RISCV 0x10000000 Has RVV 0x20000000 RVV vector length: 64 bytes [ OK ] LibYUVBaseTest.TestCpuHas (4 ms) [ RUN ] LibYUVBaseTest.TestCompilerMacros __ATOMIC_RELAXED 0 __cplusplus 202002 __clang_major__ 9999 __clang_minor__ 0 __GNUC__ 4 __GNUC_MINOR__ 2 __riscv 1 __riscv_vector 1 __riscv_v_intrinsic 12000 __riscv_zve64x 1000000 __clang__ 1 __llvm__ 1 __pic__ 2 INT_TYPES_DEFINED __has_feature Bug: b/42280943 Change-Id: I53cf0450be4965a28942e113e4c77295ace70999 Reviewed-on: https://chromium-review.googlesource.com/c/libyuv/libyuv/+/5672088 Reviewed-by: David Gao <davidgao@google.com>
libyuv is an open source project that includes YUV scaling and conversion functionality.
See Getting started for instructions on how to get started developing.
You can also browse the docs directory for more documentation.