/*************************************************************************/ /*!
@File
@Title          arm specific OS functions
@Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description    OS functions who's implementation are processor specific
@License        MIT

The contents of this file are subject to the MIT license as set out below.

Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.

This License is also included in this distribution in the file called
"MIT-COPYING".

EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/

#include <zircon/syscalls.h>

extern "C" {
#include "img_types.h"
#include "osfunc.h"
#include "pvrsrv_error.h"
}

#if defined(CONFIG_OUTER_CACHE)
/* If you encounter a 64-bit ARM system with an outer cache, you'll need
   * to add the necessary code to manage that cache. See osfunc_arm.c
   * for an example of how to do so.
   */
#error "CONFIG_OUTER_CACHE not supported on arm64."
#endif

#define NOT_IMPLEMENTED() fprintf(stderr, "msd-img-rgx-mtk: Not implemented in %s:%s:%d\n", __func__, __FILE__, __LINE__);

PVRSRV_ERROR
OSCPUOperation(PVRSRV_CACHE_OP uiCacheOp)
{
	// Zircon doesn't support doing a global cache flush. If this returns not
	// supported, the client can handle flushing individual cache lines.
	return PVRSRV_ERROR_NOT_SUPPORTED;
}

void
OSCPUCacheFlushRangeKM(PVRSRV_DEVICE_NODE *psDevNode,
		       void *pvVirtStart,
		       void *pvVirtEnd,
		       IMG_CPU_PHYADDR sCPUPhysStart,
		       IMG_CPU_PHYADDR sCPUPhysEnd)
{
	uintptr_t size = reinterpret_cast<uintptr_t>(pvVirtEnd) - reinterpret_cast<uintptr_t>(pvVirtStart);
	zx_cache_flush(pvVirtStart, size, ZX_CACHE_FLUSH_DATA | ZX_CACHE_FLUSH_INVALIDATE);
}

void
OSCPUCacheCleanRangeKM(PVRSRV_DEVICE_NODE *psDevNode,
		       void *pvVirtStart,
		       void *pvVirtEnd,
		       IMG_CPU_PHYADDR sCPUPhysStart,
		       IMG_CPU_PHYADDR sCPUPhysEnd)
{
	uintptr_t size = reinterpret_cast<uintptr_t>(pvVirtEnd) - reinterpret_cast<uintptr_t>(pvVirtStart);
	zx_cache_flush(pvVirtStart, size, ZX_CACHE_FLUSH_DATA);
}

void
OSCPUCacheInvalidateRangeKM(PVRSRV_DEVICE_NODE *psDevNode,
			    void *pvVirtStart,
			    void *pvVirtEnd,
			    IMG_CPU_PHYADDR sCPUPhysStart,
			    IMG_CPU_PHYADDR sCPUPhysEnd)
{
	// Pure invalidate isn't possible without a VMO handle and access to kernel
	// mode, so hopefully clean + invalidate is ok. It normally should work,
	// since the CPU can clean the cache whenever it wants to.
	uintptr_t size = reinterpret_cast<uintptr_t>(pvVirtEnd) - reinterpret_cast<uintptr_t>(pvVirtStart);
	zx_cache_flush(pvVirtStart, size, ZX_CACHE_FLUSH_DATA | ZX_CACHE_FLUSH_INVALIDATE);
}

PVRSRV_CACHE_OP_ADDR_TYPE
OSCPUCacheOpAddressType(void)
{
	return PVRSRV_CACHE_OP_ADDR_TYPE_VIRTUAL;
}

void
OSUserModeAccessToPerfCountersEn(void)
{
	NOT_IMPLEMENTED();
	/* FIXME: implement similarly to __arm__ */
}