diff --git a/SPIRV/GlslangToSpv.cpp b/SPIRV/GlslangToSpv.cpp
index 5c00024..3d0d65e 100755
--- a/SPIRV/GlslangToSpv.cpp
+++ b/SPIRV/GlslangToSpv.cpp
@@ -1825,6 +1825,12 @@
         unsigned int member = node->getOperand()->getAsBinaryNode()->getRight()->getAsConstantUnion()->getConstArray()[0].getUConst();
         spv::Id length = builder.createArrayLength(builder.accessChainGetLValue(), member);
 
+        // GLSL semantics say the result of .length() is an int, while SPIR-V says
+        // signedness must be 0. So, convert from SPIR-V unsigned back to GLSL's
+        // AST expectation of a signed result.
+        if (glslangIntermediate->getSource() == glslang::EShSourceGlsl)
+            length = builder.createUnaryOp(spv::OpBitcast, builder.makeIntType(32), length);
+
         builder.clearAccessChain();
         builder.setAccessChainRValue(length);
 
diff --git a/SPIRV/SpvBuilder.cpp b/SPIRV/SpvBuilder.cpp
old mode 100644
new mode 100755
index 8755d9e..951d104
--- a/SPIRV/SpvBuilder.cpp
+++ b/SPIRV/SpvBuilder.cpp
@@ -1293,7 +1293,7 @@
 
 Id Builder::createArrayLength(Id base, unsigned int member)
 {
-    spv::Id intType = makeIntType(32);
+    spv::Id intType = makeUintType(32);
     Instruction* length = new Instruction(getUniqueId(), intType, OpArrayLength);
     length->addIdOperand(base);
     length->addImmediateOperand(member);
diff --git a/Test/baseResults/hlsl.structbuffer.byte.frag.out b/Test/baseResults/hlsl.structbuffer.byte.frag.out
index 49958a6..a23ccd2 100644
--- a/Test/baseResults/hlsl.structbuffer.byte.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.byte.frag.out
@@ -323,10 +323,6 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 0:?     'pos' (layout( location=0) flat in uint)
 
-error: SPIRV-Tools Validation Errors
-error: OpStore Pointer <id> '14[size]'s type does not match Object <id> '20's type.
-  OpStore %size %20
-
 // Module Version 10000
 // Generated by (magic number): 80007
 // Id's are bound by 114
@@ -370,13 +366,13 @@
         16(sbuf):             TypeStruct 15
               17:             TypePointer Uniform 16(sbuf)
         18(sbuf):     17(ptr) Variable Uniform
-              19:             TypeInt 32 1
-              21:     19(int) Constant 0
-              23:     19(int) Constant 2
+              20:             TypeInt 32 1
+              21:     20(int) Constant 0
+              23:     20(int) Constant 2
               25:             TypePointer Uniform 6(int)
-              29:             TypePointer Function 19(int)
+              29:             TypePointer Function 20(int)
               32:      6(int) Constant 4
-              39:     19(int) Constant 1
+              39:     20(int) Constant 1
               43:             TypeVector 6(int) 2
               45:             TypeVector 8(float) 2
               47:    8(float) Constant 0
@@ -384,7 +380,7 @@
               69:             TypeVector 6(int) 3
               71:             TypeVector 8(float) 3
               80:      6(int) Constant 12
-              95:     19(int) Constant 3
+              95:     20(int) Constant 3
               99:             TypeVector 6(int) 4
              106:             TypePointer Input 6(int)
         107(pos):    106(ptr) Variable Input
@@ -409,22 +405,22 @@
 30(byteAddrTemp):     29(ptr) Variable Function
 53(byteAddrTemp):     29(ptr) Variable Function
 78(byteAddrTemp):     29(ptr) Variable Function
-              20:     19(int) ArrayLength 18(sbuf) 0
-                              Store 14(size) 20
+              19:      6(int) ArrayLength 18(sbuf) 0
+                              Store 14(size) 19
               22:      6(int) Load 11(pos)
-              24:     19(int) ShiftRightLogical 22 23
+              24:     20(int) ShiftRightLogical 22 23
               26:     25(ptr) AccessChain 18(sbuf) 21 24
               27:      6(int) Load 26
               28:    8(float) ConvertUToF 27
               31:      6(int) Load 11(pos)
               33:      6(int) IAdd 31 32
-              34:     19(int) ShiftRightLogical 33 23
+              34:     20(int) ShiftRightLogical 33 23
                               Store 30(byteAddrTemp) 34
-              35:     19(int) Load 30(byteAddrTemp)
+              35:     20(int) Load 30(byteAddrTemp)
               36:     25(ptr) AccessChain 18(sbuf) 21 35
               37:      6(int) Load 36
-              38:     19(int) Load 30(byteAddrTemp)
-              40:     19(int) IAdd 38 39
+              38:     20(int) Load 30(byteAddrTemp)
+              40:     20(int) IAdd 38 39
               41:     25(ptr) AccessChain 18(sbuf) 21 40
               42:      6(int) Load 41
               44:   43(ivec2) CompositeConstruct 37 42
@@ -436,17 +432,17 @@
               52:    9(fvec4) FAdd 51 50
               54:      6(int) Load 11(pos)
               56:      6(int) IAdd 54 55
-              57:     19(int) ShiftRightLogical 56 23
+              57:     20(int) ShiftRightLogical 56 23
                               Store 53(byteAddrTemp) 57
-              58:     19(int) Load 53(byteAddrTemp)
+              58:     20(int) Load 53(byteAddrTemp)
               59:     25(ptr) AccessChain 18(sbuf) 21 58
               60:      6(int) Load 59
-              61:     19(int) Load 53(byteAddrTemp)
-              62:     19(int) IAdd 61 39
+              61:     20(int) Load 53(byteAddrTemp)
+              62:     20(int) IAdd 61 39
               63:     25(ptr) AccessChain 18(sbuf) 21 62
               64:      6(int) Load 63
-              65:     19(int) Load 53(byteAddrTemp)
-              66:     19(int) IAdd 65 23
+              65:     20(int) Load 53(byteAddrTemp)
+              66:     20(int) IAdd 65 23
               67:     25(ptr) AccessChain 18(sbuf) 21 66
               68:      6(int) Load 67
               70:   69(ivec3) CompositeConstruct 60 64 68
@@ -458,21 +454,21 @@
               77:    9(fvec4) FAdd 52 76
               79:      6(int) Load 11(pos)
               81:      6(int) IAdd 79 80
-              82:     19(int) ShiftRightLogical 81 23
+              82:     20(int) ShiftRightLogical 81 23
                               Store 78(byteAddrTemp) 82
-              83:     19(int) Load 78(byteAddrTemp)
+              83:     20(int) Load 78(byteAddrTemp)
               84:     25(ptr) AccessChain 18(sbuf) 21 83
               85:      6(int) Load 84
-              86:     19(int) Load 78(byteAddrTemp)
-              87:     19(int) IAdd 86 39
+              86:     20(int) Load 78(byteAddrTemp)
+              87:     20(int) IAdd 86 39
               88:     25(ptr) AccessChain 18(sbuf) 21 87
               89:      6(int) Load 88
-              90:     19(int) Load 78(byteAddrTemp)
-              91:     19(int) IAdd 90 23
+              90:     20(int) Load 78(byteAddrTemp)
+              91:     20(int) IAdd 90 23
               92:     25(ptr) AccessChain 18(sbuf) 21 91
               93:      6(int) Load 92
-              94:     19(int) Load 78(byteAddrTemp)
-              96:     19(int) IAdd 94 95
+              94:     20(int) Load 78(byteAddrTemp)
+              96:     20(int) IAdd 94 95
               97:     25(ptr) AccessChain 18(sbuf) 21 96
               98:      6(int) Load 97
              100:   99(ivec4) CompositeConstruct 85 89 93 98
diff --git a/Test/baseResults/hlsl.structbuffer.coherent.frag.out b/Test/baseResults/hlsl.structbuffer.coherent.frag.out
index 1d11b64..738e13d 100644
--- a/Test/baseResults/hlsl.structbuffer.coherent.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.coherent.frag.out
@@ -175,10 +175,6 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 0:?     'pos' (layout( location=0) flat in uint)
 
-error: SPIRV-Tools Validation Errors
-error: OpStore Pointer <id> '26[size]'s type does not match Object <id> '33's type.
-  OpStore %size %33
-
 // Module Version 10000
 // Generated by (magic number): 80007
 // Id's are bound by 78
@@ -276,7 +272,7 @@
               22:      6(int) IAdd 20 21
               25:     24(ptr) AccessChain 17(sbuf2) 19 22
                               Store 25 23
-              33:     18(int) ArrayLength 32(sbuf) 0
+              33:      6(int) ArrayLength 32(sbuf) 0
                               Store 26(size) 33
                               Store 34(stride) 35
               36:      6(int) Load 11(pos)
diff --git a/Test/baseResults/hlsl.structbuffer.frag.out b/Test/baseResults/hlsl.structbuffer.frag.out
index e058d11..af76bfb 100644
--- a/Test/baseResults/hlsl.structbuffer.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.frag.out
@@ -187,10 +187,6 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 0:?     'pos' (layout( location=0) flat in uint)
 
-error: SPIRV-Tools Validation Errors
-error: OpStore Pointer <id> '43[size]'s type does not match Object <id> '44's type.
-  OpStore %size %44
-
 // Module Version 10000
 // Generated by (magic number): 80007
 // Id's are bound by 96
@@ -312,7 +308,7 @@
               41:    15(bool) INotEqual 39 35
               42:     37(ptr) AccessChain 18(mydata) 40
                               Store 42 41
-              44:     24(int) ArrayLength 23(sbuf) 0
+              44:      6(int) ArrayLength 23(sbuf) 0
                               Store 43(size) 44
                               Store 45(stride) 46
               47:      6(int) Load 11(pos)
diff --git a/Test/baseResults/hlsl.structbuffer.rw.frag.out b/Test/baseResults/hlsl.structbuffer.rw.frag.out
index 7fbd150..13a5956 100644
--- a/Test/baseResults/hlsl.structbuffer.rw.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.rw.frag.out
@@ -175,10 +175,6 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 0:?     'pos' (layout( location=0) flat in uint)
 
-error: SPIRV-Tools Validation Errors
-error: OpStore Pointer <id> '26[size]'s type does not match Object <id> '33's type.
-  OpStore %size %33
-
 // Module Version 10000
 // Generated by (magic number): 80007
 // Id's are bound by 78
@@ -274,7 +270,7 @@
               22:      6(int) IAdd 20 21
               25:     24(ptr) AccessChain 17(sbuf2) 19 22
                               Store 25 23
-              33:     18(int) ArrayLength 32(sbuf) 0
+              33:      6(int) ArrayLength 32(sbuf) 0
                               Store 26(size) 33
                               Store 34(stride) 35
               36:      6(int) Load 11(pos)
diff --git a/Test/baseResults/hlsl.structbuffer.rwbyte.frag.out b/Test/baseResults/hlsl.structbuffer.rwbyte.frag.out
index ed27c89..690a0da 100644
--- a/Test/baseResults/hlsl.structbuffer.rwbyte.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.rwbyte.frag.out
@@ -1003,10 +1003,6 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 0:?     'pos' (layout( location=0) flat in uint)
 
-error: SPIRV-Tools Validation Errors
-error: OpStore Pointer <id> '14[size]'s type does not match Object <id> '20's type.
-  OpStore %size %20
-
 // Module Version 10000
 // Generated by (magic number): 80007
 // Id's are bound by 239
@@ -1053,18 +1049,18 @@
         16(sbuf):             TypeStruct 15
               17:             TypePointer Uniform 16(sbuf)
         18(sbuf):     17(ptr) Variable Uniform
-              19:             TypeInt 32 1
-              21:             TypePointer Function 19(int)
-              24:     19(int) Constant 2
-              26:     19(int) Constant 0
+              20:             TypeInt 32 1
+              21:             TypePointer Function 20(int)
+              24:     20(int) Constant 2
+              26:     20(int) Constant 0
               30:             TypePointer Uniform 6(int)
-              45:     19(int) Constant 1
+              45:     20(int) Constant 1
               49:             TypeVector 6(int) 2
               51:      6(int) Constant 0
               66:      6(int) Constant 1
               87:             TypeVector 6(int) 3
              125:      6(int) Constant 2
-             147:     19(int) Constant 3
+             147:     20(int) Constant 3
              151:             TypeVector 6(int) 4
              219:      6(int) Constant 3
              231:             TypePointer Input 6(int)
@@ -1094,46 +1090,46 @@
 73(byteAddrTemp):     21(ptr) Variable Function
 128(byteAddrTemp):     21(ptr) Variable Function
 132(byteAddrTemp):     21(ptr) Variable Function
-              20:     19(int) ArrayLength 18(sbuf) 0
-                              Store 14(size) 20
+              19:      6(int) ArrayLength 18(sbuf) 0
+                              Store 14(size) 19
               23:      6(int) Load 11(pos)
-              25:     19(int) ShiftRightLogical 23 24
+              25:     20(int) ShiftRightLogical 23 24
                               Store 22(byteAddrTemp) 25
-              27:     19(int) Load 22(byteAddrTemp)
+              27:     20(int) Load 22(byteAddrTemp)
               28:      6(int) Load 11(pos)
-              29:     19(int) ShiftRightLogical 28 24
+              29:     20(int) ShiftRightLogical 28 24
               31:     30(ptr) AccessChain 18(sbuf) 26 29
               32:      6(int) Load 31
               33:     30(ptr) AccessChain 18(sbuf) 26 27
                               Store 33 32
               35:      6(int) Load 11(pos)
-              36:     19(int) ShiftRightLogical 35 24
+              36:     20(int) ShiftRightLogical 35 24
                               Store 34(byteAddrTemp) 36
-              37:     19(int) Load 34(byteAddrTemp)
+              37:     20(int) Load 34(byteAddrTemp)
               39:      6(int) Load 11(pos)
-              40:     19(int) ShiftRightLogical 39 24
+              40:     20(int) ShiftRightLogical 39 24
                               Store 38(byteAddrTemp) 40
-              41:     19(int) Load 38(byteAddrTemp)
+              41:     20(int) Load 38(byteAddrTemp)
               42:     30(ptr) AccessChain 18(sbuf) 26 41
               43:      6(int) Load 42
-              44:     19(int) Load 38(byteAddrTemp)
-              46:     19(int) IAdd 44 45
+              44:     20(int) Load 38(byteAddrTemp)
+              46:     20(int) IAdd 44 45
               47:     30(ptr) AccessChain 18(sbuf) 26 46
               48:      6(int) Load 47
               50:   49(ivec2) CompositeConstruct 43 48
               52:      6(int) CompositeExtract 50 0
               53:     30(ptr) AccessChain 18(sbuf) 26 37
                               Store 53 52
-              54:     19(int) Load 34(byteAddrTemp)
-              55:     19(int) IAdd 54 45
+              54:     20(int) Load 34(byteAddrTemp)
+              55:     20(int) IAdd 54 45
               56:      6(int) Load 11(pos)
-              57:     19(int) ShiftRightLogical 56 24
+              57:     20(int) ShiftRightLogical 56 24
                               Store 38(byteAddrTemp) 57
-              58:     19(int) Load 38(byteAddrTemp)
+              58:     20(int) Load 38(byteAddrTemp)
               59:     30(ptr) AccessChain 18(sbuf) 26 58
               60:      6(int) Load 59
-              61:     19(int) Load 38(byteAddrTemp)
-              62:     19(int) IAdd 61 45
+              61:     20(int) Load 38(byteAddrTemp)
+              62:     20(int) IAdd 61 45
               63:     30(ptr) AccessChain 18(sbuf) 26 62
               64:      6(int) Load 63
               65:   49(ivec2) CompositeConstruct 60 64
@@ -1141,61 +1137,61 @@
               68:     30(ptr) AccessChain 18(sbuf) 26 55
                               Store 68 67
               70:      6(int) Load 11(pos)
-              71:     19(int) ShiftRightLogical 70 24
+              71:     20(int) ShiftRightLogical 70 24
                               Store 69(byteAddrTemp) 71
-              72:     19(int) Load 69(byteAddrTemp)
+              72:     20(int) Load 69(byteAddrTemp)
               74:      6(int) Load 11(pos)
-              75:     19(int) ShiftRightLogical 74 24
+              75:     20(int) ShiftRightLogical 74 24
                               Store 73(byteAddrTemp) 75
-              76:     19(int) Load 73(byteAddrTemp)
+              76:     20(int) Load 73(byteAddrTemp)
               77:     30(ptr) AccessChain 18(sbuf) 26 76
               78:      6(int) Load 77
-              79:     19(int) Load 73(byteAddrTemp)
-              80:     19(int) IAdd 79 45
+              79:     20(int) Load 73(byteAddrTemp)
+              80:     20(int) IAdd 79 45
               81:     30(ptr) AccessChain 18(sbuf) 26 80
               82:      6(int) Load 81
-              83:     19(int) Load 73(byteAddrTemp)
-              84:     19(int) IAdd 83 24
+              83:     20(int) Load 73(byteAddrTemp)
+              84:     20(int) IAdd 83 24
               85:     30(ptr) AccessChain 18(sbuf) 26 84
               86:      6(int) Load 85
               88:   87(ivec3) CompositeConstruct 78 82 86
               89:      6(int) CompositeExtract 88 0
               90:     30(ptr) AccessChain 18(sbuf) 26 72
                               Store 90 89
-              91:     19(int) Load 69(byteAddrTemp)
-              92:     19(int) IAdd 91 45
+              91:     20(int) Load 69(byteAddrTemp)
+              92:     20(int) IAdd 91 45
               93:      6(int) Load 11(pos)
-              94:     19(int) ShiftRightLogical 93 24
+              94:     20(int) ShiftRightLogical 93 24
                               Store 73(byteAddrTemp) 94
-              95:     19(int) Load 73(byteAddrTemp)
+              95:     20(int) Load 73(byteAddrTemp)
               96:     30(ptr) AccessChain 18(sbuf) 26 95
               97:      6(int) Load 96
-              98:     19(int) Load 73(byteAddrTemp)
-              99:     19(int) IAdd 98 45
+              98:     20(int) Load 73(byteAddrTemp)
+              99:     20(int) IAdd 98 45
              100:     30(ptr) AccessChain 18(sbuf) 26 99
              101:      6(int) Load 100
-             102:     19(int) Load 73(byteAddrTemp)
-             103:     19(int) IAdd 102 24
+             102:     20(int) Load 73(byteAddrTemp)
+             103:     20(int) IAdd 102 24
              104:     30(ptr) AccessChain 18(sbuf) 26 103
              105:      6(int) Load 104
              106:   87(ivec3) CompositeConstruct 97 101 105
              107:      6(int) CompositeExtract 106 1
              108:     30(ptr) AccessChain 18(sbuf) 26 92
                               Store 108 107
-             109:     19(int) Load 69(byteAddrTemp)
-             110:     19(int) IAdd 109 24
+             109:     20(int) Load 69(byteAddrTemp)
+             110:     20(int) IAdd 109 24
              111:      6(int) Load 11(pos)
-             112:     19(int) ShiftRightLogical 111 24
+             112:     20(int) ShiftRightLogical 111 24
                               Store 73(byteAddrTemp) 112
-             113:     19(int) Load 73(byteAddrTemp)
+             113:     20(int) Load 73(byteAddrTemp)
              114:     30(ptr) AccessChain 18(sbuf) 26 113
              115:      6(int) Load 114
-             116:     19(int) Load 73(byteAddrTemp)
-             117:     19(int) IAdd 116 45
+             116:     20(int) Load 73(byteAddrTemp)
+             117:     20(int) IAdd 116 45
              118:     30(ptr) AccessChain 18(sbuf) 26 117
              119:      6(int) Load 118
-             120:     19(int) Load 73(byteAddrTemp)
-             121:     19(int) IAdd 120 24
+             120:     20(int) Load 73(byteAddrTemp)
+             121:     20(int) IAdd 120 24
              122:     30(ptr) AccessChain 18(sbuf) 26 121
              123:      6(int) Load 122
              124:   87(ivec3) CompositeConstruct 115 119 123
@@ -1203,97 +1199,97 @@
              127:     30(ptr) AccessChain 18(sbuf) 26 110
                               Store 127 126
              129:      6(int) Load 11(pos)
-             130:     19(int) ShiftRightLogical 129 24
+             130:     20(int) ShiftRightLogical 129 24
                               Store 128(byteAddrTemp) 130
-             131:     19(int) Load 128(byteAddrTemp)
+             131:     20(int) Load 128(byteAddrTemp)
              133:      6(int) Load 11(pos)
-             134:     19(int) ShiftRightLogical 133 24
+             134:     20(int) ShiftRightLogical 133 24
                               Store 132(byteAddrTemp) 134
-             135:     19(int) Load 132(byteAddrTemp)
+             135:     20(int) Load 132(byteAddrTemp)
              136:     30(ptr) AccessChain 18(sbuf) 26 135
              137:      6(int) Load 136
-             138:     19(int) Load 132(byteAddrTemp)
-             139:     19(int) IAdd 138 45
+             138:     20(int) Load 132(byteAddrTemp)
+             139:     20(int) IAdd 138 45
              140:     30(ptr) AccessChain 18(sbuf) 26 139
              141:      6(int) Load 140
-             142:     19(int) Load 132(byteAddrTemp)
-             143:     19(int) IAdd 142 24
+             142:     20(int) Load 132(byteAddrTemp)
+             143:     20(int) IAdd 142 24
              144:     30(ptr) AccessChain 18(sbuf) 26 143
              145:      6(int) Load 144
-             146:     19(int) Load 132(byteAddrTemp)
-             148:     19(int) IAdd 146 147
+             146:     20(int) Load 132(byteAddrTemp)
+             148:     20(int) IAdd 146 147
              149:     30(ptr) AccessChain 18(sbuf) 26 148
              150:      6(int) Load 149
              152:  151(ivec4) CompositeConstruct 137 141 145 150
              153:      6(int) CompositeExtract 152 0
              154:     30(ptr) AccessChain 18(sbuf) 26 131
                               Store 154 153
-             155:     19(int) Load 128(byteAddrTemp)
-             156:     19(int) IAdd 155 45
+             155:     20(int) Load 128(byteAddrTemp)
+             156:     20(int) IAdd 155 45
              157:      6(int) Load 11(pos)
-             158:     19(int) ShiftRightLogical 157 24
+             158:     20(int) ShiftRightLogical 157 24
                               Store 132(byteAddrTemp) 158
-             159:     19(int) Load 132(byteAddrTemp)
+             159:     20(int) Load 132(byteAddrTemp)
              160:     30(ptr) AccessChain 18(sbuf) 26 159
              161:      6(int) Load 160
-             162:     19(int) Load 132(byteAddrTemp)
-             163:     19(int) IAdd 162 45
+             162:     20(int) Load 132(byteAddrTemp)
+             163:     20(int) IAdd 162 45
              164:     30(ptr) AccessChain 18(sbuf) 26 163
              165:      6(int) Load 164
-             166:     19(int) Load 132(byteAddrTemp)
-             167:     19(int) IAdd 166 24
+             166:     20(int) Load 132(byteAddrTemp)
+             167:     20(int) IAdd 166 24
              168:     30(ptr) AccessChain 18(sbuf) 26 167
              169:      6(int) Load 168
-             170:     19(int) Load 132(byteAddrTemp)
-             171:     19(int) IAdd 170 147
+             170:     20(int) Load 132(byteAddrTemp)
+             171:     20(int) IAdd 170 147
              172:     30(ptr) AccessChain 18(sbuf) 26 171
              173:      6(int) Load 172
              174:  151(ivec4) CompositeConstruct 161 165 169 173
              175:      6(int) CompositeExtract 174 1
              176:     30(ptr) AccessChain 18(sbuf) 26 156
                               Store 176 175
-             177:     19(int) Load 128(byteAddrTemp)
-             178:     19(int) IAdd 177 24
+             177:     20(int) Load 128(byteAddrTemp)
+             178:     20(int) IAdd 177 24
              179:      6(int) Load 11(pos)
-             180:     19(int) ShiftRightLogical 179 24
+             180:     20(int) ShiftRightLogical 179 24
                               Store 132(byteAddrTemp) 180
-             181:     19(int) Load 132(byteAddrTemp)
+             181:     20(int) Load 132(byteAddrTemp)
              182:     30(ptr) AccessChain 18(sbuf) 26 181
              183:      6(int) Load 182
-             184:     19(int) Load 132(byteAddrTemp)
-             185:     19(int) IAdd 184 45
+             184:     20(int) Load 132(byteAddrTemp)
+             185:     20(int) IAdd 184 45
              186:     30(ptr) AccessChain 18(sbuf) 26 185
              187:      6(int) Load 186
-             188:     19(int) Load 132(byteAddrTemp)
-             189:     19(int) IAdd 188 24
+             188:     20(int) Load 132(byteAddrTemp)
+             189:     20(int) IAdd 188 24
              190:     30(ptr) AccessChain 18(sbuf) 26 189
              191:      6(int) Load 190
-             192:     19(int) Load 132(byteAddrTemp)
-             193:     19(int) IAdd 192 147
+             192:     20(int) Load 132(byteAddrTemp)
+             193:     20(int) IAdd 192 147
              194:     30(ptr) AccessChain 18(sbuf) 26 193
              195:      6(int) Load 194
              196:  151(ivec4) CompositeConstruct 183 187 191 195
              197:      6(int) CompositeExtract 196 2
              198:     30(ptr) AccessChain 18(sbuf) 26 178
                               Store 198 197
-             199:     19(int) Load 128(byteAddrTemp)
-             200:     19(int) IAdd 199 147
+             199:     20(int) Load 128(byteAddrTemp)
+             200:     20(int) IAdd 199 147
              201:      6(int) Load 11(pos)
-             202:     19(int) ShiftRightLogical 201 24
+             202:     20(int) ShiftRightLogical 201 24
                               Store 132(byteAddrTemp) 202
-             203:     19(int) Load 132(byteAddrTemp)
+             203:     20(int) Load 132(byteAddrTemp)
              204:     30(ptr) AccessChain 18(sbuf) 26 203
              205:      6(int) Load 204
-             206:     19(int) Load 132(byteAddrTemp)
-             207:     19(int) IAdd 206 45
+             206:     20(int) Load 132(byteAddrTemp)
+             207:     20(int) IAdd 206 45
              208:     30(ptr) AccessChain 18(sbuf) 26 207
              209:      6(int) Load 208
-             210:     19(int) Load 132(byteAddrTemp)
-             211:     19(int) IAdd 210 24
+             210:     20(int) Load 132(byteAddrTemp)
+             211:     20(int) IAdd 210 24
              212:     30(ptr) AccessChain 18(sbuf) 26 211
              213:      6(int) Load 212
-             214:     19(int) Load 132(byteAddrTemp)
-             215:     19(int) IAdd 214 147
+             214:     20(int) Load 132(byteAddrTemp)
+             215:     20(int) IAdd 214 147
              216:     30(ptr) AccessChain 18(sbuf) 26 215
              217:      6(int) Load 216
              218:  151(ivec4) CompositeConstruct 205 209 213 217
@@ -1301,7 +1297,7 @@
              221:     30(ptr) AccessChain 18(sbuf) 26 200
                               Store 221 220
              222:      6(int) Load 11(pos)
-             223:     19(int) ShiftRightLogical 222 24
+             223:     20(int) ShiftRightLogical 222 24
              224:     30(ptr) AccessChain 18(sbuf) 26 223
              225:      6(int) Load 224
              226:    8(float) ConvertUToF 225
diff --git a/Test/baseResults/spv.310.comp.out b/Test/baseResults/spv.310.comp.out
index fd1309d..f4eaa20 100644
--- a/Test/baseResults/spv.310.comp.out
+++ b/Test/baseResults/spv.310.comp.out
@@ -1,14 +1,14 @@
 spv.310.comp
 // Module Version 10000
 // Generated by (magic number): 80007
-// Id's are bound by 71
+// Id's are bound by 72
 
                               Capability Shader
                               Capability DeviceGroup
                               Extension  "SPV_KHR_device_group"
                1:             ExtInstImport  "GLSL.std.450"
                               MemoryModel Logical GLSL450
-                              EntryPoint GLCompute 4  "main" 53 64
+                              EntryPoint GLCompute 4  "main" 53 65
                               ExecutionMode 4 LocalSize 16 32 4
                               Source ESSL 310
                               SourceExtension  "GL_EXT_device_group"
@@ -30,7 +30,7 @@
                               MemberName 48(outs) 1  "va"
                               Name 50  "outnames"
                               Name 53  "gl_LocalInvocationID"
-                              Name 64  "gl_DeviceIndex"
+                              Name 65  "gl_DeviceIndex"
                               Decorate 11 ArrayStride 16
                               MemberDecorate 12(outb) 0 Offset 0
                               MemberDecorate 12(outb) 1 Offset 4
@@ -48,8 +48,8 @@
                               Decorate 48(outs) BufferBlock
                               Decorate 50(outnames) DescriptorSet 0
                               Decorate 53(gl_LocalInvocationID) BuiltIn LocalInvocationId
-                              Decorate 64(gl_DeviceIndex) BuiltIn DeviceIndex
-                              Decorate 70 BuiltIn WorkgroupSize
+                              Decorate 65(gl_DeviceIndex) BuiltIn DeviceIndex
+                              Decorate 71 BuiltIn WorkgroupSize
                2:             TypeVoid
                3:             TypeFunction 2
                6:             TypeInt 32 0
@@ -89,15 +89,15 @@
               52:             TypePointer Input 51(ivec3)
 53(gl_LocalInvocationID):     52(ptr) Variable Input
               54:             TypePointer Input 6(int)
-              61:             TypePointer Uniform 15(int)
-              63:             TypePointer Input 15(int)
-64(gl_DeviceIndex):     63(ptr) Variable Input
-              65:      6(int) Constant 1
-              66:      6(int) Constant 3400
-              67:      6(int) Constant 16
-              68:      6(int) Constant 32
-              69:      6(int) Constant 4
-              70:   51(ivec3) ConstantComposite 67 68 69
+              62:             TypePointer Uniform 15(int)
+              64:             TypePointer Input 15(int)
+65(gl_DeviceIndex):     64(ptr) Variable Input
+              66:      6(int) Constant 1
+              67:      6(int) Constant 3400
+              68:      6(int) Constant 16
+              69:      6(int) Constant 32
+              70:      6(int) Constant 4
+              71:   51(ivec3) ConstantComposite 68 69 70
          4(main):           2 Function None 3
                5:             Label
                               ControlBarrier 7 7 8
@@ -124,10 +124,11 @@
               58:   22(fvec4) CompositeConstruct 57 57 57 57
               59:     29(ptr) AccessChain 50(outnames) 26 56
                               Store 59 58
-              60:     15(int) ArrayLength 14(outbname) 3
-              62:     61(ptr) AccessChain 50(outnames) 16
-                              Store 62 60
-                              MemoryBarrier 65 8
-                              MemoryBarrier 7 66
+              60:      6(int) ArrayLength 14(outbname) 3
+              61:     15(int) Bitcast 60
+              63:     62(ptr) AccessChain 50(outnames) 16
+                              Store 63 61
+                              MemoryBarrier 66 8
+                              MemoryBarrier 7 67
                               Return
                               FunctionEnd
diff --git a/glslang/Include/revision.h b/glslang/Include/revision.h
index eafb8f6..e0c42c8 100644
--- a/glslang/Include/revision.h
+++ b/glslang/Include/revision.h
@@ -1,3 +1,3 @@
 // This header is generated by the make-revision script.
 
-#define GLSLANG_PATCH_LEVEL 3006
+#define GLSLANG_PATCH_LEVEL 3009