tree b6329438b574cac1b5fbc1badf470cfd83c551d5
parent ff2cf8fafa5ad9a76e59fa086d969d4e2ecc3a39
author ShihPo Hung <shihpo.hung@sifive.com> 1617139815 -0700
committer Tom Stellard <tstellar@redhat.com> 1617139815 -0700

[RISCV][MC] Fix nf encoding for vector ld/st whole register

The three bit nf is one less than the number of NFIELDS,
so we manually decrement 1 for VS1/2/4/8R & VL1/2/4/8R.

Differential revision: https://reviews.llvm.org/D98185

(cherry picked from commit rG5cdb2e98608bf57c216ee7067e8a12d070c9e2bd)