)]}'
{
  "commit": "6eb10b5af424ebb18d4e30a4bbfaf8f304e68f60",
  "tree": "0aedd41daff4ad2b39c4ba832ab16c135be38d76",
  "parents": [
    "b2b23bfbb221870a308501d5f5839b59b3fb2370"
  ],
  "author": {
    "name": "jofrn",
    "email": "jofernau@amd.com",
    "time": "Sun Jun 01 16:23:26 2025 -0400"
  },
  "committer": {
    "name": "jofrn",
    "email": "jofernau@amd.com",
    "time": "Mon Jun 02 00:15:05 2025 -0400"
  },
  "message": "[X86] Cast atomic vectors in IR to support floats\n\nThis commit casts floats to ints in an atomic load during AtomicExpand to support\nfloating point types. It also is required to support 128 bit vectors in SSE/AVX.\n\ncommit-id:80b9b6a7\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "776d3c0a42e2f19ea4df8330587b430219de35da",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/X86/X86ISelLowering.cpp",
      "new_id": "3debf30da0a2975b9e89918a22100bfcea1e7641",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/X86/X86ISelLowering.cpp"
    },
    {
      "type": "modify",
      "old_id": "5cb6b3e493a3264fa6fb407b7335d192e3c4dcc5",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/X86/X86ISelLowering.h",
      "new_id": "43cddb2b53bd63cec42b7bb642d747d3993b18b4",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/X86/X86ISelLowering.h"
    },
    {
      "type": "modify",
      "old_id": "4b818b6cfa57e3478972e2c2add341f2116b078f",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/X86/atomic-load-store.ll",
      "new_id": "039edcbf83544c08879ec1428d0784f29841dd79",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/X86/atomic-load-store.ll"
    }
  ]
}