llvm/test/CodeGen/ARM/register-scavenger-exceptions.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -o - %s -run-pass=prologepilog | FileCheck %s

--- |
  target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
  target triple = "armv7--none-eabi"

  define hidden void @_Z3foov(i32 %P0, ...) {
  entry:
    %V1 = alloca [4075 x i8], align 8
    %tmp3 = alloca i8, i32 undef, align 8
    unreachable
  }

  declare dso_local void @_Z3barv() noreturn

...
---
# Check that the register scavenger does pick r5 (not preserved in prolog) for
# materialising a stack frame address when the function ends in throwing an
# exception.
name:            _Z3foov
stack:
  - { id: 0, name: V1, type: default, offset: 0, size: 5000, alignment: 8,
      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
      local-offset: -4080, debug-info-variable: '', debug-info-expression: '',
      debug-info-location: '' }
  - { id: 1, name: tmp3, type: variable-sized, offset: 0, alignment: 1,
      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
      local-offset: -4112, debug-info-variable: '', debug-info-expression: '',
      debug-info-location: '' }
  - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: _Z3foov
    ; CHECK: $sp = frame-setup STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r10, killed $r11, killed $lr
    ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 16
    ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
    ; CHECK: frame-setup CFI_INSTRUCTION offset $r11, -8
    ; CHECK: frame-setup CFI_INSTRUCTION offset $r10, -12
    ; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -16
    ; CHECK: $r11 = frame-setup ADDri killed $sp, 8, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: frame-setup CFI_INSTRUCTION def_cfa $r11, 8
    ; CHECK: $sp = frame-setup SUBri killed $sp, 912, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: $sp = frame-setup SUBri killed $sp, 4096, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: $r0 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: $r1 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: $r2 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: $r3 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: $r4 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: $r10 = SUBri killed $r11, 4096, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed $lr, killed $r10, -916, 14 /* CC::al */, $noreg :: (store 4 into %stack.2)
    ; CHECK: BL @_Z3barv, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit killed $r3, implicit killed $r4, implicit-def $sp
    $r0 = MOVi 0, 14, $noreg, $noreg
    $r1 = MOVi 0, 14, $noreg, $noreg
    $r2 = MOVi 0, 14, $noreg, $noreg
    $r3 = MOVi 0, 14, $noreg, $noreg
    $r4 = MOVi 0, 14, $noreg, $noreg
    STRi12 killed $lr, %stack.2, 0, 14, $noreg :: (store 4 into %stack.2)
    BL @_Z3barv, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit killed $r3, implicit killed $r4, implicit-def $sp

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