llvm/test/CodeGen/AMDGPU/hazard-kill.mir

# RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-sched %s -o - | FileCheck -check-prefix=GFX90 %s

# This tests that a KILL isn't considered as a valid instruction for a hazard
# slot (e.g. m0 def followed by V_INTERP for gfx9)
# The hazard recognizer should mov another instruction into that slot (in this case the S_MOV_B32

--- |
  define amdgpu_ps void @_amdgpu_ps_main() #0 { ret void }
...
---
# CHECK-LABEL: name: _amdgpu_ps_main
# CHECK-LABEL: bb.0:
# GFX90: $m0 = S_MOV_B32 killed renamable $sgpr4
# GFX90-NEXT: KILL undef renamable $sgpr2
# GFX90-NEXT: S_MOV_B32 0
# GFX90-NEXT: V_INTERP_MOV_F32
name:            _amdgpu_ps_main
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $sgpr2, $sgpr3, $sgpr4

    $sgpr6 = S_MOV_B32 killed $sgpr3
    renamable $sgpr8_sgpr9_sgpr10_sgpr11 = S_LOAD_DWORDX4_IMM renamable $sgpr6_sgpr7, 16, 0, 0
    $m0 = S_MOV_B32 killed renamable $sgpr4
    dead renamable $sgpr0 = KILL undef renamable $sgpr2
    renamable $vgpr0 = V_INTERP_MOV_F32 2, 0, 0, implicit $mode, implicit $m0, implicit $exec
    renamable $sgpr0 = S_MOV_B32 0

    S_ENDPGM 0

...