commit 5edb983d1d4bc5bfc1ed86d4a4a608413abf52d1
author johnmach <john.machado@intel.com> Thu Jun 17 13:46:23 2021 +0530
committer GitHub <noreply@github.com> Thu Jun 17 13:46:23 2021 +0530
tree 43d39318986d8b944c19244f52d4d731eaec632e
parent 1a0b11c70559e9203f5eb7c921609c20d9cf8ca6

Optimize memory allocation for SFT resource (#51)

Source/GmmLib/Resource/GmmResourceInfoCommon.cpp

diff --git a/Source/GmmLib/Resource/GmmResourceInfoCommon.cpp b/Source/GmmLib/Resource/GmmResourceInfoCommon.cpp
index be7ada5..c9ebccd 100644
--- a/Source/GmmLib/Resource/GmmResourceInfoCommon.cpp
+++ b/Source/GmmLib/Resource/GmmResourceInfoCommon.cpp
@@ -366,6 +366,12 @@
                     AuxSurf.Size += GMM_KBYTE(64);
                 }
             }
+	    
+	    if(Surf.Flags.Gpu.ProceduralTexture)
+            {
+                //Do not require main surface access either in GPUVA/physical space.
+                Surf.Size = 0;
+            }
 
             TotalSize = Surf.Size + AuxSurf.Size; //Not including AuxSecSurf size, multi-Aux surface isn't supported for displayables
             Alignment = GFX_ULONG_CAST(Surf.Pitch * pPlatform->TileInfo[Surf.TileMode].LogicalTileHeight);

Source/GmmLib/ULT/GmmGen12ResourceULT.cpp

diff --git a/Source/GmmLib/ULT/GmmGen12ResourceULT.cpp b/Source/GmmLib/ULT/GmmGen12ResourceULT.cpp
index 1ab9f0d..11fe08f 100644
--- a/Source/GmmLib/ULT/GmmGen12ResourceULT.cpp
+++ b/Source/GmmLib/ULT/GmmGen12ResourceULT.cpp
@@ -2539,7 +2539,8 @@
         VerifyResourceVAlign<true>(ResourceInfo, VAlign[i]);
         VerifyResourcePitch<true>(ResourceInfo, TileSize[i][0]); // As wide as 1 Tile
         VerifyResourcePitchInTiles<true>(ResourceInfo, 1);       // 1 Tile wide
-        VerifyResourceSize<true>(ResourceInfo, GMM_KBYTE(4));    // 1 Tile Big
+        //VerifyResourceSize<true>(ResourceInfo, GMM_KBYTE(4));    // 1 Tile Big,  old behaviour consuming bytes for main-surface (paired Texture dimensions) only used to obtain GPUVA for indirect (Auxtable mapped) CCS access by sampler.
+	VerifyResourceSize<true>(ResourceInfo, 0);    // New behaviour, optimized SFT size, sampler doesn't access CCS via main.. kernels refer the CCS-via its GPUVA (w/o main).
         VerifyResourceQPitch<false>(ResourceInfo, 0);            // Not Tested
 
         //test main surface base alignment is 4KB, since AMFS PT isn't compressed
@@ -2586,7 +2587,8 @@
         VerifyResourceVAlign<true>(ResourceInfo, VAlign[i]);
         VerifyResourcePitch<true>(ResourceInfo, TileSize[i][0] * 2); // As wide as 2 tile
         VerifyResourcePitchInTiles<true>(ResourceInfo, 2);           // 2 tile wide
-        VerifyResourceSize<true>(ResourceInfo, GMM_KBYTE(4) * 2);    // 2 tile big
+        //VerifyResourceSize<true>(ResourceInfo, GMM_KBYTE(4) * 2);    // 2 tile big, old behaviour consuming bytes for main-surface (paired Texture dimensions) only used to obtain GPUVA for indirect (Auxtable mapped) CCS access by sampler.
+        VerifyResourceSize<true>(ResourceInfo, 0); // New behaviour, optimized SFT size, sampler doesn't access CCS via main.. kernels refer the CCS-via its GPUVA (w/o main).
 
         VerifyResourceQPitch<false>(ResourceInfo, 0); // Not tested
 
@@ -2632,7 +2634,8 @@
         VerifyResourceVAlign<true>(ResourceInfo, VAlign[i]);
         VerifyResourcePitch<true>(ResourceInfo, TileSize[i][0] * 2);  // As wide as 2 tile
         VerifyResourcePitchInTiles<true>(ResourceInfo, 2);            // 2 tile wide
-        VerifyResourceSize<true>(ResourceInfo, GMM_KBYTE(4) * 2 * 2); // 2 tile wide; and 2-tile high
+        //VerifyResourceSize<true>(ResourceInfo, GMM_KBYTE(4) * 2 * 2); // 2 tile wide; and 2-tile high, old behaviour consuming bytes for main-surface (paired Texture dimensions) only used to obtain GPUVA for indirect (Auxtable mapped) CCS access by sampler.
+        VerifyResourceSize<true>(ResourceInfo, 0); // New behaviour, optimized SFT size, sampler doesn't access CCS via main.. kernels refer the CCS-via its GPUVA (w/o main).
 
         VerifyResourceQPitch<false>(ResourceInfo, 0); // Not tested
                                                       //test main surface base alignment is 4KB