)]}'
{
  "commit": "16b1bd89326ece62712c8ecc1142a41bd257d443",
  "tree": "ad6c3b1ca1168ba20930b44e629c103d1aa75872",
  "parents": [
    "c4bd8ec5edd718ad81a9169fd6a75b04059658c6"
  ],
  "author": {
    "name": "Aurelien Jarno",
    "email": "aurelien@aurel32.net",
    "time": "Mon May 21 22:01:21 2018 +0200"
  },
  "committer": {
    "name": "Aurelien Jarno",
    "email": "aurelien@aurel32.net",
    "time": "Thu Oct 04 16:09:27 2018 +0200"
  },
  "message": "bn_mul.h: add ARM DSP optimized MULADDC code\n\nThe Cortex M4, M7 MCUs and the Cortex A CPUs support the ARM DSP\ninstructions, and especially the umaal instruction which greatly\nspeed up MULADDC code. In addition the patch switched the ASM\nconstraints to registers instead of memory, giving the opportunity\nfor the compiler to load them the best way.\n\nThe speed improvement is variable depending on the crypto operation\nand the CPU. Here are the results on a Cortex M4, a Cortex M7 and a\nCortex A8. All tests have been done with GCC 6.3 using -O2. RSA uses a\nRSA-4096 key. ECDSA uses a secp256r1 curve EC key pair.\n\n                 +--------+--------+--------+\n                 |   M4   |   M7   |   A8   |\n+----------------+--------+--------+--------+\n| ECDSA signing  |  +6.3% |  +7.9% |  +4.1% |\n+----------------+--------+--------+--------+\n| RSA signing    | +43.7% | +68.3% | +26.3% |\n+----------------+--------+--------+--------+\n| RSA encryption |  +3.4% |  +9.7% |  +3.6% |\n+----------------+--------+--------+--------+\n| RSA decryption | +43.0% | +67.8% | +22.8% |\n+----------------+--------+--------+--------+\n\nI ran the whole testsuite on the Cortex A8 Linux environment, and it\nall passes.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "354c1cc1ab7ec7520923d693a5d3913050c00877",
      "old_mode": 33188,
      "old_path": "include/mbedtls/bn_mul.h",
      "new_id": "b631ad27885967c7aa5cc00cb17c663438e2fa60",
      "new_mode": 33188,
      "new_path": "include/mbedtls/bn_mul.h"
    }
  ]
}