| /* Instruction opcode table for frv. |
| |
| THIS FILE IS MACHINE GENERATED WITH CGEN. |
| |
| Copyright (C) 1996-2016 Free Software Foundation, Inc. |
| |
| This file is part of the GNU Binutils and/or GDB, the GNU debugger. |
| |
| This file is free software; you can redistribute it and/or modify |
| it under the terms of the GNU General Public License as published by |
| the Free Software Foundation; either version 3, or (at your option) |
| any later version. |
| |
| It is distributed in the hope that it will be useful, but WITHOUT |
| ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| License for more details. |
| |
| You should have received a copy of the GNU General Public License along |
| with this program; if not, write to the Free Software Foundation, Inc., |
| 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. |
| |
| */ |
| |
| #include "sysdep.h" |
| #include "ansidecl.h" |
| #include "bfd.h" |
| #include "symcat.h" |
| #include "frv-desc.h" |
| #include "frv-opc.h" |
| #include "libiberty.h" |
| |
| /* -- opc.c */ |
| #include "elf/frv.h" |
| #include <stdio.h> |
| |
| /* DEBUG appears below as argument of OP macro. */ |
| #undef DEBUG |
| |
| /* Returns TRUE if {MAJOR,MACH} is a major branch of the FRV |
| development tree. */ |
| |
| bfd_boolean |
| frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach) |
| { |
| switch (mach) |
| { |
| case bfd_mach_fr400: |
| if (major >= FR400_MAJOR_B_1 && major <= FR400_MAJOR_B_6) |
| return TRUE; |
| break; |
| case bfd_mach_fr450: |
| if (major >= FR450_MAJOR_B_1 && major <= FR450_MAJOR_B_6) |
| return TRUE; |
| break; |
| default: |
| if (major >= FR500_MAJOR_B_1 && major <= FR500_MAJOR_B_6) |
| return TRUE; |
| break; |
| } |
| |
| return FALSE; |
| } |
| |
| /* Returns TRUE if {MAJOR,MACH} supports floating point insns. */ |
| |
| bfd_boolean |
| frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach) |
| { |
| switch (mach) |
| { |
| case bfd_mach_fr400: |
| case bfd_mach_fr450: |
| return FALSE; |
| default: |
| if (major >= FR500_MAJOR_F_1 && major <= FR500_MAJOR_F_8) |
| return TRUE; |
| break; |
| } |
| |
| return FALSE; |
| } |
| |
| /* Returns TRUE if {MAJOR,MACH} supports media insns. */ |
| |
| bfd_boolean |
| frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE major, unsigned long mach) |
| { |
| switch (mach) |
| { |
| case bfd_mach_fr400: |
| if (major >= FR400_MAJOR_M_1 && major <= FR400_MAJOR_M_2) |
| return TRUE; |
| break; |
| case bfd_mach_fr450: |
| if (major >= FR450_MAJOR_M_1 && major <= FR450_MAJOR_M_6) |
| return TRUE; |
| break; |
| default: |
| if (major >= FR500_MAJOR_M_1 && major <= FR500_MAJOR_M_8) |
| return TRUE; |
| break; |
| } |
| |
| return FALSE; |
| } |
| |
| bfd_boolean |
| frv_is_branch_insn (const CGEN_INSN *insn) |
| { |
| if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR), |
| bfd_mach_fr400)) |
| return TRUE; |
| if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR), |
| bfd_mach_fr450)) |
| return TRUE; |
| if (frv_is_branch_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR), |
| bfd_mach_fr500)) |
| return TRUE; |
| |
| return FALSE; |
| } |
| |
| bfd_boolean |
| frv_is_float_insn (const CGEN_INSN *insn) |
| { |
| if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR), |
| bfd_mach_fr400)) |
| return TRUE; |
| if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR), |
| bfd_mach_fr450)) |
| return TRUE; |
| if (frv_is_float_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR), |
| bfd_mach_fr500)) |
| return TRUE; |
| |
| return FALSE; |
| } |
| |
| bfd_boolean |
| frv_is_media_insn (const CGEN_INSN *insn) |
| { |
| if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR), |
| bfd_mach_fr400)) |
| return TRUE; |
| if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR), |
| bfd_mach_fr450)) |
| return TRUE; |
| if (frv_is_media_major (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR), |
| bfd_mach_fr500)) |
| return TRUE; |
| |
| return FALSE; |
| } |
| |
| /* This table represents the allowable packing for vliw insns for the fr400. |
| The fr400 has only 2 vliw slots. Represent this by not allowing any insns |
| in the extra slots. |
| Subsets of any given row are also allowed. */ |
| static VLIW_COMBO fr400_allowed_vliw[] = |
| { |
| /* slot0 slot1 slot2 slot3 */ |
| { UNIT_I0, UNIT_I1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_I0, UNIT_FM0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_I0, UNIT_B0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_FM0, UNIT_FM1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_FM0, UNIT_B0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_B0, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO } |
| }; |
| |
| /* This table represents the allowable packing for vliw insns for the fr500. |
| The fr500 has only 4 vliw slots. Represent this by not allowing any insns |
| in the extra slots. |
| Subsets of any given row are also allowed. */ |
| static VLIW_COMBO fr500_allowed_vliw[] = |
| { |
| /* slot0 slot1 slot2 slot3 */ |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1 PAD_VLIW_COMBO }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0 PAD_VLIW_COMBO }, |
| { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0 PAD_VLIW_COMBO }, |
| { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO }, |
| { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO }, |
| { UNIT_I0, UNIT_B0, UNIT_B1, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO }, |
| { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }, |
| { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO } |
| }; |
| |
| /* This table represents the allowable packing for vliw insns for the fr550. |
| Subsets of any given row are also allowed. */ |
| static VLIW_COMBO fr550_allowed_vliw[] = |
| { |
| /* slot0 slot1 slot2 slot3 slot4 slot5 slot6 slot7 */ |
| { UNIT_I0, UNIT_I1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL }, |
| { UNIT_I0, UNIT_I1, UNIT_I2, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_I0, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_I3, UNIT_FM3 }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_I3, UNIT_B0 }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_FM3, UNIT_B0 }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_B0, UNIT_B1 }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1 }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_B0, UNIT_B1, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1 }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1 }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_I2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL }, |
| { UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }, |
| { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL } |
| }; |
| |
| /* Some insns are assigned specialized implementation units which map to |
| different actual implementation units on different machines. These |
| tables perform that mapping. */ |
| static CGEN_ATTR_VALUE_ENUM_TYPE fr400_unit_mapping[] = |
| { |
| /* unit in insn actual unit */ |
| /* NIL */ UNIT_NIL, |
| /* I0 */ UNIT_I0, |
| /* I1 */ UNIT_I1, |
| /* I01 */ UNIT_I01, |
| /* I2 */ UNIT_NIL, /* no I2 or I3 unit */ |
| /* I3 */ UNIT_NIL, |
| /* IALL */ UNIT_I01, /* only I0 and I1 units */ |
| /* FM0 */ UNIT_FM0, |
| /* FM1 */ UNIT_FM1, |
| /* FM01 */ UNIT_FM01, |
| /* FM2 */ UNIT_NIL, /* no F2 or M2 units */ |
| /* FM3 */ UNIT_NIL, /* no F3 or M3 units */ |
| /* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */ |
| /* FMLOW */ UNIT_FM0, /* Only F0,M0 units */ |
| /* B0 */ UNIT_B0, /* branches only in B0 unit. */ |
| /* B1 */ UNIT_B0, |
| /* B01 */ UNIT_B0, |
| /* C */ UNIT_C, |
| /* MULT-DIV */ UNIT_I0, /* multiply and divide only in I0 unit. */ |
| /* IACC */ UNIT_I01, /* iacc multiply in I0 or I1 unit. */ |
| /* LOAD */ UNIT_I0, /* load only in I0 unit. */ |
| /* STORE */ UNIT_I0, /* store only in I0 unit. */ |
| /* SCAN */ UNIT_I0, /* scan only in I0 unit. */ |
| /* DCPL */ UNIT_C, /* dcpl only in C unit. */ |
| /* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */ |
| /* MDCUTSSI */ UNIT_FM0, /* mdcutssi only in FM0 unit. */ |
| /* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */ |
| }; |
| |
| /* Some insns are assigned specialized implementation units which map to |
| different actual implementation units on different machines. These |
| tables perform that mapping. */ |
| static CGEN_ATTR_VALUE_ENUM_TYPE fr450_unit_mapping[] = |
| { |
| /* unit in insn actual unit */ |
| /* NIL */ UNIT_NIL, |
| /* I0 */ UNIT_I0, |
| /* I1 */ UNIT_I1, |
| /* I01 */ UNIT_I01, |
| /* I2 */ UNIT_NIL, /* no I2 or I3 unit */ |
| /* I3 */ UNIT_NIL, |
| /* IALL */ UNIT_I01, /* only I0 and I1 units */ |
| /* FM0 */ UNIT_FM0, |
| /* FM1 */ UNIT_FM1, |
| /* FM01 */ UNIT_FM01, |
| /* FM2 */ UNIT_NIL, /* no F2 or M2 units */ |
| /* FM3 */ UNIT_NIL, /* no F3 or M3 units */ |
| /* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */ |
| /* FMLOW */ UNIT_FM0, /* Only F0,M0 units */ |
| /* B0 */ UNIT_B0, /* branches only in B0 unit. */ |
| /* B1 */ UNIT_B0, |
| /* B01 */ UNIT_B0, |
| /* C */ UNIT_C, |
| /* MULT-DIV */ UNIT_I0, /* multiply and divide only in I0 unit. */ |
| /* IACC */ UNIT_I01, /* iacc multiply in I0 or I1 unit. */ |
| /* LOAD */ UNIT_I0, /* load only in I0 unit. */ |
| /* STORE */ UNIT_I0, /* store only in I0 unit. */ |
| /* SCAN */ UNIT_I0, /* scan only in I0 unit. */ |
| /* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */ |
| /* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */ |
| /* MDCUTSSI */ UNIT_FM01, /* mdcutssi in FM0 or FM1. */ |
| /* MCLRACC-1*/ UNIT_FM0 /* mclracc,A==1 insn only in FM0 unit. */ |
| }; |
| |
| static CGEN_ATTR_VALUE_ENUM_TYPE fr500_unit_mapping[] = |
| { |
| /* unit in insn actual unit */ |
| /* NIL */ UNIT_NIL, |
| /* I0 */ UNIT_I0, |
| /* I1 */ UNIT_I1, |
| /* I01 */ UNIT_I01, |
| /* I2 */ UNIT_NIL, /* no I2 or I3 unit */ |
| /* I3 */ UNIT_NIL, |
| /* IALL */ UNIT_I01, /* only I0 and I1 units */ |
| /* FM0 */ UNIT_FM0, |
| /* FM1 */ UNIT_FM1, |
| /* FM01 */ UNIT_FM01, |
| /* FM2 */ UNIT_NIL, /* no F2 or M2 units */ |
| /* FM3 */ UNIT_NIL, /* no F3 or M2 units */ |
| /* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */ |
| /* FMLOW */ UNIT_FM0, /* Only F0,M0 units */ |
| /* B0 */ UNIT_B0, |
| /* B1 */ UNIT_B1, |
| /* B01 */ UNIT_B01, |
| /* C */ UNIT_C, |
| /* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */ |
| /* IACC */ UNIT_NIL, /* iacc multiply not implemented */ |
| /* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */ |
| /* STORE */ UNIT_I0, /* store only in I0 unit. */ |
| /* SCAN */ UNIT_I01, /* scan in I0 or I1 unit. */ |
| /* DCPL */ UNIT_C, /* dcpl only in C unit. */ |
| /* MDUALACC */ UNIT_FM0, /* media dual acc insn only in FM0 unit. */ |
| /* MDCUTSSI */ UNIT_FM0, /* mdcutssi only in FM0 unit. */ |
| /* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */ |
| }; |
| |
| static CGEN_ATTR_VALUE_ENUM_TYPE fr550_unit_mapping[] = |
| { |
| /* unit in insn actual unit */ |
| /* NIL */ UNIT_NIL, |
| /* I0 */ UNIT_I0, |
| /* I1 */ UNIT_I1, |
| /* I01 */ UNIT_I01, |
| /* I2 */ UNIT_I2, |
| /* I3 */ UNIT_I3, |
| /* IALL */ UNIT_IALL, |
| /* FM0 */ UNIT_FM0, |
| /* FM1 */ UNIT_FM1, |
| /* FM01 */ UNIT_FM01, |
| /* FM2 */ UNIT_FM2, |
| /* FM3 */ UNIT_FM3, |
| /* FMALL */ UNIT_FMALL, |
| /* FMLOW */ UNIT_FM01, /* Only F0,F1,M0,M1 units */ |
| /* B0 */ UNIT_B0, |
| /* B1 */ UNIT_B1, |
| /* B01 */ UNIT_B01, |
| /* C */ UNIT_C, |
| /* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */ |
| /* IACC */ UNIT_NIL, /* iacc multiply not implemented. */ |
| /* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */ |
| /* STORE */ UNIT_I01, /* store in I0 or I1 unit. */ |
| /* SCAN */ UNIT_IALL, /* scan in any integer unit. */ |
| /* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */ |
| /* MDUALACC */ UNIT_FMALL,/* media dual acc insn in all media units */ |
| /* MDCUTSSI */ UNIT_FM01, /* mdcutssi in FM0 or FM1 unit. */ |
| /* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */ |
| }; |
| |
| void |
| frv_vliw_reset (FRV_VLIW *vliw, unsigned long mach, unsigned long elf_flags) |
| { |
| vliw->next_slot = 0; |
| vliw->constraint_violation = 0; |
| vliw->mach = mach; |
| vliw->elf_flags = elf_flags; |
| |
| switch (mach) |
| { |
| case bfd_mach_fr400: |
| vliw->current_vliw = fr400_allowed_vliw; |
| vliw->unit_mapping = fr400_unit_mapping; |
| break; |
| case bfd_mach_fr450: |
| vliw->current_vliw = fr400_allowed_vliw; |
| vliw->unit_mapping = fr450_unit_mapping; |
| break; |
| case bfd_mach_fr550: |
| vliw->current_vliw = fr550_allowed_vliw; |
| vliw->unit_mapping = fr550_unit_mapping; |
| break; |
| default: |
| vliw->current_vliw = fr500_allowed_vliw; |
| vliw->unit_mapping = fr500_unit_mapping; |
| break; |
| } |
| } |
| |
| /* Return TRUE if unit1 is a match for unit2. |
| Unit1 comes from the insn's UNIT attribute. unit2 comes from one of the |
| *_allowed_vliw tables above. */ |
| static bfd_boolean |
| match_unit (FRV_VLIW *vliw, |
| CGEN_ATTR_VALUE_ENUM_TYPE unit1, CGEN_ATTR_VALUE_ENUM_TYPE unit2) |
| { |
| /* Map any specialized implementation units to actual ones. */ |
| unit1 = vliw->unit_mapping[unit1]; |
| |
| if (unit1 == unit2) |
| return TRUE; |
| if (unit1 < unit2) |
| return FALSE; |
| |
| switch (unit1) |
| { |
| case UNIT_I01: |
| case UNIT_FM01: |
| case UNIT_B01: |
| /* The 01 versions of these units are within 2 enums of the 0 or 1 |
| versions. */ |
| if (unit1 - unit2 <= 2) |
| return TRUE; |
| break; |
| case UNIT_IALL: |
| case UNIT_FMALL: |
| /* The ALL versions of these units are within 5 enums of the 0, 1, 2 or 3 |
| versions. */ |
| if (unit1 - unit2 <= 5) |
| return TRUE; |
| break; |
| default: |
| break; |
| } |
| |
| return FALSE; |
| } |
| |
| /* Return TRUE if the vliws match, FALSE otherwise. */ |
| |
| static bfd_boolean |
| match_vliw (VLIW_COMBO *vliw1, VLIW_COMBO *vliw2, int vliw_size) |
| { |
| int i; |
| |
| for (i = 0; i < vliw_size; ++i) |
| if ((*vliw1)[i] != (*vliw2)[i]) |
| return FALSE; |
| |
| return TRUE; |
| } |
| |
| /* Find the next vliw vliw in the table that can accomodate the new insn. |
| If one is found then return it. Otherwise return NULL. */ |
| |
| static VLIW_COMBO * |
| add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit) |
| { |
| int next = vliw->next_slot; |
| VLIW_COMBO *current = vliw->current_vliw; |
| VLIW_COMBO *potential; |
| |
| if (next <= 0) |
| { |
| fprintf (stderr, "frv-opc.c line %d: bad vliw->next_slot value.\n", |
| __LINE__); |
| abort (); /* Should never happen. */ |
| } |
| |
| /* The table is sorted by units allowed within slots, so vliws with |
| identical starting sequences are together. */ |
| potential = current; |
| do |
| { |
| if (match_unit (vliw, unit, (*potential)[next])) |
| return potential; |
| ++potential; |
| } |
| while (match_vliw (potential, current, next)); |
| |
| return NULL; |
| } |
| |
| /* Look for the given major insn type in the given vliw. |
| Returns TRUE if found, FALSE otherwise. */ |
| |
| static bfd_boolean |
| find_major_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) |
| { |
| int i; |
| |
| for (i = 0; i < vliw->next_slot; ++i) |
| if (vliw->major[i] == major) |
| return TRUE; |
| |
| return FALSE; |
| } |
| |
| /* Check for constraints between the insns in the vliw due to major insn |
| types. */ |
| |
| static bfd_boolean |
| fr400_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) |
| { |
| /* In the cpu file, all media insns are represented as being allowed in |
| both media units. This makes it easier since this is the case for fr500. |
| Catch the invalid combinations here. Insns of major class FR400_MAJOR_M_2 |
| cannot coexist with any other media insn in a vliw. */ |
| switch (major) |
| { |
| case FR400_MAJOR_M_2: |
| return ! find_major_in_vliw (vliw, FR400_MAJOR_M_1) |
| && ! find_major_in_vliw (vliw, FR400_MAJOR_M_2); |
| case FR400_MAJOR_M_1: |
| return ! find_major_in_vliw (vliw, FR400_MAJOR_M_2); |
| default: |
| break; |
| } |
| return TRUE; |
| } |
| |
| static bfd_boolean |
| fr450_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) |
| { |
| CGEN_ATTR_VALUE_ENUM_TYPE other_major; |
| |
| /* Our caller guarantees there's at least one other instruction. */ |
| other_major = CGEN_INSN_ATTR_VALUE (vliw->insn[0], CGEN_INSN_FR450_MAJOR); |
| |
| /* (M4, M5) and (M4, M6) are allowed. */ |
| if (other_major == FR450_MAJOR_M_4) |
| if (major == FR450_MAJOR_M_5 || major == FR450_MAJOR_M_6) |
| return TRUE; |
| |
| /* Otherwise, instructions in even-numbered media categories cannot be |
| executed in parallel with other media instructions. */ |
| switch (major) |
| { |
| case FR450_MAJOR_M_2: |
| case FR450_MAJOR_M_4: |
| case FR450_MAJOR_M_6: |
| return !(other_major >= FR450_MAJOR_M_1 |
| && other_major <= FR450_MAJOR_M_6); |
| |
| case FR450_MAJOR_M_1: |
| case FR450_MAJOR_M_3: |
| case FR450_MAJOR_M_5: |
| return !(other_major == FR450_MAJOR_M_2 |
| || other_major == FR450_MAJOR_M_4 |
| || other_major == FR450_MAJOR_M_6); |
| |
| default: |
| return TRUE; |
| } |
| } |
| |
| static bfd_boolean |
| find_unit_in_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE unit) |
| { |
| int i; |
| |
| for (i = 0; i < vliw->next_slot; ++i) |
| if (CGEN_INSN_ATTR_VALUE (vliw->insn[i], CGEN_INSN_UNIT) == unit) |
| return TRUE; |
| |
| return FALSE; /* Not found. */ |
| } |
| |
| static bfd_boolean |
| find_major_in_slot (FRV_VLIW *vliw, |
| CGEN_ATTR_VALUE_ENUM_TYPE major, |
| CGEN_ATTR_VALUE_ENUM_TYPE slot) |
| { |
| int i; |
| |
| for (i = 0; i < vliw->next_slot; ++i) |
| if (vliw->major[i] == major && (*vliw->current_vliw)[i] == slot) |
| return TRUE; |
| |
| return FALSE; |
| } |
| |
| static bfd_boolean |
| fr550_find_media_in_vliw (FRV_VLIW *vliw) |
| { |
| int i; |
| |
| for (i = 0; i < vliw->next_slot; ++i) |
| { |
| if (vliw->major[i] < FR550_MAJOR_M_1 || vliw->major[i] > FR550_MAJOR_M_5) |
| continue; |
| |
| /* Found a media insn, however, MNOP and MCLRACC don't count. */ |
| if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MNOP |
| || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_0 |
| || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_1) |
| continue; |
| |
| return TRUE; /* Found one. */ |
| } |
| |
| return FALSE; |
| } |
| |
| static bfd_boolean |
| fr550_find_float_in_vliw (FRV_VLIW *vliw) |
| { |
| int i; |
| |
| for (i = 0; i < vliw->next_slot; ++i) |
| { |
| if (vliw->major[i] < FR550_MAJOR_F_1 || vliw->major[i] > FR550_MAJOR_F_4) |
| continue; |
| |
| /* Found a floating point insn, however, FNOP doesn't count. */ |
| if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_FNOP) |
| continue; |
| |
| return TRUE; /* Found one. */ |
| } |
| |
| return FALSE; |
| } |
| |
| static bfd_boolean |
| fr550_check_insn_major_constraints (FRV_VLIW *vliw, |
| CGEN_ATTR_VALUE_ENUM_TYPE major, |
| const CGEN_INSN *insn) |
| { |
| CGEN_ATTR_VALUE_ENUM_TYPE unit; |
| CGEN_ATTR_VALUE_ENUM_TYPE slot = (*vliw->current_vliw)[vliw->next_slot]; |
| switch (slot) |
| { |
| case UNIT_I2: |
| /* If it's a store, then there must be another store in I1 */ |
| unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT); |
| if (unit == UNIT_STORE) |
| return find_unit_in_vliw (vliw, UNIT_STORE); |
| break; |
| case UNIT_FM2: |
| case UNIT_FM3: |
| /* Floating point insns other than FNOP in slot f2 or f3 cannot coexist |
| with media insns. */ |
| if (major >= FR550_MAJOR_F_1 && major <= FR550_MAJOR_F_4 |
| && CGEN_INSN_NUM (insn) != FRV_INSN_FNOP) |
| return ! fr550_find_media_in_vliw (vliw); |
| /* Media insns other than MNOP in slot m2 or m3 cannot coexist with |
| floating point insns. */ |
| if (major >= FR550_MAJOR_M_1 && major <= FR550_MAJOR_M_5 |
| && CGEN_INSN_NUM (insn) != FRV_INSN_MNOP) |
| return ! fr550_find_float_in_vliw (vliw); |
| /* F-2 in slot f2 or f3 cannot coexist with F-2 or F-4 in slot f1 or f2 |
| respectively. */ |
| if (major == FR550_MAJOR_F_2) |
| return ! find_major_in_slot (vliw, FR550_MAJOR_F_2, |
| slot - (UNIT_FM2 - UNIT_FM0)) |
| && ! find_major_in_slot (vliw, FR550_MAJOR_F_4, |
| slot - (UNIT_FM2 - UNIT_FM0)); |
| /* M-2 or M-5 in slot m2 or m3 cannot coexist with M-2 in slot m1 or m2 |
| respectively. */ |
| if (major == FR550_MAJOR_M_2 || major == FR550_MAJOR_M_5) |
| return ! find_major_in_slot (vliw, FR550_MAJOR_M_2, |
| slot - (UNIT_FM2 - UNIT_FM0)); |
| /* M-4 in slot m2 or m3 cannot coexist with M-4 in slot m1 or m2 |
| respectively. */ |
| if (major == FR550_MAJOR_M_4) |
| return ! find_major_in_slot (vliw, FR550_MAJOR_M_4, |
| slot - (UNIT_FM2 - UNIT_FM0)); |
| break; |
| default: |
| break; |
| } |
| return TRUE; /* All OK. */ |
| } |
| |
| static bfd_boolean |
| fr500_check_insn_major_constraints (FRV_VLIW *vliw, CGEN_ATTR_VALUE_ENUM_TYPE major) |
| { |
| /* TODO: A table might be faster for some of the more complex instances |
| here. */ |
| switch (major) |
| { |
| case FR500_MAJOR_I_1: |
| case FR500_MAJOR_I_4: |
| case FR500_MAJOR_I_5: |
| case FR500_MAJOR_I_6: |
| case FR500_MAJOR_B_1: |
| case FR500_MAJOR_B_2: |
| case FR500_MAJOR_B_3: |
| case FR500_MAJOR_B_4: |
| case FR500_MAJOR_B_5: |
| case FR500_MAJOR_B_6: |
| case FR500_MAJOR_F_4: |
| case FR500_MAJOR_F_8: |
| case FR500_MAJOR_M_8: |
| return TRUE; /* OK */ |
| case FR500_MAJOR_I_2: |
| /* Cannot coexist with I-3 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_I_3); |
| case FR500_MAJOR_I_3: |
| /* Cannot coexist with I-2 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_I_2); |
| case FR500_MAJOR_F_1: |
| case FR500_MAJOR_F_2: |
| /* Cannot coexist with F-5, F-6, or M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_F_5) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_6) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7); |
| case FR500_MAJOR_F_3: |
| /* Cannot coexist with F-7, or M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_F_7) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7); |
| case FR500_MAJOR_F_5: |
| /* Cannot coexist with F-1, F-2, F-6, F-7, or M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_F_1) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_2) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_6) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_7) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7); |
| case FR500_MAJOR_F_6: |
| /* Cannot coexist with F-1, F-2, F-5, F-6, or M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_F_1) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_2) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_5) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_6) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7); |
| case FR500_MAJOR_F_7: |
| /* Cannot coexist with F-3, F-5, F-7, or M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_F_3) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_5) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_7) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7); |
| case FR500_MAJOR_M_1: |
| /* Cannot coexist with M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_M_7); |
| case FR500_MAJOR_M_2: |
| case FR500_MAJOR_M_3: |
| /* Cannot coexist with M-5, M-6 or M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_M_5) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_6) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7); |
| case FR500_MAJOR_M_4: |
| /* Cannot coexist with M-6 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_M_6); |
| case FR500_MAJOR_M_5: |
| /* Cannot coexist with M-2, M-3, M-5, M-6 or M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_M_2) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_3) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_5) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_6) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7); |
| case FR500_MAJOR_M_6: |
| /* Cannot coexist with M-2, M-3, M-4, M-5, M-6 or M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_M_2) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_3) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_4) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_5) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_6) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7); |
| case FR500_MAJOR_M_7: |
| /* Cannot coexist with M-1, M-2, M-3, M-5, M-6 or M-7 insn. */ |
| return ! find_major_in_vliw (vliw, FR500_MAJOR_M_1) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_2) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_3) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_5) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_6) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_M_7) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_1) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_2) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_3) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_5) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_6) |
| && ! find_major_in_vliw (vliw, FR500_MAJOR_F_7); |
| default: |
| fprintf (stderr, "frv-opc.c, line %d: bad major code, aborting.\n", |
| __LINE__); |
| abort (); |
| break; |
| } |
| return TRUE; |
| } |
| |
| static bfd_boolean |
| check_insn_major_constraints (FRV_VLIW *vliw, |
| CGEN_ATTR_VALUE_ENUM_TYPE major, |
| const CGEN_INSN *insn) |
| { |
| switch (vliw->mach) |
| { |
| case bfd_mach_fr400: |
| return fr400_check_insn_major_constraints (vliw, major); |
| |
| case bfd_mach_fr450: |
| return fr450_check_insn_major_constraints (vliw, major); |
| |
| case bfd_mach_fr550: |
| return fr550_check_insn_major_constraints (vliw, major, insn); |
| |
| default: |
| return fr500_check_insn_major_constraints (vliw, major); |
| } |
| } |
| |
| /* Add in insn to the VLIW vliw if possible. |
| Return 0 if successful, non-zero otherwise. */ |
| |
| int |
| frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn) |
| { |
| int slot_index; |
| CGEN_ATTR_VALUE_ENUM_TYPE major; |
| CGEN_ATTR_VALUE_ENUM_TYPE unit; |
| VLIW_COMBO *new_vliw; |
| |
| if (vliw->constraint_violation || CGEN_INSN_INVALID_P (insn)) |
| return 1; |
| |
| slot_index = vliw->next_slot; |
| if (slot_index >= FRV_VLIW_SIZE) |
| return 1; |
| |
| unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT); |
| if (unit == UNIT_NIL) |
| { |
| fprintf (stderr, "frv-opc.c line %d: bad insn unit.\n", |
| __LINE__); |
| abort (); /* No UNIT specified for this insn in frv.cpu. */ |
| } |
| |
| switch (vliw->mach) |
| { |
| case bfd_mach_fr400: |
| major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR); |
| break; |
| case bfd_mach_fr450: |
| major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR450_MAJOR); |
| break; |
| case bfd_mach_fr550: |
| major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR550_MAJOR); |
| break; |
| default: |
| major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR); |
| break; |
| } |
| |
| if (slot_index <= 0) |
| { |
| /* Any insn can be added to slot 0. */ |
| while (! match_unit (vliw, unit, (*vliw->current_vliw)[0])) |
| ++vliw->current_vliw; |
| vliw->major[0] = major; |
| vliw->insn[0] = insn; |
| vliw->next_slot = 1; |
| return 0; |
| } |
| |
| /* If there are already insns in the vliw(s) check to see that |
| this one can be added. Do this by finding an allowable vliw |
| combination that can accept the new insn. */ |
| if (! (vliw->elf_flags & EF_FRV_NOPACK)) |
| { |
| new_vliw = add_next_to_vliw (vliw, unit); |
| if (new_vliw && check_insn_major_constraints (vliw, major, insn)) |
| { |
| vliw->current_vliw = new_vliw; |
| vliw->major[slot_index] = major; |
| vliw->insn[slot_index] = insn; |
| vliw->next_slot++; |
| return 0; |
| } |
| |
| /* The frv machine supports all packing conbinations. If we fail, |
| to add the insn, then it could not be handled as if it was the fr500. |
| Just return as if it was handled ok. */ |
| if (vliw->mach == bfd_mach_frv) |
| return 0; |
| } |
| |
| vliw->constraint_violation = 1; |
| return 1; |
| } |
| |
| bfd_boolean |
| spr_valid (long regno) |
| { |
| if (regno < 0) return FALSE; |
| if (regno <= 4095) return TRUE; |
| return FALSE; |
| } |
| /* -- */ |
| /* The hash functions are recorded here to help keep assembler code out of |
| the disassembler and vice versa. */ |
| |
| static int asm_hash_insn_p (const CGEN_INSN *); |
| static unsigned int asm_hash_insn (const char *); |
| static int dis_hash_insn_p (const CGEN_INSN *); |
| static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT); |
| |
| /* Instruction formats. */ |
| |
| #define F(f) & frv_cgen_ifld_table[FRV_##f] |
| static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = { |
| 0, 0, 0x0, { { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_ICCI_1_NULL) }, { F (F_OPE2) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_not ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_ICCI_1_NULL) }, { F (F_OPE2) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_smul ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_ICCI_1_NULL) }, { F (F_OPE2) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_smu ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0fc0, { { F (F_PACK) }, { F (F_RD_NULL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_slass ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_scutss ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cadd ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cnot ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fff0c0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_csmul ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_addcc ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc03c0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_ICCI_1) }, { F (F_OPE2) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_smulcc ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc03c0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_ICCI_1) }, { F (F_OPE2) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_smuli ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_addicc ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_ICCI_1) }, { F (F_S10) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_smulicc ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_ICCI_1) }, { F (F_S10) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmpb ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc03c0, { { F (F_PACK) }, { F (F_GRK_NULL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_ICCI_1) }, { F (F_OPE2) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_setlo ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ff0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_MISC_NULL_4) }, { F (F_U16) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_sethi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ff0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_MISC_NULL_4) }, { F (F_U16) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_setlos ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ff0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_MISC_NULL_4) }, { F (F_S16) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ldbf ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ldc ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_CPRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ldd ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_lddf ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_lddc ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_CPRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ldsbi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ldbfi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_lddi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_lddfi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cldbf ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_clddf ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_movgf ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmovgf ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fff0c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_movgs ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_OP) }, { F (F_SPR) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_bra ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0000, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_LABEL16) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_bno ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffcffff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_LABEL16_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_beq ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc0000, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2) }, { F (F_OP) }, { F (F_HINT) }, { F (F_LABEL16) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fbra ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0000, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_LABEL16) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fbno ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffcffff, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_LABEL16_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fbne ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc0000, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2) }, { F (F_OP) }, { F (F_HINT) }, { F (F_LABEL16) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_bctrlr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffcefff, { { F (F_PACK) }, { F (F_COND_NULL) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_bralr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffcffff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND_NULL) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_bnolr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffcffff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND_NULL) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_beqlr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fcffff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND_NULL) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fbralr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffcffff, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND_NULL) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fbnolr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffcffff, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND_NULL) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fbeqlr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fcffff, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND_NULL) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_bcralr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffcefff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_bceqlr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fcefff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fcbralr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffcefff, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2_NULL) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fcbeqlr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fcefff, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2) }, { F (F_OP) }, { F (F_HINT) }, { F (F_OPE3) }, { F (F_CCOND) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_jmpl ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0fc0, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_LI_OFF) }, { F (F_OP) }, { F (F_GRI) }, { F (F_MISC_NULL_2) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_calll ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0fc0, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_LI_ON) }, { F (F_OP) }, { F (F_GRI) }, { F (F_MISC_NULL_2) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_jmpil ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0000, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_LI_OFF) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_callil ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0000, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_LI_ON) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_call ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_OP) }, { F (F_LABEL24) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_rett ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7dffffff, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_DEBUG) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_rei ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0fff, { { F (F_PACK) }, { F (F_RD_NULL) }, { F (F_OP) }, { F (F_EIR) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_tra ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0fc0, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_MISC_NULL_3) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_tno ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_GRI_NULL) }, { F (F_MISC_NULL_3) }, { F (F_OPE4) }, { F (F_GRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_teq ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc0fc0, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2) }, { F (F_OP) }, { F (F_GRI) }, { F (F_MISC_NULL_3) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ftra ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0fc0, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2_NULL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_MISC_NULL_3) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ftno ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2_NULL) }, { F (F_OP) }, { F (F_GRI_NULL) }, { F (F_MISC_NULL_3) }, { F (F_OPE4) }, { F (F_GRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ftne ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc0fc0, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2) }, { F (F_OP) }, { F (F_GRI) }, { F (F_MISC_NULL_3) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_tira ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0000, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_tino ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_GRI_NULL) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_tieq ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc0000, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_ICCI_2) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ftira ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0000, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_ICCI_2_NULL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ftino ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2_NULL) }, { F (F_OP) }, { F (F_GRI_NULL) }, { F (F_S12_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ftine ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc0000, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_FCCI_2) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_break ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_RD_NULL) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_MISC_NULL_3) }, { F (F_OPE4) }, { F (F_GRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_andcr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x71ff8ff8, { { F (F_PACK) }, { F (F_MISC_NULL_6) }, { F (F_CRK) }, { F (F_OP) }, { F (F_MISC_NULL_7) }, { F (F_CRI) }, { F (F_OPE1) }, { F (F_MISC_NULL_8) }, { F (F_CRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_notcr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x71fffff8, { { F (F_PACK) }, { F (F_MISC_NULL_6) }, { F (F_CRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_MISC_NULL_8) }, { F (F_CRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ckra ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79ffffff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_CRJ_INT) }, { F (F_OP) }, { F (F_MISC_NULL_5) }, { F (F_ICCI_3_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ckeq ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fffffc, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_CRJ_INT) }, { F (F_OP) }, { F (F_MISC_NULL_5) }, { F (F_ICCI_3) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fckra ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fffffc, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_CRJ_FLOAT) }, { F (F_OP) }, { F (F_MISC_NULL_5) }, { F (F_FCCI_3) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cckra ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fff0ff, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_CRJ_INT) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_MISC_NULL_9) }, { F (F_ICCI_3_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cckeq ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fff0fc, { { F (F_PACK) }, { F (F_INT_CC) }, { F (F_CRJ_INT) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_MISC_NULL_9) }, { F (F_ICCI_3) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cfckra ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fff0ff, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_CRJ_FLOAT) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_MISC_NULL_9) }, { F (F_FCCI_3_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cfckne ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fff0fc, { { F (F_PACK) }, { F (F_FLT_CC) }, { F (F_CRJ_FLOAT) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_MISC_NULL_9) }, { F (F_FCCI_3) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cjmpl ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc00c0, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_LI_OFF) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_ccalll ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc00c0, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_LI_ON) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_icei ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7dfc0fc0, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_AE) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_icpl ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7dfc0fc0, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_LOCK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_icul ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7ffc0fff, { { F (F_PACK) }, { F (F_RD_NULL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_bar ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_RD_NULL) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_GRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_lrai ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc7, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_LRAE) }, { F (F_LRAD) }, { F (F_LRAS) }, { F (F_LRA_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_tlbpr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x61fc0fc0, { { F (F_PACK) }, { F (F_TLBPR_NULL) }, { F (F_TLBPROPX) }, { F (F_TLBPRL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cop1 ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_CPRK) }, { F (F_OP) }, { F (F_CPRI) }, { F (F_S6_1) }, { F (F_CPRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_clrgr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffff, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_GRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_clrfr ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffff, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_GRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fitos ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fstoi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fitod ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fdtoi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cfitos ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fff0c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cfstoi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fff0c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fmovs ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fmovd ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cfmovs ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fff0c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fadds ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_faddd ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cfadds ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fcmps ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc0fc0, { { F (F_PACK) }, { F (F_COND_NULL) }, { F (F_FCCI_2) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fcmpd ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc0fc0, { { F (F_PACK) }, { F (F_COND_NULL) }, { F (F_FCCI_2) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cfcmps ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc00c0, { { F (F_PACK) }, { F (F_COND_NULL) }, { F (F_FCCI_2) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mhsetlos ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_OPE1) }, { F (F_U12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mhsethis ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_OPE1) }, { F (F_U12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mhdsets ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_OPE1) }, { F (F_U12) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mhsetloh ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffe0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_OPE1) }, { F (F_MISC_NULL_11) }, { F (F_S5) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mhsethih ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffe0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_OPE1) }, { F (F_MISC_NULL_11) }, { F (F_S5) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mhdseth ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffe0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_OPE1) }, { F (F_MISC_NULL_11) }, { F (F_S5) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mand ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmand ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mnot ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmnot ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fff0c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mrotli ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_U6) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mcut ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_ACC40SI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mcuti ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_ACC40SI) }, { F (F_OPE1) }, { F (F_S6) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mdcutssi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_ACC40SI) }, { F (F_OPE1) }, { F (F_S6) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mdrotli ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_S6) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mqsaths ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mcmpsh ATTRIBUTE_UNUSED = { |
| 32, 32, 0x79fc0fc0, { { F (F_PACK) }, { F (F_COND_NULL) }, { F (F_FCCK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mabshs ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmqaddhss ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mqsllhi ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_U6) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_maddaccs ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fff, { { F (F_PACK) }, { F (F_ACC40SK) }, { F (F_OP) }, { F (F_ACC40SI) }, { F (F_OPE1) }, { F (F_ACCJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mmulhs ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_ACC40SK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmmulhs ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_ACC40SK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mqmulhs ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_ACC40SK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmqmulhs ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_ACC40SK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mmachu ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_ACC40UK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmmachu ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_ACC40UK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mqmachu ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_ACC40UK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmqmachu ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_ACC40UK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmexpdhw ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_U6) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mexpdhd ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_U6) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmexpdhd ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_U6) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_munpackh ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fff, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mdunpackh ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fff, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mbtoh ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmbtoh ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fff0c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mhtob ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_OPE1) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmhtob ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fff0c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_cmbtohe ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fff0c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_FRJ) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mnop ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_ACC40SK) }, { F (F_OP) }, { F (F_A) }, { F (F_MISC_NULL_10) }, { F (F_OPE1) }, { F (F_FRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mclracc_0 ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1ffffff, { { F (F_PACK) }, { F (F_ACC40SK) }, { F (F_OP) }, { F (F_A) }, { F (F_MISC_NULL_10) }, { F (F_OPE1) }, { F (F_FRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mrdacc ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fff, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_ACC40SI) }, { F (F_OPE1) }, { F (F_FRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mrdaccg ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fff, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_ACCGI) }, { F (F_OPE1) }, { F (F_FRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mwtacc ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fff, { { F (F_PACK) }, { F (F_ACC40SK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_mwtaccg ATTRIBUTE_UNUSED = { |
| 32, 32, 0x1fc0fff, { { F (F_PACK) }, { F (F_ACCGK) }, { F (F_OP) }, { F (F_FRI) }, { F (F_OPE1) }, { F (F_FRJ_NULL) }, { 0 } } |
| }; |
| |
| static const CGEN_IFMT ifmt_fnop ATTRIBUTE_UNUSED = { |
| 32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_RD_NULL) }, { F (F_OP) }, { F (F_FRI_NULL) }, { F (F_OPE1) }, { F (F_FRJ_NULL) }, { 0 } } |
| }; |
| |
| #undef F |
| |
| #define A(a) (1 << CGEN_INSN_##a) |
| #define OPERAND(op) FRV_OPERAND_##op |
| #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ |
| #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) |
| |
| /* The instruction table. */ |
| |
| static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] = |
| { |
| /* Special null first entry. |
| A `num' value of zero is thus invalid. |
| Also, the special `invalid' insn resides here. */ |
| { { 0, 0, 0, 0 }, {{0}}, 0, {0}}, |
| /* add$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x0 } |
| }, |
| /* sub$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x100 } |
| }, |
| /* and$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x40000 } |
| }, |
| /* or$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x40080 } |
| }, |
| /* xor$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x40100 } |
| }, |
| /* not$pack $GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_not, { 0x40180 } |
| }, |
| /* sdiv$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x380 } |
| }, |
| /* nsdiv$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x40380 } |
| }, |
| /* udiv$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x3c0 } |
| }, |
| /* nudiv$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x403c0 } |
| }, |
| /* smul$pack $GRi,$GRj,$GRdoublek */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRDOUBLEK), 0 } }, |
| & ifmt_smul, { 0x200 } |
| }, |
| /* umul$pack $GRi,$GRj,$GRdoublek */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRDOUBLEK), 0 } }, |
| & ifmt_smul, { 0x280 } |
| }, |
| /* smu$pack $GRi,$GRj */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), 0 } }, |
| & ifmt_smu, { 0x1180140 } |
| }, |
| /* smass$pack $GRi,$GRj */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), 0 } }, |
| & ifmt_smu, { 0x1180180 } |
| }, |
| /* smsss$pack $GRi,$GRj */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), 0 } }, |
| & ifmt_smu, { 0x11801c0 } |
| }, |
| /* sll$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x40200 } |
| }, |
| /* srl$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x40280 } |
| }, |
| /* sra$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x40300 } |
| }, |
| /* slass$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_slass, { 0x1180080 } |
| }, |
| /* scutss$pack $GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_scutss, { 0x1180100 } |
| }, |
| /* scan$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_add, { 0x2c0000 } |
| }, |
| /* cadd$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1600000 } |
| }, |
| /* csub$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1600040 } |
| }, |
| /* cand$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1680000 } |
| }, |
| /* cor$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1680040 } |
| }, |
| /* cxor$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1680080 } |
| }, |
| /* cnot$pack $GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cnot, { 0x16800c0 } |
| }, |
| /* csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRDOUBLEK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_csmul, { 0x1600080 } |
| }, |
| /* csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x16000c0 } |
| }, |
| /* cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x16400c0 } |
| }, |
| /* csll$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1700000 } |
| }, |
| /* csrl$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1700040 } |
| }, |
| /* csra$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1700080 } |
| }, |
| /* cscan$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x19400c0 } |
| }, |
| /* addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x40 } |
| }, |
| /* subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x140 } |
| }, |
| /* andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x40040 } |
| }, |
| /* orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x400c0 } |
| }, |
| /* xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x40140 } |
| }, |
| /* sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x40240 } |
| }, |
| /* srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x402c0 } |
| }, |
| /* sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x40340 } |
| }, |
| /* smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRDOUBLEK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_smulcc, { 0x240 } |
| }, |
| /* umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRDOUBLEK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_smulcc, { 0x2c0 } |
| }, |
| /* caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1640000 } |
| }, |
| /* csubcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1640040 } |
| }, |
| /* csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRDOUBLEK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_csmul, { 0x1640080 } |
| }, |
| /* candcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x16c0000 } |
| }, |
| /* corcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x16c0040 } |
| }, |
| /* cxorcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x16c0080 } |
| }, |
| /* csllcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1740000 } |
| }, |
| /* csrlcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1740040 } |
| }, |
| /* csracc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (CCI), ',', OP (COND), 0 } }, |
| & ifmt_cadd, { 0x1740080 } |
| }, |
| /* addx$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x80 } |
| }, |
| /* subx$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x180 } |
| }, |
| /* addxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0xc0 } |
| }, |
| /* subxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addcc, { 0x1c0 } |
| }, |
| /* addss$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_slass, { 0x1180000 } |
| }, |
| /* subss$pack $GRi,$GRj,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } }, |
| & ifmt_slass, { 0x1180040 } |
| }, |
| /* addi$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0x400000 } |
| }, |
| /* subi$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0x500000 } |
| }, |
| /* andi$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0x800000 } |
| }, |
| /* ori$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0x880000 } |
| }, |
| /* xori$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0x900000 } |
| }, |
| /* sdivi$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0x780000 } |
| }, |
| /* nsdivi$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0xb80000 } |
| }, |
| /* udivi$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0x7c0000 } |
| }, |
| /* nudivi$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0xbc0000 } |
| }, |
| /* smuli$pack $GRi,$s12,$GRdoublek */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRDOUBLEK), 0 } }, |
| & ifmt_smuli, { 0x600000 } |
| }, |
| /* umuli$pack $GRi,$s12,$GRdoublek */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRDOUBLEK), 0 } }, |
| & ifmt_smuli, { 0x680000 } |
| }, |
| /* slli$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0xa00000 } |
| }, |
| /* srli$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0xa80000 } |
| }, |
| /* srai$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0xb00000 } |
| }, |
| /* scani$pack $GRi,$s12,$GRk */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S12), ',', OP (GRK), 0 } }, |
| & ifmt_addi, { 0x11c0000 } |
| }, |
| /* addicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0x440000 } |
| }, |
| /* subicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0x540000 } |
| }, |
| /* andicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0x840000 } |
| }, |
| /* oricc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0x8c0000 } |
| }, |
| /* xoricc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0x940000 } |
| }, |
| /* smulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRDOUBLEK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_smulicc, { 0x640000 } |
| }, |
| /* umulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRDOUBLEK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_smulicc, { 0x6c0000 } |
| }, |
| /* sllicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0xa40000 } |
| }, |
| /* srlicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0xac0000 } |
| }, |
| /* sraicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0xb40000 } |
| }, |
| /* addxi$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0x480000 } |
| }, |
| /* subxi$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0x580000 } |
| }, |
| /* addxicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0x4c0000 } |
| }, |
| /* subxicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (S10), ',', OP (GRK), ',', OP (ICCI_1), 0 } }, |
| & ifmt_addicc, { 0x5c0000 } |
| }, |
| /* cmpb$pack $GRi,$GRj,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (ICCI_1), 0 } }, |
| & ifmt_cmpb, { 0x300 } |
| }, |
| /* cmpba$pack $GRi,$GRj,$ICCi_1 */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (ICCI_1), 0 } }, |
| & ifmt_cmpb, { 0x340 } |
| }, |
| /* setlo$pack $ulo16,$GRklo */ |
| { |
| { 0, 0, 0, 0 }, |
| { { MNEM, OP (PACK), ' ', OP (ULO16), ',', OP (GRKLO), 0 } }, |
| & ifmt_setlo, { 0xf40000 } |
|
