blob: 6b17da2e2e92f8562b6ed3f1c3f3ace5a91ac3cc [file] [log] [blame]
diff -ru gcc-4.7.1/gcc/config/arm/t-arm-elf gcc-4.7.1.patched/gcc/config/arm/t-arm-elf
--- gcc-4.7.1/gcc/config/arm/t-arm-elf 2011-11-02 08:23:48.000000000 -0700
+++ gcc-4.7.1.patched/gcc/config/arm/t-arm-elf 2012-07-21 11:04:26.443951308 -0700
@@ -26,22 +26,36 @@
#MULTILIB_DIRNAMES += fa526 fa626 fa606te fa626te fmp626 fa726te
#MULTILIB_EXCEPTIONS += *mthumb*/*mcpu=fa526 *mthumb*/*mcpu=fa626
-#MULTILIB_OPTIONS += march=armv7
-#MULTILIB_DIRNAMES += thumb2
-#MULTILIB_EXCEPTIONS += march=armv7* marm/*march=armv7*
-#MULTILIB_MATCHES += march?armv7=march?armv7-a
-#MULTILIB_MATCHES += march?armv7=march?armv7-r
-#MULTILIB_MATCHES += march?armv7=march?armv7-m
-#MULTILIB_MATCHES += march?armv7=mcpu?cortex-a8
-#MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4
-#MULTILIB_MATCHES += march?armv7=mcpu?cortex-m3
+# build a bunch of specialized versions of libcc for particular cores
+#MULTILIB_OPTIONS += mcpu=arm7tdmi/mcpu=arm9tdmi/mcpu=arm920t/mcpu=arm926ej-s/mcpu=arm1136j-s/mcpu=arm1136jf-s/mcpu=arm1176jz-s/mcpu=arm1176jzf-s/mcpu=xscale/mcpu=mpcore/mcpu=cortex-a8/cortex-a9/march=armv4t/march=armv5t/march=armv5te/march=armv6/march=armv6j/march=armv6k/march=armv6z/march=armv6zk/march=armv7-a/march=armv7-r
+#MULTILIB_DIRNAMES += arm7tdmi arm9tdmi arm920t arm926ej-s arm1136j-s arm1136jf-s arm1176jz-s arm1176jzf-s xscale mpcore cortex-a8 cortex-a9 cortex-m3 armv4t armv5t armv5te armv6 armv6j armv6k armv6z armv6zk armv7-a armv7-r
+#MULTILIB_OPTIONS += mcpu=arm7tdmi/mcpu=arm9tdmi/mcpu=arm920t/mcpu=arm926ej-s/mcpu=arm1136j-s/mcpu=arm1136jf-s/mcpu=arm1176jz-s/mcpu=arm1176jzf-s/mcpu=xscale/mcpu=mpcore/mcpu=cortex-a8/mcpu=cortex-a9
+#MULTILIB_DIRNAMES += arm7tdmi arm9tdmi arm920t arm926ej-s arm1136j-s arm1136jf-s arm1176jz-s arm1176jzf-s xscale mpcore cortex-a8 cortex-a9
+
+MULTILIB_OPTIONS += march=armv7
+MULTILIB_DIRNAMES += thumb2
+MULTILIB_EXCEPTIONS += march=armv7* marm/*march=armv7*
+MULTILIB_MATCHES += march?armv7=march?armv7-a
+MULTILIB_MATCHES += march?armv7=march?armv7-r
+MULTILIB_MATCHES += march?armv7=march?armv7-m
+MULTILIB_MATCHES += march?armv7=mcpu?cortex-a15
+MULTILIB_MATCHES += march?armv7=mcpu?cortex-a9
+MULTILIB_MATCHES += march?armv7=mcpu?cortex-a8
+MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4
+MULTILIB_MATCHES += march?armv7=mcpu?cortex-m4
+MULTILIB_MATCHES += march?armv7=mcpu?cortex-m3
+
+#MULTILIB_OPTIONS += mfpu=vfp
+#MULTILIB_DIRNAMES += vfp
+#MULTILIB_MATCHES += mfpu?vfp=mcpu?arm1136jf-s
+#MULTILIB_MATCHES += mfpu?vfp=mcpu?arm1136jzf-s
# Not quite true. We can support hard-vfp calling in Thumb2, but how do we
# express that here? Also, we really need architecture v5e or later
# (mcrr etc).
-MULTILIB_OPTIONS += mfloat-abi=hard
-MULTILIB_DIRNAMES += fpu
-MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard*
+#MULTILIB_OPTIONS += mfloat-abi=hard
+#MULTILIB_DIRNAMES += fpu
+#MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard*
#MULTILIB_EXCEPTIONS += *mcpu=fa526/*mfloat-abi=hard*
#MULTILIB_EXCEPTIONS += *mcpu=fa626/*mfloat-abi=hard*
@@ -57,8 +71,8 @@
# MULTILIB_DIRNAMES += fpu soft
# MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard*
#
-# MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork
-# MULTILIB_DIRNAMES += normal interwork
+MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork
+MULTILIB_DIRNAMES += normal interwork
#
# MULTILIB_OPTIONS += fno-leading-underscore/fleading-underscore
# MULTILIB_DIRNAMES += elf under