)]}'
{
  "commit": "49fa59e82e4c6ea798f65fc4e5948eae63ad6e07",
  "tree": "db7bf760032dda687392b154b7680135fee235df",
  "parents": [
    "70d54d4a6e1cd55db4d9ec00e746e79e98493226"
  ],
  "author": {
    "name": "Hao Wu",
    "email": "hao.a.wu@intel.com",
    "time": "Thu Sep 13 15:53:31 2018 +0800"
  },
  "committer": {
    "name": "Hao Wu",
    "email": "hao.a.wu@intel.com",
    "time": "Fri Nov 16 09:00:05 2018 +0800"
  },
  "message": "UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass\n\nREF:https://bugzilla.tianocore.org/show_bug.cgi?id\u003d1194\n\nSpeculative execution is used by processor to avoid having to wait for\ndata to arrive from memory, or for previous operations to finish, the\nprocessor may speculate as to what will be executed.\n\nIf the speculation is incorrect, the speculatively executed instructions\nmight leave hints such as which memory locations have been brought into\ncache. Malicious actors can use the bounds check bypass method (code\ngadgets with controlled external inputs) to infer data values that have\nbeen used in speculative operations to reveal secrets which should not\notherwise be accessed.\n\nIt is possible for SMI handler(s) to call EFI_SMM_CPU_PROTOCOL service\nReadSaveState() and use the content in the \u0027CommBuffer\u0027 (controlled\nexternal inputs) as the \u0027CpuIndex\u0027. So this commit will insert AsmLfence\nAPI to mitigate the bounds check bypass issue within SmmReadSaveState().\n\nFor SmmReadSaveState():\n\nThe \u0027CpuIndex\u0027 will be passed into function ReadSaveStateRegister(). And\nthen in to ReadSaveStateRegisterByIndex().\n\nWith the call:\nReadSaveStateRegisterByIndex (\n  CpuIndex,\n  SMM_SAVE_STATE_REGISTER_IOMISC_INDEX,\n  sizeof(IoMisc.Uint32),\n  \u0026IoMisc.Uint32\n  );\n\nThe \u0027IoMisc\u0027 can be a cross boundary access during speculative execution.\nLater, \u0027IoMisc\u0027 is used as the index to access buffers \u0027mSmmCpuIoWidth\u0027\nand \u0027mSmmCpuIoType\u0027. One can observe which part of the content within\nthose buffers was brought into cache to possibly reveal the value of\n\u0027IoMisc\u0027.\n\nHence, this commit adds a AsmLfence() after the check of \u0027CpuIndex\u0027\nwithin function SmmReadSaveState() to prevent the speculative execution.\n\nA more detailed explanation of the purpose of commit is under the\n\u0027Bounds check bypass mitigation\u0027 section of the below link:\nhttps://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation\n\nAnd the document at:\nhttps://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf\n\nCc: Michael D Kinney \u003cmichael.d.kinney@intel.com\u003e\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Hao Wu \u003chao.a.wu@intel.com\u003e\nReviewed-by: Jiewen Yao \u003cjiewen.yao@intel.com\u003e\nReviewed-by: Eric Dong \u003ceric.dong@intel.com\u003e\nAcked-by: Laszlo Ersek \u003clersek@redhat.com\u003e\nRegression-tested-by: Laszlo Ersek \u003clersek@redhat.com\u003e\n(cherry picked from commit 5b02be4d9a234d80c7578fc3a0c789d22ce83f38)\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a27d1f4684f5cc0e0d2b601544cba445d5469714",
      "old_mode": 33261,
      "old_path": "UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c",
      "new_id": "5c887a98eeb9f5bb2603361f4c6ca05d7480bf3e",
      "new_mode": 33261,
      "new_path": "UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c"
    }
  ]
}