| ## @file | |
| # FDF file of Clanton Peak CRB platform with 32-bit DXE | |
| # | |
| # This package provides QuarkNcSocId platform specific modules. | |
| # Copyright (c) 2013 - 2017 Intel Corporation. | |
| # | |
| # This program and the accompanying materials | |
| # are licensed and made available under the terms and conditions of the BSD License | |
| # which accompanies this distribution. The full text of the license may be found at | |
| # http://opensource.org/licenses/bsd-license.php | |
| # | |
| # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
| # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
| # | |
| ## | |
| ################################################################################ | |
| # | |
| # Defines Section - statements that will be processed to create a Makefile. | |
| # | |
| ################################################################################ | |
| [Defines] | |
| # Address 0x100000000 (4 GB reset address) | |
| # Base Size | |
| # +---------------------------+ | |
| # FLASH_BASE | FD.Quark: | 0x800000 (8 MB) | |
| # 0xFF800000 | BaseAddress | | |
| # +---------------------------+ | |
| # | |
| # Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part. | |
| # 0xFF800000 + 0x400000 = 0xFFC00000. | |
| # | |
| # Address 0x0 (0xFF800000 for 8 MB SPI part) | |
| # +---------------------------+ | |
| # FLASH_FV_PAYLOAD_BASE | Payload Image | FLASH_FV_PAYLOAD_SIZE | |
| # 0x00400000 | | 0x00100000 | |
| # +---------------------------+ | |
| # FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE | |
| # 0x00500000 | | 0x001E0000 | |
| # +---------------------------+ | |
| # NVRAM_AREA_BASE | NVRAM Area= | NVRAM_AREA_SIZE | |
| # 0x006E0000 | Variable + FTW Working + | | |
| # | FTW Spare | | |
| # +---+-------------------+---+ | |
| # NVRAM_AREA_VARIABLE_BASE | | NVRAM_AREA_VARIABLE_SIZE | |
| # | | | |
| # +-------------------+ | |
| # FTW_WORKING_BASE | | FTW_WORKING_SIZE | |
| # | | | |
| # +-------------------+ | |
| # FTW_SPARE_BASE | | FTW_SPARE_SIZE | |
| # | | | |
| # +---+-------------------+---+ | |
| # RMU_BINARY_BASE | RMU Binary | RMU_BINARY_SIZE | |
| # 0x00700000 | | 0x00008000 | |
| # +---------------------------+ | |
| # PLATFORM_DATA_BASE | PlatformData Binary | PLATFORM_DATA_SIZE | |
| # 0x00710000 | | 0x00001000 | |
| # +---------------------------+ | |
| # FVRECOVERY_IMAGE_BASE | FVRECOVERY Image | FVRECOVERY_IMAGE_SIZE | |
| # 0x720000 | | 0x000E0000 | |
| # +---------------------------+ | |
| # | |
| # Define value used to compute FLASH regions below reset vector location just below 4GB | |
| # | |
| DEFINE RESET_ADDRESS = 0x100000000 # 4 GB | |
| # | |
| # Set size of FLASH to 8MB | |
| # | |
| DEFINE FLASH_SIZE = 0x800000 | |
| DEFINE FLASH_BASE = $(RESET_ADDRESS) - $(FLASH_SIZE) # The base address of the Flash Device | |
| # | |
| # Set FLASH block size to 4KB | |
| # | |
| DEFINE FLASH_BLOCKSIZE = 0x1000 # 4 KB | |
| # | |
| # Misc settings | |
| # | |
| DEFINE FLASH_BLOCKSIZE_DATA = 0x00, 0x10, 0x00, 0x00 # equivalent for DATA blocks | |
| # | |
| # Start PAYLOAD at 4MB into 8MB FLASH | |
| # | |
| DEFINE FLASH_FV_PAYLOAD_BASE = 0x00400000 | |
| DEFINE FLASH_FV_PAYLOAD_SIZE = 0x00100000 | |
| # | |
| # Put FVMAIN between PAYLOAD and RMU Binary | |
| # | |
| DEFINE FLASH_FV_MAIN_BASE = 0x00500000 | |
| DEFINE FLASH_FV_MAIN_SIZE = 0x001E0000 | |
| # | |
| # Place NV Storage just above Platform Data Base | |
| # | |
| DEFINE NVRAM_AREA_VARIABLE_BASE = 0x006E0000 | |
| DEFINE NVRAM_AREA_SIZE = 0x00020000 | |
| DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x0000E000 | |
| DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE) | |
| DEFINE FTW_WORKING_SIZE = 0x00002000 | |
| DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE) | |
| DEFINE FTW_SPARE_SIZE = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE) | |
| # | |
| # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000) | |
| # | |
| DEFINE RMU_BINARY_BASE = 0x00700000 # HW fixed address | |
| DEFINE RMU_BINARY_SIZE = 0x00008000 # HW fixed address, so fixed size | |
| # | |
| # Platform Data Base must be 64KB above RMU | |
| # | |
| DEFINE VPD_BASE = 0x00708000 | |
| DEFINE VPD_SIZE = 0x00001000 | |
| # | |
| # Place FV Recovery above NV Storage | |
| # | |
| DEFINE FVRECOVERY_IMAGE_SIZE = 0x000F0000 | |
| DEFINE FVRECOVERY_IMAGE_BASE = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE) | |
| ################################################################################ | |
| # | |
| # FD Section | |
| # The [FD] Section is made up of the definition statements and a | |
| # description of what goes into the Flash Device Image. Each FD section | |
| # defines one flash "device" image. A flash device image may be one of | |
| # the following: Removable media bootable image (like a boot floppy | |
| # image,) an Option ROM image (that would be "flashed" into an add-in | |
| # card,) a System "Flash" image (that would be burned into a system's | |
| # flash) or an Update ("Capsule") image that will be used to update and | |
| # existing system flash. | |
| # | |
| ################################################################################ | |
| [FD.Quark] | |
| BaseAddress = 0xFF800000 #The base address of the Flash Device; set to same value as FLASH_BASE. | |
| Size = 0x800000 #The size in bytes of the Flash Device; set to same value as FLASH_SIZE. | |
| ErasePolarity = 1 | |
| BlockSize = $(FLASH_BLOCKSIZE) | |
| NumBlocks = 0x800 #The number of blocks for the Flash Device. | |
| SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE) | |
| SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE) | |
| ################################################################################ | |
| # | |
| # Following are lists of FD Region layout which correspond to the locations of different | |
| # images within the flash device. | |
| # | |
| # Regions must be defined in ascending order and may not overlap. | |
| # | |
| # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by | |
| # the pipe "|" character, followed by the size of the region, also in hex with the leading | |
| # "0x" characters. Like: | |
| # Offset|Size | |
| # PcdOffsetCName|PcdSizeCName | |
| # RegionType <FV, DATA, or FILE> | |
| # | |
| ################################################################################ | |
| ######################################################## | |
| # Quark Payload Image | |
| ######################################################## | |
| $(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE) | |
| gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize | |
| FV = PAYLOAD | |
| ######################################################## | |
| # Quark FVMAIN Image (Compressed) | |
| ######################################################## | |
| $(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE) | |
| gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize | |
| FV = FVMAIN_COMPACT | |
| ############################################################################# | |
| # Quark NVRAM Area | |
| # Quark NVRAM Area contains: Variable + FTW Working + FTW Spare | |
| ############################################################################# | |
| $(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE) | |
| gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize | |
| #NV_VARIABLE_STORE | |
| DATA = { | |
| ## This is the EFI_FIRMWARE_VOLUME_HEADER | |
| # ZeroVector [] | |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| # FileSystemGuid: gEfiSystemNvDataFvGuid = | |
| # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} | |
| 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, | |
| 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, | |
| # FvLength: 0x20000 | |
| 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| #Signature "_FVH" #Attributes | |
| 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, | |
| #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision | |
| 0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02, | |
| #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block | |
| 0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA), | |
| #Blockmap[1]: End | |
| 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| ## This is the VARIABLE_STORE_HEADER | |
| !if $(SECURE_BOOT_ENABLE) | |
| # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } } | |
| 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, | |
| 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, | |
| !else | |
| # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} | |
| 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, | |
| 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, | |
| !endif | |
| #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8 | |
| # This can speed up the Variable Dispatch a bit. | |
| 0xB8, 0xDF, 0x00, 0x00, | |
| #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 | |
| 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | |
| } | |
| $(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE) | |
| gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize | |
| #NV_FTW_WORKING | |
| DATA = { | |
| # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid = | |
| # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }} | |
| 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49, | |
| 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95, | |
| # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved | |
| 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF, | |
| # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0 | |
| 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | |
| } | |
| $(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE) | |
| gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize | |
| #NV_FTW_SPARE | |
| ######################################################### | |
| # Quark Remote Management Unit Binary | |
| ######################################################### | |
| $(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE) | |
| INF QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf | |
| ######################################################### | |
| # PlatformData Binary, default for standalone is none built-in so user selects. | |
| ######################################################### | |
| $(VPD_BASE)|$(VPD_SIZE) | |
| gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress | |
| FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin | |
| ####################### | |
| # Quark FVRECOVERY Image | |
| ####################### | |
| $(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE) | |
| gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize | |
| FV = FVRECOVERY | |
| ################################################################################ | |
| # | |
| # FV Section | |
| # | |
| # [FV] section is used to define what components or modules are placed within a flash | |
| # device file. This section also defines order the components and modules are positioned | |
| # within the image. The [FV] section consists of define statements, set statements and | |
| # module statements. | |
| # | |
| ################################################################################ | |
| [FV.FVRECOVERY] | |
| BlockSize = $(FLASH_BLOCKSIZE) | |
| FvAlignment = 16 #FV alignment and FV attributes setting. | |
| ERASE_POLARITY = 1 | |
| MEMORY_MAPPED = TRUE | |
| STICKY_WRITE = TRUE | |
| LOCK_CAP = TRUE | |
| LOCK_STATUS = TRUE | |
| WRITE_DISABLED_CAP = TRUE | |
| WRITE_ENABLED_CAP = TRUE | |
| WRITE_STATUS = TRUE | |
| WRITE_LOCK_CAP = TRUE | |
| WRITE_LOCK_STATUS = TRUE | |
| READ_DISABLED_CAP = TRUE | |
| READ_ENABLED_CAP = TRUE | |
| READ_STATUS = TRUE | |
| READ_LOCK_CAP = TRUE | |
| READ_LOCK_STATUS = TRUE | |
| FvNameGuid = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8 | |
| ################################################################################ | |
| # | |
| # The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image. | |
| # Parsing tools will scan the INF file to determine the type of component or module. | |
| # The component or module type is used to reference the standard rules | |
| # defined elsewhere in the FDF file. | |
| # | |
| # The format for INF statements is: | |
| # INF $(PathAndInfFileName) | |
| # | |
| ################################################################################ | |
| ## | |
| # PEI Apriori file example, more PEIM module added later. | |
| ## | |
| APRIORI PEI { | |
| INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf | |
| # PlatformConfigPei should be immediately after Pcd driver. | |
| INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf | |
| INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf | |
| INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf | |
| INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf | |
| } | |
| ## | |
| # SEC Phase modules | |
| ## | |
| INF UefiCpuPkg/SecCore/SecCore.inf | |
| !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE) | |
| # FMP image decriptor | |
| INF RuleOverride = FMP_IMAGE_DESC QuarkPlatformPkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | |
| !endif | |
| INF MdeModulePkg/Core/Pei/PeiMain.inf | |
| ## | |
| # PEI Phase RAW Data files. | |
| ## | |
| FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) { | |
| SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin | |
| } | |
| INF RuleOverride = NORELOC MdeModulePkg/Universal/PCD/Pei/Pcd.inf | |
| INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf | |
| INF RuleOverride = NORELOC MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf | |
| INF RuleOverride = NORELOC MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf | |
| INF RuleOverride = NORELOC MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf | |
| INF RuleOverride = NORELOC MdeModulePkg/Universal/Variable/Pei/VariablePei.inf | |
| INF RuleOverride = NORELOC UefiCpuPkg/CpuMpPei/CpuMpPei.inf | |
| INF RuleOverride = NORELOC MdeModulePkg/Universal/CapsulePei/CapsulePei.inf | |
| INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf | |
| INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmAccessPei.inf | |
| INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.inf | |
| INF QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf | |
| INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf | |
| INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | |
| INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf | |
| INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf | |
| !if $(MEASURED_BOOT_ENABLE) | |
| INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf | |
| INF SecurityPkg/Tcg/TcgPei/TcgPei.inf | |
| !endif | |
| !if $(RECOVERY_ENABLE) | |
| FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 { | |
| SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid} | |
| SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID | |
| SECTION FV_IMAGE = FVRECOVERY_COMPONENTS | |
| } | |
| } | |
| !endif | |
| !if $(RECOVERY_ENABLE) | |
| ################################################################################ | |
| # | |
| # FV Section | |
| # | |
| # [FV] section is used to define what components or modules are placed within a flash | |
| # device file. This section also defines order the components and modules are positioned | |
| # within the image. The [FV] section consists of define statements, set statements and | |
| # module statements. | |
| # | |
| ################################################################################ | |
| [FV.FVRECOVERY_COMPONENTS] | |
| BlockSize = $(FLASH_BLOCKSIZE) | |
| FvAlignment = 16 #FV alignment and FV attributes setting. | |
| ERASE_POLARITY = 1 | |
| MEMORY_MAPPED = TRUE | |
| STICKY_WRITE = TRUE | |
| LOCK_CAP = TRUE | |
| LOCK_STATUS = TRUE | |
| WRITE_DISABLED_CAP = TRUE | |
| WRITE_ENABLED_CAP = TRUE | |
| WRITE_STATUS = TRUE | |
| WRITE_LOCK_CAP = TRUE | |
| WRITE_LOCK_STATUS = TRUE | |
| READ_DISABLED_CAP = TRUE | |
| READ_ENABLED_CAP = TRUE | |
| READ_STATUS = TRUE | |
| READ_LOCK_CAP = TRUE | |
| READ_LOCK_STATUS = TRUE | |
| INF QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/UsbPei.inf | |
| INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf | |
| INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/OhciPei.inf | |
| INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf | |
| INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf | |
| INF FatPkg/FatPei/FatPei.inf | |
| INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf | |
| INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf | |
| !endif | |
| ################################################################################ | |
| # | |
| # FV Section | |
| # | |
| # [FV] section is used to define what components or modules are placed within a flash | |
| # device file. This section also defines order the components and modules are positioned | |
| # within the image. The [FV] section consists of define statements, set statements and | |
| # module statements. | |
| # | |
| ################################################################################ | |
| [FV.FVMAIN] | |
| BlockSize = $(FLASH_BLOCKSIZE) | |
| FvAlignment = 16 | |
| ERASE_POLARITY = 1 | |
| MEMORY_MAPPED = TRUE | |
| STICKY_WRITE = TRUE | |
| LOCK_CAP = TRUE | |
| LOCK_STATUS = TRUE | |
| WRITE_DISABLED_CAP = TRUE | |
| WRITE_ENABLED_CAP = TRUE | |
| WRITE_STATUS = TRUE | |
| WRITE_LOCK_CAP = TRUE | |
| WRITE_LOCK_STATUS = TRUE | |
| READ_DISABLED_CAP = TRUE | |
| READ_ENABLED_CAP = TRUE | |
| READ_STATUS = TRUE | |
| READ_LOCK_CAP = TRUE | |
| READ_LOCK_STATUS = TRUE | |
| FvNameGuid = 30D9ED01-38D2-418a-90D5-C561750BF80F | |
| ## | |
| # DXE Phase modules | |
| ## | |
| INF MdeModulePkg/Core/Dxe/DxeMain.inf | |
| INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf | |
| !if $(SOURCE_DEBUG_ENABLE) | |
| INF SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf | |
| !endif | |
| # | |
| # Early SoC / Platform modules | |
| # | |
| INF QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf | |
| ## | |
| # EDK Core modules | |
| ## | |
| INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | |
| INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf | |
| INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf | |
| INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf | |
| INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf | |
| INF MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf | |
| INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf | |
| INF UefiCpuPkg/CpuDxe/CpuDxe.inf | |
| INF MdeModulePkg/Universal/Metronome/Metronome.inf | |
| INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf | |
| INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf | |
| INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf | |
| !if $(SECURE_BOOT_ENABLE) | |
| INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf | |
| !endif | |
| INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf | |
| INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf | |
| INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf | |
| INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf | |
| INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf | |
| INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf | |
| INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf | |
| INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf | |
| # | |
| # Platform | |
| # | |
| INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf | |
| INF MdeModulePkg/Application/UiApp/UiApp.inf | |
| INF QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf | |
| INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSpi.inf | |
| INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSmmSpi.inf | |
| INF QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf | |
| INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf | |
| INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf | |
| INF QuarkSocPkg/QuarkNorthCluster/S3Support/Dxe/QncS3Support.inf | |
| INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiRuntime.inf | |
| INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiSmm.inf | |
| INF QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf | |
| # | |
| # ACPI | |
| # | |
| INF QuarkPlatformPkg/Platform/Dxe/SaveMemoryConfig/SaveMemoryConfig.inf | |
| INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf | |
| #INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf | |
| INF QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/BootScriptExecutorDxe.inf | |
| INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf | |
| INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf | |
| INF QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.inf | |
| INF RuleOverride = ACPITABLE QuarkPlatformPkg/Acpi/AcpiTables/AcpiTables.inf | |
| # | |
| # SMM | |
| # | |
| INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf | |
| INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf | |
| INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | |
| INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf | |
| INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf | |
| INF QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmDispatcher.inf | |
| INF QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf | |
| INF QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/SmmPowerManagement.inf | |
| INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf | |
| INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf | |
| # | |
| # SMBIOS | |
| # | |
| INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf | |
| INF QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/SmbiosMiscDxe.inf | |
| INF QuarkPlatformPkg/Platform/Dxe/MemorySubClass/MemorySubClass.inf | |
| # | |
| # PCI | |
| # | |
| INF QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf | |
| INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | |
| INF QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf | |
| !if $(SOURCE_DEBUG_ENABLE) | |
| !else | |
| INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf | |
| !endif | |
| # | |
| # USB | |
| # | |
| !if $(PERFORMANCE_ENABLE) | |
| !else | |
| INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf | |
| INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf | |
| INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf | |
| INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf | |
| INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf | |
| INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf | |
| !endif | |
| # | |
| # SDIO | |
| # | |
| !if $(PERFORMANCE_ENABLE) | |
| !else | |
| INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControllerDxe.inf | |
| INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/SDMediaDeviceDxe.inf | |
| !endif | |
| # | |
| # Console | |
| # | |
| INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf | |
| INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf | |
| INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf | |
| INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf | |
| INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf | |
| INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf | |
| INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf | |
| # | |
| # File System Modules | |
| # | |
| !if $(PERFORMANCE_ENABLE) | |
| !else | |
| INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf | |
| INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf | |
| INF FatPkg/EnhancedFatDxe/Fat.inf | |
| !endif | |
| # | |
| # Performance Application | |
| # | |
| !if $(PERFORMANCE_ENABLE) | |
| INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf | |
| !endif | |
| # | |
| # Trusted Platform Module | |
| # | |
| !if $(MEASURED_BOOT_ENABLE) | |
| INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf | |
| INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf | |
| INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf | |
| !endif | |
| !if $(CAPSULE_ENABLE) | |
| INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf | |
| INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf | |
| !endif | |
| !if $(RECOVERY_ENABLE) | |
| FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) { | |
| SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin | |
| SECTION UI = "Rsa2048Sha256TestSigningPublicKey" | |
| } | |
| !endif | |
| !if $(CAPSULE_ENABLE) | |
| FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) { | |
| SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer | |
| SECTION UI = "Pkcs7TestRoot" | |
| } | |
| !endif | |
| ################################################################################ | |
| # | |
| # FV Section | |
| # | |
| # [FV] section is used to define what components or modules are placed within a flash | |
| # device file. This section also defines order the components and modules are positioned | |
| # within the image. The [FV] section consists of define statements, set statements and | |
| # module statements. | |
| # | |
| ################################################################################ | |
| [FV.FVMAIN_COMPACT] | |
| FvAlignment = 16 | |
| ERASE_POLARITY = 1 | |
| MEMORY_MAPPED = TRUE | |
| STICKY_WRITE = TRUE | |
| LOCK_CAP = TRUE | |
| LOCK_STATUS = TRUE | |
| WRITE_DISABLED_CAP = TRUE | |
| WRITE_ENABLED_CAP = TRUE | |
| WRITE_STATUS = TRUE | |
| WRITE_LOCK_CAP = TRUE | |
| WRITE_LOCK_STATUS = TRUE | |
| READ_DISABLED_CAP = TRUE | |
| READ_ENABLED_CAP = TRUE | |
| READ_STATUS = TRUE | |
| READ_LOCK_CAP = TRUE | |
| READ_LOCK_STATUS = TRUE | |
| FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { | |
| SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID | |
| SECTION FV_IMAGE = FVMAIN | |
| } | |
| } | |
| ################################################################################ | |
| # | |
| # FV Section | |
| # | |
| # [FV] section is used to define what components or modules are placed within a flash | |
| # device file. This section also defines order the components and modules are positioned | |
| # within the image. The [FV] section consists of define statements, set statements and | |
| # module statements. | |
| # | |
| ################################################################################ | |
| [FV.PAYLOAD] | |
| BlockSize = $(FLASH_BLOCKSIZE) | |
| FvAlignment = 16 #FV alignment and FV attributes setting. | |
| ERASE_POLARITY = 1 | |
| MEMORY_MAPPED = TRUE | |
| STICKY_WRITE = TRUE | |
| LOCK_CAP = TRUE | |
| LOCK_STATUS = TRUE | |
| WRITE_DISABLED_CAP = TRUE | |
| WRITE_ENABLED_CAP = TRUE | |
| WRITE_STATUS = TRUE | |
| WRITE_LOCK_CAP = TRUE | |
| WRITE_LOCK_STATUS = TRUE | |
| READ_DISABLED_CAP = TRUE | |
| READ_ENABLED_CAP = TRUE | |
| READ_STATUS = TRUE | |
| READ_LOCK_CAP = TRUE | |
| READ_LOCK_STATUS = TRUE | |
| # | |
| # Shell and Applications | |
| # | |
| INF RuleOverride = TIANOCOMPRESSED ShellPkg/Application/Shell/Shell.inf | |
| !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE) | |
| [FV.CapsuleDispatchFv] | |
| FvAlignment = 16 | |
| ERASE_POLARITY = 1 | |
| MEMORY_MAPPED = TRUE | |
| STICKY_WRITE = TRUE | |
| LOCK_CAP = TRUE | |
| LOCK_STATUS = TRUE | |
| WRITE_DISABLED_CAP = TRUE | |
| WRITE_ENABLED_CAP = TRUE | |
| WRITE_STATUS = TRUE | |
| WRITE_LOCK_CAP = TRUE | |
| WRITE_LOCK_STATUS = TRUE | |
| READ_DISABLED_CAP = TRUE | |
| READ_ENABLED_CAP = TRUE | |
| READ_STATUS = TRUE | |
| READ_LOCK_CAP = TRUE | |
| READ_LOCK_STATUS = TRUE | |
| !if $(CAPSULE_ENABLE) | |
| INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf | |
| !endif | |
| [FV.SystemFirmwareUpdateCargo] | |
| FvAlignment = 16 | |
| ERASE_POLARITY = 1 | |
| MEMORY_MAPPED = TRUE | |
| STICKY_WRITE = TRUE | |
| LOCK_CAP = TRUE | |
| LOCK_STATUS = TRUE | |
| WRITE_DISABLED_CAP = TRUE | |
| WRITE_ENABLED_CAP = TRUE | |
| WRITE_STATUS = TRUE | |
| WRITE_LOCK_CAP = TRUE | |
| WRITE_LOCK_STATUS = TRUE | |
| READ_DISABLED_CAP = TRUE | |
| READ_ENABLED_CAP = TRUE | |
| READ_STATUS = TRUE | |
| READ_LOCK_CAP = TRUE | |
| READ_LOCK_STATUS = TRUE | |
| FILE RAW = 14D83A59-A810-4556-8192-1C0A593C065C { # PcdEdkiiSystemFirmwareFileGuid | |
| FD = Quark | |
| } | |
| FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid | |
| FV = CapsuleDispatchFv | |
| } | |
| FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid | |
| QuarkPlatformPkg/Feature/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | |
| } | |
| !endif | |
| !if $(CAPSULE_ENABLE) | |
| [FmpPayload.FmpPayloadSystemFirmwarePkcs7] | |
| IMAGE_HEADER_INIT_VERSION = 0x02 | |
| IMAGE_TYPE_ID = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid | |
| IMAGE_INDEX = 0x1 | |
| HARDWARE_INSTANCE = 0x0 | |
| MONOTONIC_COUNT = 0x2 | |
| CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7 | |
| FV = SystemFirmwareUpdateCargo | |
| [Capsule.QuarkFirmwareUpdateCapsuleFmpPkcs7] | |
| CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid | |
| CAPSULE_FLAGS = PersistAcrossReset,InitiateReset | |
| CAPSULE_HEADER_SIZE = 0x20 | |
| CAPSULE_HEADER_INIT_VERSION = 0x1 | |
| FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7 | |
| !endif | |
| !if $(RECOVERY_ENABLE) | |
| [FmpPayload.FmpPayloadSystemFirmwareRsa2048] | |
| IMAGE_HEADER_INIT_VERSION = 0x02 | |
| IMAGE_TYPE_ID = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid | |
| IMAGE_INDEX = 0x1 | |
| HARDWARE_INSTANCE = 0x0 | |
| MONOTONIC_COUNT = 0x2 | |
| CERTIFICATE_GUID = A7717414-C616-4977-9420-844712A735BF # RSA2048SHA256 | |
| FV = SystemFirmwareUpdateCargo | |
| [Capsule.QuarkRec] | |
| CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid | |
| CAPSULE_FLAGS = PersistAcrossReset,InitiateReset | |
| CAPSULE_HEADER_SIZE = 0x20 | |
| CAPSULE_HEADER_INIT_VERSION = 0x1 | |
| FMP_PAYLOAD = FmpPayloadSystemFirmwareRsa2048 | |
| !endif | |
| ################################################################################ | |
| # | |
| # Rules are use with the [FV] section's module INF type to define | |
| # how an FFS file is created for a given INF file. The following Rule are the default | |
| # rules for the different module type. User can add the customized rules to define the | |
| # content of the FFS file. | |
| # | |
| ################################################################################ | |
| [Rule.Common.SEC] | |
| FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { | |
| TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| RAW BIN Align = 16 |.com | |
| } | |
| [Rule.Common.PEI_CORE] | |
| FILE PEI_CORE = $(NAMED_GUID) { | |
| TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.PEIM.NORELOC] | |
| FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED { | |
| PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex | |
| TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.PEIM] | |
| FILE PEIM = $(NAMED_GUID) { | |
| PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex | |
| TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.DXE_CORE] | |
| FILE DXE_CORE = $(NAMED_GUID) { | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.UEFI_DRIVER] | |
| FILE DRIVER = $(NAMED_GUID) { | |
| DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.DXE_DRIVER] | |
| FILE DRIVER = $(NAMED_GUID) { | |
| DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.DXE_RUNTIME_DRIVER] | |
| FILE DRIVER = $(NAMED_GUID) { | |
| DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.DXE_SMM_DRIVER] | |
| FILE SMM = $(NAMED_GUID) { | |
| SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE] | |
| FILE SMM = $(NAMED_GUID) { | |
| DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| RAW ACPI Optional |.acpi | |
| RAW ASL Optional |.aml | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.SMM_CORE] | |
| FILE SMM_CORE = $(NAMED_GUID) { | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.UEFI_APPLICATION] | |
| FILE APPLICATION = $(NAMED_GUID) { | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.UEFI_APPLICATION.TIANOCOMPRESSED] | |
| FILE APPLICATION = $(NAMED_GUID) { | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { # TIANO COMPRESS GUID | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| } | |
| } | |
| [Rule.Common.UEFI_APPLICATION.UI] | |
| FILE APPLICATION = $(NAMED_GUID) { | |
| PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="Enter Setup" | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |
| [Rule.Common.USER_DEFINED.ACPITABLE] | |
| FILE FREEFORM = $(NAMED_GUID) { | |
| RAW ACPI |.acpi | |
| RAW ASL |.aml | |
| } | |
| [Rule.Common.PEIM.FMP_IMAGE_DESC] | |
| FILE PEIM = $(NAMED_GUID) { | |
| RAW BIN |.acpi | |
| PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex | |
| PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi | |
| UI STRING="$(MODULE_NAME)" Optional | |
| VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) | |
| } | |