Merge branch 'next' into test2

diff --git a/arch/X86/X86DisassemblerDecoder.c b/arch/X86/X86DisassemblerDecoder.c
index 2dccd40..51bbf8e 100644
--- a/arch/X86/X86DisassemblerDecoder.c
+++ b/arch/X86/X86DisassemblerDecoder.c

@@ -407,60 +407,59 @@
  *
  * @param insn      - The instruction to be queried.
  * @param prefix    - The prefix.
- * @param location  - The location to query.
  * @return          - Whether the prefix is at that location.
  */
-static bool isPrefixAtLocation(struct InternalInstruction *insn, uint8_t prefix,
-		uint64_t location)
+static bool isPrefixAtLocation(struct InternalInstruction *insn, uint8_t prefix)
 {
 	switch (prefix) {
 	case 0x26:
-		if (insn->isPrefix26 && insn->prefix26 == location)
+		if (insn->isPrefix26)
 			return true;
 		break;
 	case 0x2e:
-		if (insn->isPrefix2e && insn->prefix2e == location)
+		if (insn->isPrefix2e)
 			return true;
 		break;
 	case 0x36:
-		if (insn->isPrefix36 && insn->prefix36 == location)
+		if (insn->isPrefix36)
 			return true;
 		break;
 	case 0x3e:
-		if (insn->isPrefix3e && insn->prefix3e == location)
+		if (insn->isPrefix3e)
 			return true;
 		break;
 	case 0x64:
-		if (insn->isPrefix64 && insn->prefix64 == location)
+		if (insn->isPrefix64)
 			return true;
 		break;
 	case 0x65:
-		if (insn->isPrefix65 && insn->prefix65 == location)
+		if (insn->isPrefix65)
 			return true;
 		break;
 	case 0x66:
-		if (insn->isPrefix66 && insn->prefix66 == location)
+		if (insn->isPrefix66)
 			return true;
 		break;
 	case 0x67:
-		if (insn->isPrefix67 && insn->prefix67 == location)
+		if (insn->isPrefix67)
 			return true;
 		break;
 	case 0xf0:
-		if (insn->isPrefixf0 && insn->prefixf0 == location)
+		if (insn->isPrefixf0)
 			return true;
 		break;
 	case 0xf2:
-		if (insn->isPrefixf2 && insn->prefixf2 == location)
+		if (insn->isPrefixf2)
 			return true;
 		break;
 	case 0xf3:
-		if (insn->isPrefixf3 && insn->prefixf3 == location)
+		if (insn->isPrefixf3)
 			return true;
 		break;
 	default:
 		break;
 	}
+
 	return false;
 }
 
@@ -697,7 +696,6 @@
 			} else {
 				unconsumeByte(insn); /* unconsume byte1 */
 				unconsumeByte(insn); /* unconsume byte  */
-				insn->necessaryPrefixLocation = insn->readerCursor - 2;
 			}
 
 			if (insn->vectorExtensionType == TYPE_EVEX) {
@@ -742,10 +740,8 @@
 
 		if (insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) {
 			insn->vectorExtensionType = TYPE_VEX_3B;
-			insn->necessaryPrefixLocation = insn->readerCursor - 1;
 		} else {
 			unconsumeByte(insn);
-			insn->necessaryPrefixLocation = insn->readerCursor - 1;
 		}
 
 		if (insn->vectorExtensionType == TYPE_VEX_3B) {
@@ -807,10 +803,8 @@
 
 		if ((byte1 & 0x38) != 0x0) { /* 0 in these 3 bits is a POP instruction. */
 			insn->vectorExtensionType = TYPE_XOP;
-			insn->necessaryPrefixLocation = insn->readerCursor - 1;
 		} else {
 			unconsumeByte(insn);
-			insn->necessaryPrefixLocation = insn->readerCursor - 1;
 		}
 
 		if (insn->vectorExtensionType == TYPE_XOP) {
@@ -854,15 +848,12 @@
 				}
 
 				insn->rexPrefix = byte;
-				insn->necessaryPrefixLocation = insn->readerCursor - 2;
 				// dbgprintf(insn, "Found REX prefix 0x%hhx", byte);
 			} else {
 				unconsumeByte(insn);
-				insn->necessaryPrefixLocation = insn->readerCursor - 1;
 			}
 		} else {
 			unconsumeByte(insn);
-			insn->necessaryPrefixLocation = insn->readerCursor - 1;
 		}
 	}
 
@@ -917,7 +908,7 @@
 	/* Determine the length of the primary opcode */
 	uint8_t current;
 
-	// printf(">>> readOpcode() = %x\n", insn->readerCursor);
+	//printf(">>> readOpcode() = %llx\n", insn->readerCursor);
 
 	insn->opcodeType = ONEBYTE;
 	insn->firstByte = 0x00;
@@ -1242,13 +1233,13 @@
 			return -1;
 		}
 	} else {
-		if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0x66, insn->necessaryPrefixLocation)) {
+		if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0x66)) {
 			attrMask |= ATTR_OPSIZE;
-		} else if (isPrefixAtLocation(insn, 0x67, insn->necessaryPrefixLocation)) {
+		} else if (isPrefixAtLocation(insn, 0x67)) {
 			attrMask |= ATTR_ADSIZE;
-		} else if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0xf3, insn->necessaryPrefixLocation)) {
+		} else if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0xf3)) {
 			attrMask |= ATTR_XS;
-		} else if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0xf2, insn->necessaryPrefixLocation)) {
+		} else if (insn->mode != MODE_16BIT && isPrefixAtLocation(insn, 0xf2)) {
 			attrMask |= ATTR_XD;
 		}
 	}

diff --git a/arch/X86/X86DisassemblerDecoder.h b/arch/X86/X86DisassemblerDecoder.h
index 8b3e5ba..7309d13 100644
--- a/arch/X86/X86DisassemblerDecoder.h
+++ b/arch/X86/X86DisassemblerDecoder.h

@@ -639,10 +639,6 @@
   /* The type of the vector extension prefix */
   VectorExtensionType vectorExtensionType;
 
-  /* The location where a mandatory prefix would have to be (i.e., right before
-	 the opcode, or right before the REX prefix if one is present) */
-  uint64_t necessaryPrefixLocation;
-
   /* Sizes of various critical pieces of data, in bytes */
   uint8_t registerSize;
   uint8_t addressSize;