commit d03cab449dee0c882912e836d19da9a432c89cc2
author keenk <34660397+keenk@users.noreply.github.com> Fri Jul 13 03:52:19 2018 -0500
committer Nguyen Anh Quynh <aquynh@gmail.com> Fri Jul 13 15:52:19 2018 +0700
tree 21ed3ba7e90d17d06c6fa6b936e31d86860020d6
parent 9b9844d27641109eafe0142c29ec8500dee8522e

Update TestX86.java (#1208)

* Fix java bindings for encoding

Fix java bindings broken with addition of encoding struct in #1194

* Add files via upload


Update TestX86.java for printing encoding struct and register access

* Add files via upload

Added conditions to only print encoding class info when needed.
Formatting.

* Add files via upload

Another space

bindings/java/TestX86.java

diff --git a/bindings/java/TestX86.java b/bindings/java/TestX86.java
index 33e6ad1..3a10962 100644
--- a/bindings/java/TestX86.java
+++ b/bindings/java/TestX86.java
@@ -2,6 +2,9 @@
 // By Nguyen Anh Quynh & Dang Hoang Vu,  2013
 
 import capstone.Capstone;
+import static capstone.Capstone.CS_AC_READ;
+import static capstone.Capstone.CS_AC_WRITE;
+import capstone.Capstone.CsRegsAccess;
 import capstone.X86;
 
 import static capstone.X86_const.*;
@@ -58,9 +61,24 @@
     // print modRM byte
     System.out.printf("\tmodrm: 0x%x\n", operands.modrm);
 
+    // print modRM offset
+    if (operands.encoding.modrmOffset != 0) {
+      System.out.printf("\tmodrm offset: 0x%x\n", operands.encoding.modrmOffset);
+    }
+
     // print displacement value
     System.out.printf("\tdisp: 0x%x\n", operands.disp);
 
+    // print displacement offset
+    if (operands.encoding.dispOffset != 0) {
+      System.out.printf("\tdisp offset: 0x%x\n", operands.encoding.dispOffset);
+    }
+
+    //print displacement size
+    if (operands.encoding.dispSize != 0) {
+      System.out.printf("\tdisp size: 0x%x\n", operands.encoding.dispSize);
+    }
+
     // SIB is not available in 16-bit mode
     if ( (cs.mode & Capstone.CS_MODE_16) == 0) {
       // print SIB byte
@@ -88,6 +106,8 @@
     int count = ins.opCount(X86_OP_IMM);
     if (count > 0) {
       System.out.printf("\timm_count: %d\n", count);
+      System.out.printf("\timm offset: 0x%x\n", operands.encoding.immOffset);
+      System.out.printf("\timm size: 0x%x\n", operands.encoding.immSize);
       for (int i=0; i<count; i++) {
         int index = ins.opIndex(X86_OP_IMM, i + 1);
         System.out.printf("\t\timms[%d]: 0x%x\n", i+1, (operands.op[index].value.imm));
@@ -131,6 +151,40 @@
         }
 
         System.out.printf("\t\toperands[%d].size: %d\n", c, i.size);
+        switch(i.access) {
+          case CS_AC_READ:
+            System.out.printf("\t\toperands[%d].access: READ\n", c);
+            break;
+          case CS_AC_WRITE:
+            System.out.printf("\t\toperands[%d].access: WRITE\n", c);
+            break;
+          case CS_AC_READ | CS_AC_WRITE:
+            System.out.printf("\t\toperands[%d].access: READ | WRITE\n", c);
+            break;
+        }
+      }
+
+      // Print out all registers accessed by this instruction (either implicit or explicit)
+      CsRegsAccess regsAccess = ins.regsAccess();
+      if (regsAccess != null) {
+        short[] regsRead = regsAccess.regsRead;
+        short[] regsWrite = regsAccess.regsWrite;
+
+        if (regsRead.length > 0) {
+          System.out.printf("\tRegisters read:");
+          for (int i = 0; i < regsRead.length; i++) {
+            System.out.printf(" %s", ins.regName(regsRead[i]));
+          }
+          System.out.print("\n");
+        }
+
+        if (regsWrite.length > 0) {
+          System.out.printf("\tRegister modified:");
+          for (int i = 0; i < regsWrite.length; i++) {
+            System.out.printf(" %s", ins.regName(regsWrite[i]));
+          }
+          System.out.print("\n");
+        }
       }
     }
   }