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ff1431da4298944f787794f91a732c60f857d926
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sim
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testsuite
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sim
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cr16
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seq.cgs
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# cr16 testcase for seq reg
# mach(): cr16
.
include
"testutils.inc"
start
.
global
seq
seq
:
mvi_h_condbit
0
movw $12
,
r4
movw $12
,
r5
cmpw r4
,
r5
seq r3
cmpw $1
,
r3
beq ok
not_ok
:
fail
ok
:
pass