| #source: tls32.s |
| #as: -a32 |
| #ld: -shared |
| #objdump: -dr |
| #target: powerpc*-*-* |
| |
| .* |
| |
| Disassembly of section \.text: |
| |
| .* <_start>: |
| .*: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* <_start\+0x4> |
| .*: (7f c8 02 a6|a6 02 c8 7f) mflr r30 |
| .*: (3f de 00 02|02 00 de 3f) addis r30,r30,2 |
| .*: (3b de 80 e8|e8 80 de 3b) addi r30,r30,-32536 |
| .*: (38 7f ff e4|e4 ff 7f 38) addi r3,r31,-28 |
| .*: (48 00 00 01|01 00 00 48) bl .* |
| .*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8 |
| .*: (48 00 00 01|01 00 00 48) bl .* |
| .*: (38 7f ff ec|ec ff 7f 38) addi r3,r31,-20 |
| .*: (48 00 00 5d|5d 00 00 48) bl .*<0+8000\.got2\.plt_pic32\.__tls_get_addr> |
| .*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8 |
| .*: (48 00 00 55|55 00 00 48) bl .*<0+8000\.got2\.plt_pic32\.__tls_get_addr> |
| .*: (39 23 80 20|20 80 23 39) addi r9,r3,-32736 |
| .*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0 |
| .*: (81 49 80 24|24 80 49 81) lwz r10,-32732\(r9\) |
| .*: (81 3f ff f4|f4 ff 3f 81) lwz r9,-12\(r31\) |
| .*: (7d 49 12 2e|2e 12 49 7d) lhzx r10,r9,r2 |
| .*: (89 42 00 00|00 00 42 89) lbz r10,0\(r2\) |
| .*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0 |
| .*: (99 49 00 00|00 00 49 99) stb r10,0\(r9\) |
| .*: (38 7e ff dc|dc ff 7e 38) addi r3,r30,-36 |
| .*: (48 00 00 01|01 00 00 48) bl .* |
| .*: (38 7e ff f8|f8 ff 7e 38) addi r3,r30,-8 |
| .*: (48 00 00 01|01 00 00 48) bl .* |
| .*: (91 43 80 04|04 80 43 91) stw r10,-32764\(r3\) |
| .*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0 |
| .*: (91 49 80 08|08 80 49 91) stw r10,-32760\(r9\) |
| .*: (81 3e ff f4|f4 ff 3e 81) lwz r9,-12\(r30\) |
| .*: (7d 49 13 2e|2e 13 49 7d) sthx r10,r9,r2 |
| .*: (a1 42 00 00|00 00 42 a1) lhz r10,0\(r2\) |
| .*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0 |
| .*: (a9 49 00 00|00 00 49 a9) lha r10,0\(r9\) |
| |
| .* <00008000.got2.plt_pic32.__tls_get_addr>: |
| .*: (81 7e 80 d8|d8 80 7e 81) lwz r11,-32552\(r30\) |
| .*: (7d 69 03 a6|a6 03 69 7d) mtctr r11 |
| .*: (4e 80 04 20|20 04 80 4e) bctr |
| .*: (60 00 00 00|00 00 00 60) nop |
| |
| .* <__glink>: |
| .*: (3d 6b 00 00|00 00 6b 3d) addis r11,r11,0 |
| .*: (7c 08 02 a6|a6 02 08 7c) mflr r0 |
| .*: (42 9f 00 05|05 00 9f 42) bcl .* <__glink\+0xc> |
| .*: (39 6b 00 0c|0c 00 6b 39) addi r11,r11,12 |
| .*: (7d 88 02 a6|a6 02 88 7d) mflr r12 |
| .*: (7c 08 03 a6|a6 03 08 7c) mtlr r0 |
| .*: (7d 6c 58 50|50 58 6c 7d) subf r11,r12,r11 |
| .*: (3d 8c 00 01|01 00 8c 3d) addis r12,r12,1 |
| .*: (80 0c 01 20|20 01 0c 80) lwz r0,288\(r12\) |
| .*: (81 8c 01 24|24 01 8c 81) lwz r12,292\(r12\) |
| .*: (7c 09 03 a6|a6 03 09 7c) mtctr r0 |
| .*: (7c 0b 5a 14|14 5a 0b 7c) add r0,r11,r11 |
| .*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11 |
| .*: (4e 80 04 20|20 04 80 4e) bctr |
| .*: (60 00 00 00|00 00 00 60) nop |
| .*: (60 00 00 00|00 00 00 60) nop |
