* config/tc-mips.c (append_insn): Don't do r3900 interlock
optimization for -mtune=r3900, as this will break on other CPUs.
diff --git a/gas/ChangeLog b/gas/ChangeLog
index c855fcc..438ea36 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2004-01-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (append_insn): Don't do r3900 interlock
+ optimization for -mtune=r3900, as this will break on other CPUs.
+
2004-01-11 Tom Rix <tcrix@worldnet.att.net>
* config/tc-m68hc11.c (build_indexed_byte): movb and movw cannot
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 55c2482..e0aa61e 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1708,7 +1708,7 @@
though the tx39's divide insns still do require the
delay. */
if (! (hilo_interlocks
- || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT)))
+ || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT)))
&& (mips_optimize == 0
|| (pinfo & INSN_WRITE_LO)))
nops += 2;
@@ -1730,7 +1730,7 @@
insert a NOP. Some newer processors have interlocks.
Also the note tx39's multiply above. */
if (! (hilo_interlocks
- || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT)))
+ || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT)))
&& (mips_optimize == 0
|| (pinfo & INSN_WRITE_HI)))
nops += 2;
@@ -1768,11 +1768,11 @@
|| ((prev_prev_insn.insn_mo->pinfo & INSN_READ_LO)
&& (pinfo & INSN_WRITE_LO)
&& ! (hilo_interlocks
- || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT))))
+ || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT))))
|| ((prev_prev_insn.insn_mo->pinfo & INSN_READ_HI)
&& (pinfo & INSN_WRITE_HI)
&& ! (hilo_interlocks
- || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT)))))
+ || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT)))))
prev_prev_nop = 1;
else
prev_prev_nop = 0;
@@ -2297,7 +2297,7 @@
| INSN_WRITE_COND_CODE))
&& ! cop_interlocks)
|| (! (hilo_interlocks
- || (mips_tune == CPU_R3900 && (pinfo & INSN_MULT)))
+ || (mips_opts.arch == CPU_R3900 && (pinfo & INSN_MULT)))
&& (prev_pinfo
& (INSN_READ_LO
| INSN_READ_HI)))
