[roll] Roll fuchsia [kernel][arm64] Sanitize EL2 registers before dropping to EL1 Ensure that MDCR_EL2, HSTR_EL2, CNTHP_CTL_EL2, and FGT registers (if supported) are sanitized when dropping from EL2 to EL1. For MDCR_EL2, we preserve PMCR_EL0.N in HPMN to allow EL1 access to PMU counters, while zeroing other bits. Other registers are zeroed to disable traps. Original-Original-Bug: 520620007 Original-Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/1661135 Original-Original-Revision: 9266e331a21c4cd7844f399f9c0dee0fc5165236 GitOrigin-RevId: 7c6e240ed8ded8916514b2480fa9de4d483a351a Change-Id: I315a632fd73d4f98430674b08ad7ad39dd54c2c0 Reviewed-on: https://fuchsia-review.googlesource.com/c/integration/+/1672396 Cr-Commit-Position: refs/heads/main@{#195275}
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