commit | e6064aa14bc189f24337d49ca2af97a202903f71 | [log] [tgz] |
---|---|---|
author | Yilong Li <liyl@fuchsia.infra.roller.google.com> | Wed Jul 27 23:22:41 2022 +0000 |
committer | Copybara-Service <copybara-worker@google.com> | Wed Jul 27 16:25:42 2022 -0700 |
tree | a048a6038179a91e0f9b79964cf896386d982fcd | |
parent | 56309bbf6e40c9df39118511a3ca7a57b7638d62 [diff] |
[roll] Roll fuchsia [intel-i915-tgl] Refactor Pipe initialization code. On new Intel platforms (ICL, TGL), the Pipe-DisplayDevice mapping needs to be initialized before DP training and display buffer setup. This change modifies the Pipe initialization logic to make it easier for gen12 device support: - Adds a new class `PipeManager` (and its SKL instantiation `SklPipeManager`) which DisplayDevice can use to request a pipe on initialization and return the pipe on unplug. This will simplify our existing Pipe reallocation logic and for convenience, pipes will have fixed buffer allocation range which doesn't change if pipe is temporarily turned off. - Removes ResetPipe() and ResetTrans() from Controller to reduce the dependency loop. Original-Bug: 83998 Original-Bug: 95863 Original-Bug: 102095 Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/692028 Original-Revision: dfa6fac753a730d687ff0919566794ec4defe8af GitOrigin-RevId: bba5ffd6b77576462b4ffdc1aff08fd88e454d5c Change-Id: I8832ca9759eee4fa7234eeb22b78f4c1b38a5bad
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