)]}'
{
  "commit": "daee2b9a102269a5cface75c9bbea0c8815fa587",
  "tree": "91725592ed68d4225b10ffa0cfb084c177f5a533",
  "parents": [
    "cf1b906717c8d461d0aa99dace1e9441bf95e26b"
  ],
  "author": {
    "name": "Kevin Xu",
    "email": "kevin.xu@fuchsia.infra.roller.applied.co",
    "time": "Fri Apr 10 15:30:53 2026 -0700"
  },
  "committer": {
    "name": "Copybara-Service",
    "email": "copybara-worker@google.com",
    "time": "Fri Apr 10 15:32:39 2026 -0700"
  },
  "message": "[roll] Roll fuchsia [pci] Add fallback for prefetchable BARs behind a bridge\n\nAdd a fallback to allow prefetchable BARs behind a bridge to try\nallocating from the non-prefetchable window of the bridge. This is a\nvalid configuration, though it is less optimal. This does not\nchange the happy path behavior of BAR allocation.\n\nThis was discovered on an AMD Strix Halo, where the firmware assigned a\nprefetchable BAR\u0027s address into the non-prefetchable window of a bridge.\nSince Fuchsia prefers respecting the firmware-assigned address of a BAR,\nallocation in this scenario would fail since the address wasn\u0027t found in\nthe prefetchable window.\n\nTest: AMD Strix Halo is able to allocate all BARs\nTest: fx test pci-unit-test\n\nOriginal-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/1570505\nOriginal-Revision: ba60885e9ac2cbb2d90f51d8e80a0e3c479c5ec6\nGitOrigin-RevId: 428f18e48408e3a69157c0e09a7c1c3ff534d3a9\nChange-Id: I00ae33ced84123bb8f4d5b66bdd16a3a1f250b29\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "39d6f5ba1049e38bd6f0dfc4e17d95dca15f7fd8",
      "old_mode": 33188,
      "old_path": "stem",
      "new_id": "a7e9c54474601d9d34959a67c7409dc44733c7d2",
      "new_mode": 33188,
      "new_path": "stem"
    }
  ]
}