[roll] Roll fuchsia [dwc3][ep0] Add CPU cache invalidation before reading SETUP packet Invalidate CPU D-Cache on ep0_.buffer right before reading incoming setup packets in HandleEp0TransferCompleteEvent to ensure the CPU reads fresh DMA data from DRAM rather than stale cached bytes. Also enrich host/target data direction disagreement warning logs with cur_setup fields. Original-Original-Bug: 529471440 Test: Verified zero control data request size errors across cycle testing. Original-Original-Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/1697039 Original-Original-Revision: 76314d208574fc1a4b3012c9ee16b983cb9d1f31 GitOrigin-RevId: b0b83480167e814c88f9fb4ed7a81fee09da5ba0 Change-Id: I2310a5a1e1932612ff6a6a5c4b636a2f8a74362a Reviewed-on: https://fuchsia-review.googlesource.com/c/integration/+/1699755 Cr-Commit-Position: refs/heads/main@{#196552}
This repository contains Fuchsia's Global Integration manifest files.
All changes should be made to the internal version of this repository. Our infrastructure automatically updates this version when the internal one changes.
Currently all changes must be made by a Google employee. Non-Google employees wishing to make a change can ask for assistance in one of the communication channels documented at get involved.
First install Jiri.
Next run:
$ jiri init $ jiri import minimal https://fuchsia.googlesource.com/integration $ jiri update
Third party projects should have their own subdirectory in ./third_party.